LB1946-E

Ordering number : EN7115 LB1946 Monolithic Digital IC PWM Current Control Stepping Motor Driver http://onsemi.com Overview The LB1946 is stepping motor drive IC that implements PWM current control bipolar drive with a fixed off time. This IC features 15-current setting levels using a fixed VREF voltage and supports for microstepping drive from 1-2 phase excitation to 4W1-2 phase excitation drive. This device is optimal for driving stepping motors such as those used for carriage drive and paper feed in printers. Applications • PWM current control stepping motor drivers Features • PWM current control with a fixed off time • Logic input serial-parallel converter (allows 1-2, W1-2, 2W1-2, and 4W1-2 phase excitation drive) • Current attenuation switching function (with slow decay, fast decay, and mixed decay modes) • Built-in upper and lower side output diodes • Simultaneous on state prevention function (through current prevention) • Noise canceller function • Thermal shutdown circuit • Shutoff on low logic system voltage circuit • Low-power mode control pin Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Motor supply voltage VBB Peak output current IO PEAK Maximum continuous output current Conditions tw≤20μs IO max Ratings Unit 50 V 1.75 A 1.5 A Logic system supply voltage VCC 7.0 V Logic input voltage range VIN -0.3 to VCC V Emitter output voltage VE 1.0 V Operating temperature Topr -20 to +85 °C Storage temperature Tstg -55 to +150 °C 3.0 W Allowable power dissipation (IC internal) Pd max Ta=25°C, independent IC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 June, 2013 11707 SY IM B8-5416 No.7115-1/16 LB1946 Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage VBB 10 to 45 V Logic supply voltage VCC 4.5 to 5.5 V Reference voltage VREF 0.0 to 3.0 V Electrical Characteristics at Ta = 25°C, VCC = 5V, VBB = 45V, VRES = 1.52V Parameter Symbol Ratings Conditions min typ unit max Output Block Output stage supply current IBB ON IBB OFF 1.6 2.4 3.5 mA 1.3 1.9 2.5 mA Output saturation voltage 1 VOsat1 IO=+1.0A (sink) 1.2 1.6 V Output saturation voltage 2 VOsat2 IO =+1.5 A (sink) 1.5 1.9 V Output saturation voltage 3 VOsat3 IO=-1.0 A (source) 1.9 2.2 V Output saturation voltage 4 VOsat4 IO=-1.5 A (source) 2.2 2.4 V 50 μA Output leakage current IO1 (leak) IO2 (leak) Output sustain voltage VO sus VO=VBB (sink) VO=0V (source) L=15mH IO=1.5A * -50 μA 45 V Logic Block Logic system supply current ICC ON D0=1,D1=1,D2=1,D3=1 When these data values are set Input voltage ICC OFF1 D0=0,D1=0,D2=0,D3=0 ICC OFF2 ST=LOW VIH 25.5 37 48.5 mA 18 26 34 mA 0.01 0.05 0.1 mA 0.8 V 35 μA 2 V VIL Input current Sense voltages IIH VIH=2V IIL VIL=0.8V D0=1,D1=1,D2=1,D3=1 VE μA 6 0.470 0.50 0.525 V D0=1,D1=1,D2=1,D3=0 0.445 0.48 0.505 V D0=1,D1=1,D2=0,D3=1 0.425 0.46 0.485 V D0=1,D1=1,D2=0,D3=0 0.410 0.43 0.465 V D0=1,D1=0,D2=1,D3=1 0.385 0.41 0.435 V D0=1,D1=0,D2=1,D3=0 0.365 0.39 0.415 V D0=1,D1=0,D2=0,D3=1 0.345 0.37 0.385 V D0=1,D1=0,D2=0,D3=0 0.325 0.35 0.365 V D0=0,D1=1,D2=1,D3=1 0.280 0.30 0.325 V D0=0,D1=1,D2=1,D3=0 0.240 0.26 0.285 V D0=0,D1=1,D2=0,D3=1 0.195 0.22 0.235 V D0=0,D1=1,D2=0,D3=0 0.155 0.17 0.190 V D0=0,D1=0,D2=1,D3=1 0.115 0.13 0.145 V D0=0,D1=0,D2=1,D3=0 0.075 0.09 0.100 V -1.25 -0.9 When these data values are set Reference current IREF VREF=1.5V -0.5 CR pin current ICR CR=1.0V -1.7 MD pin current IMD MD=1.0V, CR=4.0V -5.0 μA mA μA Logic system on voltage VLSDON 2.6 2.8 3.0 V Logic system off voltage VLSDOFF 2.45 2.65 2.85 V VLHIS 0.03 0.15 0.35 V LVSD hysteresis Thermal shutdown temperature Ts 170 °C *Design guaranteed value No.7115-2/16 LB1946 AC Electrical Characteristics at VCC = 5V Parameter Symbol Ratings Conditions min Clock frequency fclk Data setup time tDS typ 200 VCC=5.0V unit max 550 kHz VCC=5.0V 0.9 2.5 μs tDH VCC=5.0V 0.9 2.5 μs Minimum clock high-level pulse width tSCH VCC=5.0V 0.9 2.5 μs Minimum clock low-level pulse width tSCL VCC=5.0V 0.9 2.5 μs Data hold time tlat VCC=5.0V 0.9 2.5 μs tlatw VCC=5.0V 1.9 5.0 μs SET pin stipulated time SET pin signal pulse width fclk tSCH tSCL CLK tDS tDH DATA D4 D5 D11 D10 D6 tlat SET tlatw VCC=3.3V Specification Absolute Maximum Ratings Parameter Symbol Emitter output voltage Conditions Ratings Unit VE 0.5 V Allowable Operating Ranges at Ta = 25°C Parameter Symbol Motor system supply voltage Conditions Ratings Unit VBB 10 to 45 V Logic system supply voltage VCC 3.0 to 3.6 V Reference voltage VREF 0.0 to 1.0 V Electrical Characteristics at Ta = 25°C, VCC = 3.3V, VBB = 45V, VREF = 1.0V Parameter Symbol Ratings Conditions min typ unit max Output Block Output stage supply current IBB ON 1.6 2.4 3.5 mA IBB OFF 1.3 1.9 2.5 mA Output saturation voltage 1 VOsat1 IO=+1.0A (sink) 1.3 1.7 V Output saturation voltage 2 VOsat2 IO=+1.5 A (sink) 1.6 2.0 V Output saturation voltage 3 VOsat3 IO=-1.0 A (source) 1.9 2.2 V Output saturation voltage 4 VOsat4 IO=-1.5 A (source) 2.2 2.4 V 50 μA Output leakage current Output sustain voltage *Design guaranteed value IO1 (leak) VO=VBB (sink) IO2 (leak) VO=0V (source) VO sus L=15mH IO=-1.5A * -50 45 μA V Continued on next page. No.7115-3/16 LB1946 Continued from preceding page. Parameter Symbol Ratings Conditions min typ unit max Logic Block Logic system supply current ICC ON D0=1,D1=1,D2=1,D3=1 When these data values are set Input voltage ICC OFF1 D0=0,D1=0,D2=0,D3=0 ICC OFF2 ST=0.8V 23.5 34 44.5 mA 16 23 30 mA 0.005 0.03 0.1 mA 0.8 V 35 μA VIH 2 V VIL Input current Sense voltages IIH VIH=2V IIL VIL=0.8V D0=1,D1=1,D2=1,D3=1 VE 0.303 0.330 0.356 V D0=1,D1=1,D2=1,D3=0 0.290 0.315 0.341 V D0=1,D1=1,D2=0,D3=1 0.276 0.300 0.324 V D0=1,D1=1,D2=0,D3=0 0.263 0.286 0.309 V D0=1,D1=0,D2=1,D3=1 0.250 0.272 0.294 V D0=1,D1=0,D2=1,D3=0 0.236 0.257 0.278 V D0=1,D1=0,D2=0,D3=1 0.223 0.243 0.263 V D0=1,D1=0,D2=0,D3=0 0.209 0.228 0.247 V D0=0,D1=1,D2=1,D3=1 0.183 0.200 0.217 V D0=0,D1=1,D2=1,D3=0 0.155 0.170 0.185 V D0=0,D1=1,D2=0,D3=1 0.128 0.143 0.158 V D0=0,D1=1,D2=0,D3=0 0.102 0.114 0.126 V D0=0,D1=0,D2=1,D3=1 0.074 0.085 0.096 V D0=0,D1=0,D2=1,D3=0 0.047 0.057 0.067 When these data values are set Reference current μA 6 IREF VREF=1.5V CR pin current ICR CR=1.0V MD pin current IMD MD=1.0V, CR=4.0V -0.91 V μA -0.5 -0.7 -0.49 mA μA -5.0 Logic system on voltage VLSDON 2.6 2.8 3.0 V Logic system off voltage VLSDOFF 2.45 2.65 2.85 V VLHIS 0.03 0.15 0.35 LVSD hysteresis Thermal shutdown temperature Ts V °C 170 AC Electrical Characteristics at VCC = 3.3V Parameter Symbol Ratings Conditions min Clock frequency fclk VCC=3.3V typ 200 unit max 550 kHz Data setup time tDS VCC=3.3V 0.9 2.5 μs Data hold time tDH VCC=3.3V 0.9 2.5 μs Minimum clock high-level pulse width tSCH VCC=3.3V 0.9 2.5 μs Minimum clock low-level pulse width tSCL VCC=3.3V 0.9 2.5 μs tlat VCC=3.3V 0.9 2.5 μs tlatw VCC=3.3V 1.9 5.0 μs SET pin stipulated time SET pin signal pulse width No.7115-4/16 LB1946 fclk tSCH tSCL CLK tDS tDH DATA D4 D5 D10 D6 D11 tlat SET tlatw Package Dimensions unit:mm (typ) 3147C 15 12.7 11.2 R1.7 0.4 8.4 28 1 14 20.0 4.0 4.0 26.75 (1.81) 0.6 1.78 1.0 SANYO : DIP28H(500mil) Pd max - Ta Allowable power dissipation, Pd max - W 4.0 Independent IC 3.0 2.0 1.0 0 --20 0 20 40 60 Ambient temperature, Ta - °C 80 100 ILB01479 No.7115-5/16 LB1946 Block Diagram VCC VREF2 ST + - Current selection circuit Control logic circuit One-shot multi-vibrator blanking time CR2 OUTBE2 OUTB SET Thermal shutdown circuit VBB Serial-parallel conversion circuit DATA CLK OUTAE1 OUTA One-shot multi-vibrator blanking time Control logic circuit Current selection circuit + MD CR1 - VREF1 GND No.7115-6/16 LB1946 VCC VREF1 NC CR1 MD CLK DATA SET ST NC CR2 NC VREF2 GND Pin Assignment 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VBB NC E1 NC NC OUTA- OUTA OUTB- OUTB NC NC E2 NC VBB LB1946 Top view Timing Chart 1μs CLOCK 1μs DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 SET No.7115-7/16 LB1946 Serial Transmission Data Definitions IA4 IA3 IA2 IA1 DE1 PH1 IB4 IB3 IB2 IB1 DE2 PH2 I/O DEC D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 OUTA OUTA- OUTB OUTB- ratio MODE 0 1 1 1 1 1 1 1 1 1 1 1 1 H L H L 100% SLOW 1 1 1 1 0 1 1 1 1 1 0 1 1 H L H L 96 SLOW 2 1 1 0 1 1 1 1 1 0 1 1 1 H L H L 91 SLOW 3 1 1 0 0 1 1 1 1 0 0 1 1 H L H L 87 SLOW 4 1 0 1 1 1 1 1 0 1 1 1 1 H L H L 83 SLOW 5 1 0 1 0 1 1 1 0 1 0 1 1 H L H L 78 SLOW 6 1 0 0 1 1 1 1 0 0 1 1 1 H L H L 74 SLOW 7 1 0 0 0 1 1 1 0 0 0 1 1 H L H L 70 SLOW 8 0 1 1 1 1 1 0 1 1 1 1 1 H L H L 61 SLOW No. Output mode 9 0 1 1 0 1 1 0 1 1 0 1 1 H L H L 52 SLOW 10 0 1 0 1 1 1 0 1 0 1 1 1 H L H L 44 SLOW 11 0 1 0 0 1 1 0 1 0 0 1 1 H L H L 35 SLOW 12 0 0 1 1 1 1 0 0 1 1 1 1 H L H L 26 SLOW 13 0 0 1 0 1 1 0 0 1 0 1 1 H L H L 17 SLOW 14 1 1 1 1 0 0 1 1 1 1 0 0 L H L H 100 FAST 15 1 1 1 0 0 0 1 1 1 0 0 0 L H L H 96 FAST 16 1 1 0 1 0 0 1 1 0 1 0 0 L H L H 91 FAST 17 1 1 0 0 0 0 1 1 0 0 0 0 L H L H 87 FAST 18 1 0 1 1 0 0 1 0 1 1 0 0 L H L H 83 FAST 19 1 0 1 0 0 0 1 0 1 0 0 0 L H L H 78 FAST 20 1 0 0 1 0 0 1 0 0 1 0 0 L H L H 74 FAST 21 1 0 0 0 0 0 1 0 0 0 0 0 L H L H 70 FAST 22 0 1 1 1 0 0 0 1 1 1 0 0 L H L H 61 FAST 23 0 1 1 0 0 0 0 1 1 0 0 0 L H L H 52 FAST 24 0 1 0 1 0 0 0 1 0 1 0 0 L H L H 44 FAST 25 0 1 0 0 0 0 0 1 0 0 0 0 L H L H 35 FAST 26 0 0 1 1 0 0 0 0 1 1 0 0 L H L H 26 FAST 27 0 0 1 0 0 0 0 0 1 0 0 0 L H L H 17 FAST 28 0 0 0 0 * * 0 0 0 0 * * OFF OFF OFF OFF 0 - Note *: Don't care (0 or 1) Note 1: In the mixed decay mode, set D4 and D10 to 0 and set the MD pin to a level shown below. Programmable MD voltage range VCC=5V specifications: 1.6 to 3.9V VCC=3.3V specifications: 1.2 to 2.5V Current Settings Truth Table * Items in parentheses are defined by the serial data. IA4 (D0) IA3 (D1) IA2 (D2) IA1 (D3) Set Current IOUT 1 1 1 1 11.5/11.5×VREF/3.04RE=IOUT Current Ratio (%) 100 1 1 1 0 11.0/11.5×VREF/3.04RE=IOUT 95.65 1 1 0 1 10.5/11.5×VREF/3.04RE=IOUT 91.30 1 1 0 0 10.0/11.5×VREF/3.04RE=IOUT 86.95 1 0 1 1 9.5/11.5×VREF/3.04RE=IOUT 82.61 1 0 1 0 9.0/11.5×VREF/3.04RE=IOUT 78.26 1 0 0 1 8.5/11.5×VREF/3.04RE=IOUT 73.91 1 0 0 0 8.0/11.5×VREF/3.04RE=IOUT 69.56 0 1 1 1 7.0/11.5×VREF/3.04RE=IOUT 60.87 0 1 1 0 6.0/11.5×VREF/3.04RE=IOUT 52.17 0 1 0 1 5.0/11.5×VREF/3.04RE=IOUT 43.48 0 1 0 0 4.0/11.5×VREF/3.04RE=IOUT 34.78 0 0 1 1 3.0/11.5×VREF/3.04RE=IOUT 26.08 0 0 1 0 2.0/11.5×VREF/3.04RE=IOUT 17.39 Note 1: The current ratios shown are calculated values. No.7115-8/16 LB1946 0.1μF 1.5V 680pF 30kΩ 5V 10μF 30kΩ 680pF Sample Application Circuit at VCC=5V Logic level inputs CR1 MD CLK 20 19 18 17 16 15 GND NC 21 VREF2 VREF1 22 NC 23 CR2 24 NC 25 ST 26 SET 27 DATA 28 VCC MD voltage setting (1.6 to 3.9V) Fast mode: GND Slow mode: VCC VBB NC E1 NC NC OUTA - OUTA OUTB - OUTB NC NC E2 NC VBB LB1946 1 2 3 4 5 6 7 8 9 10 11 12 13 14 L L SBD SBD 47μF 42V 1Ω 1Ω SBD SBD Top view No.7115-9/16 LB1946 0.1μF 1.0V 680pF 30kΩ 3.3V 10μF 30kΩ 680pF Sample Application Circuit at VCC=3.3V Logic level inputs CR1 MD CLK 20 19 18 17 16 15 GND NC 21 VREF2 VREF1 22 NC 23 CR2 24 NC 25 ST 26 SET 27 DATA 28 VCC MD voltage setting (1.2 to 2.5V) Fast mode: GND Slow mode: VCC VBB NC E1 NC NC OUTA - OUTA OUTB - OUTB NC NC E2 NC VBB LB1946 1 2 3 4 5 6 7 8 9 10 11 12 13 14 L L SBD SBD 47μF 42V SBD 1Ω 1Ω SBD Top view No.7115-10/16 LB1946 Current Path in Slow Decay Mode Regenerative current during upper-side transistor switching operation VBB ON Current path when output is on OFF I Regenerative current when upper-side transistor is off OUTA OUTA SBD SBD ON Constant Output OFF Sense voltage comparator VE Motor current I I=VE/RE VREF Re VREF 3.04 Internal reference voltage generated by setting voltage circuit Figure 1 ILB01480 Current Path in Fast Decay Mode VBB ON Current path when output is on OFF Current path in fast decay mode OUTA SBD SBD OUTA ON Sense voltage comparator OFF VREF Re VREF 3.04 ILB01481 No.7115-11/16 LB1946 Switching Timing Chart During PWM Drive Mode Slow decay (upper-side chopping) Serial transmission data (D4, D10) = High MD pin: Low E pin Output current tn CR pin Output pin Switching Waveform ILB01482 FAST DECAY Serial transmission data (D4, D10) = Low MD pin: Low Noise spike E pin Output current CR pin Output pin Switching Waveform ILB01483 No.7115-12/16 LB1946 MIX DECAY Noise spike tm E pin Output current tn MD pin voltage level CR pin t on Output pin t off Switching Waveform ILB01484 Mix decay logic setting When serial transmission data (D4, D10) is Low MD pin setting: 5V VCC type: 1.6 to 3.9V 3.3V VCC type: 1.2 to 2.5V CR voltage and MD pin voltage are compared to select dual-side chopping or upper-side chopping. CR voltage > MD pin voltage: dual-side chopping CR voltage < MD pin voltage: upper-side chopping t on: Output on time t off: Output off time tm: Fast decay time in mix decay mode tn: Noise cancellation time No.7115-13/16 LB1946 1. Switching OFF time and noise cancellation time calculations Notes on the CR pin setting (switching off time and noise canceller time) The noise canceller time (Tn) and the switching off time (Toff) are set using the following formulas. • When VCC=5V Noise canceller time (Tn) Tn ≈ CyRyln {(1.5 - RI)/(4.0 - RI)} [s] CR pin charge current: 1.25mA Switching off time (Toff) Toff ≈ -CyRyln (1.5/4.8) [s] Component value ranges R: 5.6kΩ to 100kΩ C: 470pF to 2000pF • When VCC=3.3V Noise canceller time (Tn) Tn ≈ CyRyln {(1.06 - RI)/(2.66 - RI)} [s] CR pin charge current: 0.7mA Switching off time (Toff) Toff ≈ -CyRyln (1.06/3.1) [s] VCC line One-shot multi-vibrator blanking time circuit CR pin R : 30kΩ C : 680pF E1 Figure 2 CR Pin Internal Circuit Structure No.7115-14/16 LB1946 2. Notes on the MD pin • If slow decay mode is set up by setting the D4 and D10 bits in the input serial data to 1, the MD pin must be shorted to GND. • If the decay mode is set up by setting the D4 and D10 bits in the input serial data to 0, decay mode can be set with the MD pin. When the VCC=5V specifications are used, the setting voltage range for mixed decay mode is 1.6 to 3.9V. When the VCC=3.3V specifications are used, the setting voltage range for mixed decay mode is 1.2 to 2.5V. If mixed decay mode will not be used with the fast decay mode setting, either: Short the MD pin to GND to select fast decay mode, or Short the MD pin to VCC to select slow decay mode. 3. Usage Notes • Notes on the VREF pin Since the VREF pin inputs the reference voltage used to set the current, applications must be designed so that noise does not occur at this pin. • Notes on the GND pins Since this IC switches large currents, care is required with respect to the GND pins. The PCB pattern in sections where large currents flow must be designed with low impedances and must be kept separate from the small-signal system. In particular, the GND terminals of the E pin sense resistor (RE) and external Schottky barrier diode GND terminals must be located as close as possible to the IC GND. The capacitor between VCC and ground and between VBB and GND must be as close as possible to the corresponding VCC and VBB pin in the pattern. • Power on sequence When turning the power systems on VCC→logic level inputs (CLK, DATA, SET, and ST) →VREF→VBB When turning the power systems off VBB→VREF→logic level inputs (CLK, DATA, SET, and ST) →VCC Note that if the power supply for the logic level inputs is on when the VCC power supply is off, a bias with an unstable state will be applied to the protection diodes at the VCC pins, and this can cause incorrect operation. No.7115-15/16 LB1946 ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.7115-16/16