LV8406T-MPB-E

Ordering number : ENA1382B LV8406T Bi-CMOS IC 2ch Forward/Reverse Motor Driver http://onsemi.com Overview LV8406T is a 2-channel forward/reverse motor driver IC using D-MOS FET for output stage. As MOS circuit is used, it supports the PWM input. Its features are that the on resistance (0.75Ω typ) and current dissipation are low. It also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the motors that need high-current. Functions • 2-channel forward/reverse motor driver. • Low power consumption. • Low-ON resistance 0.75Ω. • Built-in low voltage reset and thermal shutdown circuit. • Four mode function forward/reverse, brake, stop. • Built-in charge pump. Specifications Absolute Maximum Ratings at Ta = 25°C, SGND = PGND = 0V Parameter Symbol Conditions VM1, VM2 Ratings Unit Power supply voltage (for load) VM max Power supply voltage (for control) VCC max Output current IO max Output peak current IO peak Input voltage VIN max Allowable power dissipation Pd max Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C t ≤ 10ms Mounted on a specified board* -0.5 to 16.0 V -0.5 to 6.0 V 1.4 A 2.5 A -0.5 to VCC+0.5 V 3.1 W * Specified board : 90mm × 90mm × 1.6mm, glass epoxy 2-layer board (2S0P). Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 June, 2013 N0211 SY/O2809 SY / D1008 MS 20081201-S00005 No.A1382-1/6 LV8406T Allowable Operating Conditions at Ta = 25°C, SGND = PGND = 0V Parameter Symbol Conditions Ratings Unit Power supply voltage (VM pin) VM 1.5 to 15.0 Power supply voltage (VCC pin) VCC 2.8 to 5.5 V Input signal voltage VIN 0 to VCC V Input signal frequency f max 200 V kHz Electrical Characteristics Ta = 25°C, VCC = 3.0V, VM = VS = 6.0V, SGND = PGND = 0V, unless otherwise specified. Parameter Symbol Conditions Ratings Remarks min typ Unit max Standby load current drain IMO EN = 0V 1 1.0 μA Standby control current drain ICO EN = IN1 = IN2 = IN3 = IN4 = 0V 2 1.0 μA Standby load current drain2 IMO2 VCC = 0V, VM = VS = 6V 1.0 μA 1.2 mA Operating control current drain IC1 EN = 3V, with no load High-level input voltage VIH 2.7 ≤ VCC ≤ 5.5V 3 0.6×VCC 0.85 VCC V Low-level input voltage VIL 2.7 ≤ VCC ≤ 5.5V 0 0.2×VCC V High-level input current IIH1 VIN = 3V 4 25 μA IIL1 VIN = 0V 4 Pull-down resistance value RDN EN1, EN2, IN1, IN2, IN3, IN4 100 200 400 Charge pump voltage VG VCC + VS 8.5 9.0 9.5 V Output ON resistance 1 RON1 Sum of top and bottom sides ON 5 0.75 1.2 Ω 5 1.0 1.5 Ω 15 (EN1, EN2, IN1, IN2, IN3, IN4) Low-level input current μA -1.0 (EN1, EN2, IN1, IN2, IN3, IN4) kΩ resistance. Output ON resistance 2 RON2 Sum of top and bottom sides ON resistance. VCC = 2.8V Low-voltage detection voltage VCS VCC pin voltage is monitored 6 2.15 2.30 2.45 V Thermal shutdown temperature Tth Design guarantee value * 7 150 180 210 °C Output block Turn-on time TPLH 8 0.2 0.4 μS Turn-off time TPHL 8 0.2 0.4 μS * : Design guarantee value and no measurement is preformed. Remarks 1. Current consumption when output at the VM pin is off. 2. Current consumption when the VCC pin when in standby mode. 3. Current consumption at the VCC pin when EN is 3V (standby mode). 4. Pins EN1, 2, IN1, 2, 3, and 4 are all pulled down. 5. Sum of upper and lower saturation voltages of OUT pin divided by the current. 6. All power transistors are turned off if a low VCC condition is detected. 7. All output transistors are turned off if the thermal protection circuit is activated. They are turned on again as the temperature goes down. 8. Rising time from 10 to 90% and falling time from 90 to 10% are specified. No.A1382-2/6 LV8406T Package Dimensions unit : mm (typ) 3279 Pd max -- Ta TOP VIEW BOTTOM VIEW 6.5 20 0.5 6.4 4.4 11 10 1 0.65 0.15 0.22 Exposed Die-Pad (1.0) SIDE VIEW 1.2max (0.33) Allowable power dissipation, Pd max -- W 4,0 Specified board: 90×90×1.6mm3 glass epoxy 2-layer (2S0P) with components mounted on the exposed die-pad board. 3.1 3.0 2.0 1.61 1.0 0 -30 -20 0 20 40 60 80 85 100 0.08 Ambient temperature, Ta -- °C SANYO : TSSOP20J(225mil) Substrate Specifications Size : 90mm × 90mm × 1.6mm (2-layer substrate [2S0P]) Material : Glass epoxy Copper wiring density : L1 = 95% / L2 = 95% L1 : Copper wiring pattern diagram L2 : Copper wiring pattern diagram Cautions 1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the Exposed Die-Pad is wet. 2) For the set design, employ the derating design with sufficient margin. Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stresses such as vibration, impact, and tension. Accordingly, the design must ensure these stresses to be as low or small as possible. The guideline for ordinary derating is shown below : (1)Maximum value 80% or less for the voltage rating (2)Maximum value 80% or less for the current rating (3)Maximum value 80% or less for the temperature rating 3) After the set design, be sure to verify the design with the actual product. Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc. Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of IC. No.A1382-3/6 LV8406T Pin Assignment VG 1 20 C1H VM1 2 19 C1L OUT1 3 18 SGND OUT2 4 17 VS LV8406T PGND 5 PGND 6 16 EN1 15 IN1 OUT3 7 14 IN2 OUT4 8 13 VCC VM2 9 12 EN2 IN4 10 11 IN3 Top view Block Diagram VCC VM1 OUT1 Startup control block Thermal Protection Circuit OUT2 Reducedvoltage Protection Circuit VM2 OUT3 EN1 EN2 Motor control Logic OUT4 IN1 IN2 PGND IN3 IN4 Charge pump VCC+VS VS C1H C1L VG * Connect a kickback absorption capacitor as near as possible to the IC. Coil kickback may cause increase in VM line voltage, and a voltage exceeding the maximum rating may be applied momentarily to the IC, which results in deterioration or damage of the IC * The pin VS is a terminal that supplies a source power supply of the charge pump circuit. The charge pump voltage, VG = VS + VCC is generated. Apply the high voltage of VM1 or VM2. No.A1382-4/6 LV8406T Truth Table EN1 IN1 IN2 OUT1 OUT2 (EN2) (IN3) (IN4) (OUT3) (OUT4) H H L L H L H L L H L H L L Z Z - - Z H L Z Charge pump Mode Brake Forward ON Reverse Standby OFF All function stop - : denotes a don't care value. Z : High-impedance • In standby mode, consumption current serves as zero.. * All power transistors turn off and the motor stops driving when the IC is detected in low voltage or thermal protection mode. Pin Functions Pin No. Pin name 20 C1H 1 VG 17 VS Description Equivalent circuit Step-up capacitor connection pin. VS VG Charge pump source voltage supply pin. C1H 19 C1L Step-up capacitor connection pin. VCC C1L Internal OSC 16 EN1 Logic enable pin. 12 EN2 (Pull-down resistor incorporated) 15 IN1 Driver output switching. 14 IN2 11 IN3 10 IN4 3 OUT1 4 OUT2 7 OUT3 8 OUT4 VCC 200kΩ Driver output. VM OUT OUT PGND 2 VM1 9 VM2 Motor block power supply. 13 VCC 18 SGND Logic block power supply. Control block ground. 5 PGND Driver block ground. 6 PGND No.A1382-5/6 LV8406T ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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