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LV8712T-MPB-H

LV8712T-MPB-H

  • 厂商:

    SANYO(三洋)

  • 封装:

    TVSOP24

  • 描述:

    MOTOR DRIVER IC

  • 数据手册
  • 价格&库存
LV8712T-MPB-H 数据手册
Ordering number : ENA1674A LV8712T Bi-CMOS LSI PWM Constant-Current Control Stepping Motor Driver http://onsemi.com Overview The LV8712T is a stepping motor driver of the micro-step drive corresponding to supports 2W 1-2 phase excitation. It is the best for the drive of the stepping motor for a scanner and a small printer. Features • Single-channel PWM constant-current control stepping motor driver incorporated. • Excitation mode can be set to 2-phase, 1-2 phase, W1-2 phase , or 2W1-2 phase • Microstep can control easily by the CLK-IN input. • Power-supply voltage of motor : VM max = 18V • Output current : IO max = 0.8A • Output ON resistance : RON = 1.1Ω (upper and lower total, typical, Ta = 25°C ) • A thermal shutdown circuit and a low voltage detecting circuit are built into. Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Motor supply voltage VM max Logic supply voltage VCC max Output peak current IO peak Each 1ch, tw ≤ 10ms, duty 20% Output continuousness current IO max Each 1ch Logic input voltage VIN Allowable power dissipation Pd max Operating temperature Storage temperature Ratings Unit 18 V 6 V 1.0 A 800 mA -0.3 to VCC + 0.3 V 1.35 W Topr -20 to +85 °C Tstg -55 to +150 °C * * Specified circuit board : 57.0mm×57.0mm×1.7mm, glass epoxy 2-layer board. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 June, 2013 20211 SY/51210 SY 20100216-S00005 No.A1674-1/14 LV8712T Allowable Operating Ratings at Ta = 25°C Parameter Symbol Motor supply voltage range VM Logic supply voltage range VCC Logic input voltage VIN VREF input voltage range VREF Conditions Ratings Unit 4 to 16 V 2.7 to 5.5 V -0.3 tp VCC+0.3 V 0 to VCC-1.8 V Electrical Characteristics at Ta = 25°C, VM = 12V, VCC = 3.3VVREF = 1.0V Parameter Symbol Ratings Conditions min Standby mode current drain Current drain typ IMstn PS = “L”, no load 1 μA ICCstn PS = “L”, no load 1 μA IM PS = “H”, no load 0.3 0.5 0.7 mA 0.9 1.3 1.7 mA ICC PS = “H”, no load Thermal shutdown temperature TSD Design guarantee 180 Thermal hysteresis width ΔTSD Design guarantee 40 VCC low voltage cutting voltage VthVCC Low voltage hysteresis voltage VthHIS REG5 output voltage Vreg5 IO = -1mA Output on resistance RonU 2.7 V 100 130 160 mV 4.5 5 5.5 V IO = -800mA, Source-side on resistance 0.78 1.0 Ω 0.32 0.43 Ω 10 μA 1.0 1.2 V IO = 800mA, Sink-side on resistance IOleak VO = 15V Diode forward voltage VD ID = -800mA IINL VIN = 0.8V 4 8 12 μA IINH VIN = 3.3V 22 33 45 μA Logic high-level input voltage VINH Logic low-level input voltage VINL VREF input current IREF VREF = 1.0V Vtdac0_2W Step 0 (When initialized : channel 1 2W1-2-phase comparator drive °C 2.4 RonD Current setting °C 2.1 Output leakage current Logic pin input current Unit max 2.0 V 0.8 V μA -0.5 0.191 0.2 0.209 V comparator level) threshold Vtdac1_2W Step 1 (Initial state+1) 0.187 0.196 0.205 V voltage Vtdac2_2W Step 2 (Initial state+2) 0.175 0.184 0.193 V Vtdac3_2W Step 3 (Initial state+3) 0.158 0.166 0.174 V Vtdac4_2W Step 4 (Initial state+4) 0.132 0.140 0.148 V Vtdac5_2W Step 5 (Initial state+5) 0.102 0.110 0.118 V Vtdac6_2W Step 6 (Initial state+6) 0.068 0.076 0.084 V (current step switching) W1-2-phase Vtdac7_2W Step 7 (Initial state+7) 0.032 0.040 0.048 V Vtdac0_W Step 0 (When initialized : channel 1 0.191 0.200 0.209 V Vtdac2_W Step 2 (Initial state+1) 0.175 0.184 0.193 V Vtdac4_W Step 4 (Initial state+2) 0.132 0.140 0.148 V Vtdac6_W Step 6 (Initial state+3) 0.068 0.076 0.084 V Vtdac0_H Step 0 (When initialized : channel 1 0.191 0.200 0.209 V Step 4 (Initial state+1) 0.132 0.140 0.148 V Step 4' (When initialized : channel 1 0.191 0.200 0.209 V drive 1-2 phase drive comparator level) comparator level) Vtdac4_H 2 phase drive Vtdac4_F comparator level) Current setting comparator Vtatt00 ATT1 = L, ATT2 = L 0.191 0.200 0.209 V threshold voltage Vtatt01 ATT1 = H, ATT2 = L 0.152 0.160 0.168 V (current attenuation rate switching) Chopping frequency CHOP pin threshold voltage Vtatt10 ATT1 = L, ATT2 = H 0.112 0.120 0.128 V Vtatt11 ATT1 = H, ATT2 = H 0.072 0.080 0.088 V Fchop Cchop = 220pF 36 45 54 kHz VCHOPH 0.6 0.7 0.8 V VCHOPL 0.17 0.2 0.23 V 7 10 13 μA 250 400 mV CHOP pin charge/discharge current Ichop MONI pin saturation voltage Vsatmon Imoni = 1mA No.A1674-2/14 LV8712T Package Dimensions unit : mm (typ) 3260A Pd max - Ta 1.5 6.5 Allowable power dissipation, Pd max - W 1.35 0.5 6.4 13 4.4 24 12 1 0.5 0.15 0.22 0.08 1.2max (1.0) (0.5) 1.0 0.70 0.5 Specified circuit board : 57.0 × 57.0 × 1.7mm3 2-layer glass epoxy board 0 - 20 0 20 40 60 80 100 Ambient temperature, Ta - C SANYO : TSSOP24(225mil) FR OUT1A PGND RNF1 OUT1B VM OUT2A RNF2 OUT2B PGND MD1 MD2 Pin Assignment 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 RST OE REG5 PS MONI VREF STEP ATT1 ATT2 CHOP VCC GND LV8712T No.A1674-3/14 + - + - GND VREF VCC REG5 LVS TSD + - PS Start circuit Attenuator (100%/80% /60%/40%) CHOP ATT1 ATT2 Oscillation circuit 1/5 Standard voltage VM-5V standard voltage Output preamplifier stage VM Output preamplifier stage Output preamplifier stage OUT2A MD2 FR + RNF2 Current selection (2W1-2/ W1-2/1-2/2) OUT2B STEP RST OE Output control logic MD1 OUT1B Current selection (2W1-2/ W1-2/1-2/2) + OUT1A Output preamplifier stage RNF1 MONI PGND LV8712T Block Diagram No.A1674-4/14 LV8712T Pin Functions Pin No. Pin Name Pin Functtion 1 RST Excitation reset signal input pin. 2 OE Output enable signal input pin. 7 STEP STEP signal input pin. 8 ATT1 Motor holding current switching pin. 9 ATT2 Motor holding current switching pin. 13 MD2 Excitation mode switching pin 2. 14 MD1 Excitation mode switching pin 1. 24 FR CW / CCW switching signal input pin. Equivalent Circuit VCC GND 4 PS Power save signal input pin. VCC 4 GND 16 OUT2B Channel 2 OUTB output pin. 17 RNF2 Channel 2 current-sense resistor 18 OUT2A Channel 2 OUTA output pin. 20 OUT1B Channel 1 OUTB output pin. 21 RNF1 Channel 1 current-sense resistor VM connection pin. 20 16 23 18 connection pin. 23 OUT1A Channel 1 OUTA output pin.Power 21 17 GND 6 VREF Constant current control reference voltage input pin. VCC 6 GND Continued on next page. No.A1674-5/14 LV8712T Continued from preceding page. Pin No. 3 Pin Name REG5 Pin Functtion Internal power supply capacitor connection pin. Equivalent Circuit VM 3 GND 5 MONI Position detection monitor pin. VCC 5 GND 10 CHOP Chopping frequency setting capacitor connection pin. VCC GND 10 No.A1674-6/14 LV8712T Description of operation Stepping motor control (1) Power save function This IC is switched between standby and operating mode by setting the PS pin. In standby mode, the IC is set to power-save mode and all logic is reset. In addition, the internal regulator circuit do not operate in standby mode. PS Mode Internal regulator Low or Open Standby mode Standby High Operating mode Operating (2) The order of turning on recommended power supply The order of turning on each power supply recommends the following. VCC power supply order → VM power supply order → PS pin = High It becomes the above-mentioned opposite for power supply OFF. However, the above-mentioned is a recommendation, the overcurrent is not caused by not having defended this, and IC is destroyed. (3) STEP pin function Operating mode Input PS STP Low * Standby mode High Excitation step proceeds High Excitation step is kept (4) Excitation mode setting function(initial position) MD1 MD2 Excitation mode Initial position Channel 1 Channel 2 Low Low 2 phase excitation 100% -100% High Low 1-2 phase excitation 100% 0% Low High W1-2 phase excitation 100% 0% High High 2W1-2 phase excitation 100% 0% This is the initial position of each excitation mode in the initial state after power-on and when the counter is reset. (5) Position detection monitoring function The MONI position detection monitoring pin is of an open drian type. When the excitation position is in the initial position, the MONI output is placed in the ON state. (Refer to "(12) Examples of current waveforms in each of the excitation modes.") No.A1674-7/14 LV8712T (6) Reset function RST Operating mode High Normal operation Low Reset state RST RESET STEP MONI 1ch output 0% 2ch output Initial position When the RST pin is set to Low, the excitation position of the output is forcibly set to the initial position, and the MONI output is placed in the ON state. When RST is then set to High, the excitation position is advanced by the next STEP input. (7) Output enable function OE Operating mode Low Output ON High Output OFF OE Power save mode STEP MONI 1ch output 0% 2ch output Output is high-impedance When the OE pin is set High, the output is forced OFF and goes to high impedance. However, the internal logic circuits are operating, so the excitation position proceeds when the STEP signal is input. Therefore, when OE is returned to Low, the output level conforms to the excitation position proceeded by the STEP input. No.A1674-8/14 LV8712T (8) Forward/reverse switching function FR Operating mode Low Clockwise (CW) High Counter-clockwise (CCW) FR CW mode CCW mode CW mode STEP Excitation position (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5) 1ch output 2ch output The internal D/A converter proceeds by one bit at the rising edge of the input STEP pulse. In addition, CW and CCW mode are switched by setting the FR pin. In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current. In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current. (9) Setting constant-current control The setting of STM driver's constant current control is decided the VREF voltage from the resistance connected between RNF and GND by the following expression. IOUT = (VREF/5)/RNF resistance * The above setting is the output current at 100% of each excitation mode. The voltage input to the VREF pin can be switched to four-step settings depending on the statuses of the two inputs, ATT1 and ATT2. This is effective for reducing power consumption when motor holding current is supplied. Attenuation function for VREF input voltage ATT1 ATT2 Current setting reference voltage attenuation ratio Low Low 100% High Low 80% Low High 60% High High 40% The formula used to calculate the output current when using the function for attenuating the VREF input voltage is given below. IOUT = (VREF/5) × (attenuation ratio)/RNF resistance Example : At VREF of 1.0V, a reference voltage setting of 100% [(ATT1, ATT2) = (L, L)] and an RNF resistance of 0.5Ω, the output current is set as shown below. IOUT = 1.0V/5 × 100%/0.5Ω = 400mA If, in this state, (ATT1, ATT2) is set to (H, H), IOUT will be as follows : IOUT = 400mA × 40% = 160mA In this way, the output current is attenuated when the motor holding current is supplied so that power can be conserved. No.A1674-9/14 LV8712T (10) Chopping frequency setting For constant-current control, this IC performs chopping operations at the frequency determined by the capacitor (Cchop) connected between the CHOP pin and GND. The chopping frequency is set as shown below by the capacitor (Cchop) connected between the CHOP pin and GND. Tchop ≈ C × V × 2 / I (s) V : Width of suresshu voltage, typ 0.5V I : Charge/discharge current, typ 10μA For instance, when Cchop is 200pF, the chopping frequency will be as follows : Fchop ≈ 1 / Tchop (Hz) (11) Output current vector locus (one step is normalized to 90 degrees) 100.0 θ0 θ4' (2-phase) θ1 θ2 Channel 1 phase current ratio (%) θ3 θ4 66.7 θ5 θ6 33.3 θ7 θ8 0.0 0.0 33.3 66.7 100.0 Channel 2 current ratio (%) Setting current ration in each excitation mode STEP 2W1-2 phase (%) Channel 1 W1-2 phase (%) Channel 2 Channel 1 θ0 100 0 θ1 98 20 θ2 92 38 θ3 83 55 θ4 70 70 θ5 55 83 θ6 38 92 θ7 20 98 θ8 0 100 1-2 phase (%) Channel 2 Channel 1 100 0 92 38 70 70 38 92 0 100 2-phase (%) Channel 2 Channel 1 100 0 70 70 0 100 100 Channel 2 100 No.A1674-10/14 LV8712T (12) Typical current waveform in each excitation mode 2-phase excitation (CW mode) STEP MONI (%) 100 l1 0 -100 (%) 100 I2 0 -100 1-2 phase excitation (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 No.A1674-11/14 LV8712T W1-2 phase excitation (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 2W1-2 phase excitation (CW mode) STEP MONI (%) 100 50 I1 0 -50 -100 (%) 100 50 I2 0 -50 -100 No.A1674-12/14 LV8712T (13) Current control timing chart(Chopping operation) (Sine wave increasing direction) STEP Set current Set current Coil current Chopping cycle fchop BLANKING section BLANKING section Current mode CHARGE SLOW FAST CHARGE SLOW FAST (Sine wave decreasing direction) STEP Set current Coil current Set current Chopping cycle fchop Current mode CHARGE Chopping cycle BLANKING section SLOW FAST BLANKING section Forced CHARGE section FAST CHARGE BLANKING section SLOW In each current mode, the operation sequence is as described below : • At rise of chopping frequency, the CHARGE mode begins. (The Blanking section in which the CHARGE mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF) exists for 1μs.) • The coil current (ICOIL) and set current (IREF) are compared in this blanking time. When (ICOIL < IREF) state exists ; The CHARGE mode up to ICOIL ≥ IREF, then followed by changeover to the SLOW DECAY mode, and finally by the FAST DECAY mode for approximately 1μs. When (ICOIL < IREF) state does not exist ; The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one cycle of chopping is over. Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the sine wave increasing direction, then entering the FAST DECAY mode till the current is attenuated to the set level and followed by the SLOW DECAY mode. No.A1674-13/14 LV8712T Application Circuit Example Logic input - + 1.0V Clock input 24 OUT1A 23 REG5 PGND 22 4 PS RNF1 21 5 MONI OUT1B 20 6 VREF VM 19 7 STEP 8 ATT1 RNF2 17 9 ATT2 OUT2B 16 10 CHOP PGND 15 11 VCC MD1 14 12 GND MD2 RST 2 OE 3 LV8712T Short-circuit state detection monitor FR 1 Logic input + - 12V OUT2A 18 M 220pF 3.3V - + Logic input 13 The formulae for setting the constants in the examples of the application circuits above are as follows : Constant current (100%) setting When VREF = 1.0V IOUT = VREF/5/RNF resistance = 1.0V/5/0.51Ω = 0.392A Chopping frequency setting Fchop = Ichop/ (Cchop × Vtchop × 2) = 10μA/ (220pF × 0.5V × 2) = 45kHz ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No.A1674-14/14
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