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STK672-110-SL-E

STK672-110-SL-E

  • 厂商:

    SANYO(三洋)

  • 封装:

    SIP12

  • 描述:

    2-PHASE STEPPING MOTOR DRIVER

  • 数据手册
  • 价格&库存
STK672-110-SL-E 数据手册
Ordering number : ENA2139 STK672-110-SL-E Thick-Film Hybrid IC 2-phase Stepping Motor Driver http://onsemi.com Overview The STK672-110-SL-E is a hybrid IC for use as a unipolar, 2-phase stepping motor driver with PWM current control. Applications • Office photocopiers, printers, etc. Features • The motor speed can be controlled by the frequency of an external clock signal (the CLOCK pin signal). • The excitation type is switched according to the state (low or high) of the MODE pin. The mode is set to 2-phase or 1-2phase excitation on the rising edge of the clock signal. • A motor direction switching pin (the CWB pin) is provided. • All inputs are schmitt inputs and 40kΩ (typical: –50 to +100%) pull-up resistors are built in. • The motor current can be set by changing the Vref pin voltage. Since a 0.22Ω current detection resistor is built in, a current of 1A is set for each 0.22V of applied voltage. • The input frequency range for the clock signal used for motor speed control is 0 to 25kHz. • Supply voltage ranges: VCC = 10 to 42V, VDD = 5.0V ±5% • This IC supports motor operating currents of up to 1.8A at Tc = 105°C, and of up to 2.65A at Tc = 25°C. Semiconductor Components Industries, LLC, 2013 June, 2013 O1712HKPC 5-6405 No. A2139-1/11 STK672-110-SL-E Specifications Absolute Maximum Ratings at Tc = 25°C Parameter Symbol Conditions Ratings unit Maximum supply voltage 1 VCC max No signal 52 V Maximum supply voltage 2 VDD max No signal -0.3 to +7.0 V Input voltage VIN max Logic input pins -0.3 to +7.0 V Output current IOH max 10μA 1 pulse (resistance load) 2.65 A Repeated avalanche capacity Ear max Allowable power dissipation Pd max 6.5 W Operating substrate temperature Tc max 105 °C Junction temperature Tj max 150 °C Storage temperature Tstg -40 to +125 °C 28 With an arbitrarily large heat sink. Per MOSFET mJ Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Allowable Operating Ranges at Ta=25°C Parameter Symbol Conditions Ratings unit Operating supply voltage 1 VCC With signals applied 10 to 42 V Operating supply voltage 2 VDD With signals applied 5±5% V 0 to VDD V 1.8 A 2.1 A Input high voltage VIH Pin 8, 9, 10, 11 and 12 Output current 1 IOH1 Tc=105°C, CLOCK≥200Hz Output current 2 IOH2 Tc=80°C, CLOCK≥200Hz, See the motor current (IOH) derating curve CLOCK frequency fCL Minimum pulse width: 20μs 0 to 25 kHz Phase driver withstand voltage VDSS ID=1mA (Tc=25°C) 100min V Electrical Characteristics at Tc=25°C, VCC=24V, VDD=5.0V Parameter Symbol Conditions VDD supply current ICCO CLOCK=GND Output average current Ioave With R/L = 3Ω/3.8mH in each phase Vref = 0.176V FET diode forward voltage Vdf If=1A (RL=23Ω) Output saturation voltage Vsat RL=23Ω High-level input voltage VIH Pins 6 to 9 (4 pins) Low-level input voltage VIL Pins 6 to 9 (4 pins) Input current IIL With pins 6 to 9 at the ground level. Pull-up resistance: 40kΩ (typical) Vref input voltage VrH Pin 12 Vref input bias current IIB With pin 12 at 1V min typ 0.41 max unit 2.6 6 0.45 0.50 A 1.2 1.8 V 0.73 1.02 V 4.0 62 mA V 1.0 V 125 250 μA 3.5 V 50 500 nA 0 Notes: A fixed-voltage power supply must be used. No. A2139-2/11 STK672-110-SL-E Package Dimensions unit:mm (typ) 32.5 1 0.4 3.0 26.0 8.5 12 2.0 0.5 11 2=22 5.2 7.4 Figure 1 Derating Curve of Motor Current, IOH, vs. STK672-110-SL-E Operating Substrate Temperature, Tc IOH -- Tc 3.0 Motor current, IOH -- A VCC=24V Motor: R=0.4Ω L=1.2mH Operating region when fCL≥200Hz 2.65 2.5 2.2 2.0 1.8 Operating region in hold mode 1.5 1.5 1.0 0.5 0 0 20 40 60 80 100 105 120 Operating substrate temperature, Tc -- °C Notes • The current range given above represents conditions when output voltage is not in the avalanche state. • Tc must measure surface metal temperature on rear side center of this device. No. A2139-3/11 STK672-110-SL-E Block Diagram A AB 5 B 4 3 BB 2 VDD 10 F1 MODE 8 CLOCK 9 F2 F3 F4 Excitation mode selection Phase excitation signal generation Phase advance counter CWB 7 + VrefA - RESETB 6 Chopping circuit R1 C1 R2 RsA + VrefB - Off time setting RsB 1 GND C2 Vref 12 SUB SP 11 Sample Application Circuit STK672-110-SL-E 10μF VDD=5V CO3 CLOCK + 10 9 MODE 8 CWB 7 RESETB 5V Two-phase stepping motor 5 4 3 6 5V RO3 D1 2 AB BB + CO2 At least 100μF 0.1μF + RO2 VCC 24V B RO1 Vref CO4 10μF A 12 1 GND P.GND 11 CO1 No. A2139-4/11 STK672-110-SL-E Precautions • To minimize noise in the 5V system, locate the ground side of capacitor CO2 in the above circuit as close as possibleto pin 1 of the IC. • Insert resistor RO3 (47 to 100Ω) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS-IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6V (when If = 0.1A), this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short without problem. • Standard or HC type input levels are used for the pin 7, 8, and 9 inputs. • If open-collector type circuits are used for the pin 7, 8, and 9 inputs, these circuit will be in the high-impedance state for high level inputs. As a result, chopping circuit noise may cause the input circuits to operate incorrectly. To prevent incorrect operation due to such noise, capacitors with values between 470 and 1000pF must be connected between pins 7 and 11, 8 and 11, and 9 and 11. (A capacitor with a value between 470 and 1000pF must be connected between pins 6 and 11 as well if an open-collector output IC is used for the RESETB pin (pin 6) input.) • Taking the input bias current (IIB) characteristics into account, the resistor RO1 must not exceed 100kΩ. • The following circuit (for a lowered current of over 0.2A) is recommended if the application needs to temporarily lower the motor current. Here, a value of close to 100kΩ must be used for resistor RO1 to make the transistor output saturation voltage as low as possible. 5V 5V RO1 RO1 Vref R3 Vref RO2 R3 RO2 Input Pin Functions (CMOS input levels) Pin Pin No. Function Input conditions when operating CLOCK 9 Reference clock for motor phase current switching Operates on the rising edge of the signal MODE 8 Excitation mode selection Low: 2-phase excitation CWB 7 Motor direction switching Low: CW (forward) RESETB 6 System reset and A, AB, B, and BB outputs cutoff. High: 1-2 phase excitation High: CCW (reverse) A reset is applied by a low level Applications must apply a reset signal for at least 20μs when power is first applied. (1) A simple reset function is formed from D1, CO4, and RO3 in this application circuit. With the CLOCK input held low, when the 5V supply voltage is brought up a reset is applied if the motor output phases A and BB are driven. If the 5V supply voltage rise time is slow (over 50ms), the motor output phases A and BB may not be driven. Increase the value of the capacitor CO4 and check circuit operation again. (2) See the timing chart for the concrete details on circuit operation. No. A2139-5/11 STK672-110-SL-E Usage Notes • 5V system input pins [RESETB and CLOCK 〈〈Input signal timing when power is first applied〉〉] As shown in the timing chart, a RESETB signal input is required by the driver to operate with the timing in which the F1 gate is turned on first. The RESETB signal timing must be set up to have a width of at least 20μs, as shown below. The capacitor CO4 and the resistor RO3 in the application circuit form simple reset circuit that uses the RC time constant rising time. However, when designing the RESETB input based on CMOS levels, the application must have the timing shown in figure 2. Rise of the 5V supply voltage RESETB signal input At least 20μs CLOCK signal At least 10μs Figure 2 RESETB and CLOCK Signals Input Timing See the timing chart for details on the CLOCK, MODE, CWB, and other input pins. [Vref 〈〈Motor current peak value setting〉〉] In the sample application circuit, the peak value of the motor current (IOH) is set by RO1, RO2, and VDD (5V) as described by the formula below. IOH 0 Figure 3 Motor Current IO Flowing into the Driver IC IOH = Vref÷Rs Here, Rs is hybrid IC internal current detection resistor Vref = (RO2÷ (RO1+RO2)) ×5V STK672-110-SL-E: Rs = 0.22Ω • Allowable motor current operating range The motor current (IOH) must be held within the range corresponding to the area under the curve shown in figure 1. For example, if the operating substrate temperature Tc is 105°C, then IOH must be held under IOH = 1.8A, and in hold mode IOH must be held under IOH = 1.5A. No. A2139-6/11 STK672-110-SL-E • Thermal design [Operating range in which a heat sink is not used] The STK672-110-SL-E- package has a structure that uses no screws, and is recommended for use without a heat sink .This section discusses the safe operating range when no heat sink is used. In the maximum ratings specifications, Tc max is specified to be 105°C, and when mounted in an actual end product system, the Tc max value must never be exceeded during operation. Tc can be expressed by formula (A) below, and thus the range for ΔTc must be stipulated so that Tc is always under 105°C. Tc = Ta + ΔTc (A) Ta: Hybrid IC ambient temperature, ΔTc: Temperature increase across the aluminum substrate As shown in figure 6, the value of ΔTc increases as the hybrid IC internal average power dissipation PD increases. As shown in figure 5, PD increases with the motor current. Here we describe the actual PD calculation using the example shown in the motor current timing chart in figure 4. Since there are periods when current flows and periods when the current is off during actual motor operation, PD cannot be determined from the data presented in figure 5. Therefore, we calculate PD assuming that actual motor operation consists of repetitions of the operation shown in figure 4. IO1 Motor phase current (sink side) IO2 -IO1 T1 T2 T3 T0 Figure 4 Motor Current Timing T1: Motor rotation operation time T2: Motor hold operation time T3: Motor current off time T2 may be reduced, depending on the application. T0: Single repeated motor operating cycle IO1 and IO2: Motor current peak values Due to the structure of motor windings, the phase current is a positive and negative current with a pulse form. Note that figure 4 presents the concepts here, and that the on/off duty of the actual signals will differ. The hybrid IC internal average power dissipation PD can be calculated from the following formula. PD = (T1 × P1 + T2 × P2 + T3 × 0) ÷ T0 ------------------------------------------- (I) (Here, P1 is the PD for IO1 and P2 is the PD for IO2) If the value calculated in formula (I) above is under 1.4W, then from figure 6 we see that operation is allowed up to an ambient temperature Ta of 60°C. While the operating range when a heat sink is not used can be determined from formula (I) above, figure 5 is merely asingle example of one operating mode for a single motor. For example, while figure 5 shows a 2-phase excitation motor, if 1-2 phase excitation is used with a 500Hz clock frequency, the drive will be turned off for 25% of the time and the dissipation PD will be reduced to 75% of that in figure 5. It is extremely difficult for calculate the internal average power dissipation PD for all possible end product conditions. After performing the above rough calculations, always install the hybrid IC in an actual end product and verify that the substrate temperature Tc does not rise above 105°C. No. A2139-7/11 STK672-110-SL-E Timing Charts 2-phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB 1-2 phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB No. A2139-8/11 STK672-110-SL-E 1-2 phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB 2-phase excitation→Switch to 1-2 phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB No. A2139-9/11 STK672-110-SL-E Hybrid IC internal average power dissipation, PD -- W Figure 5 Hybrid IC internal average power dissipation, PD - Motor current, IOH PD -- IOH 12 VCC=24V, VDD=5.0V Clock=500Hz Continuous 2-phase excitation operation Motor used: R=0.63Ω L=0.62mH The data are typical values. 11 10 9 8 7 6 5 4 3 2 1 0 0 0.5 1.0 1.5 2.0 2.5 3.0 Motor current, IOH -- A Figure 6 Substrate temperature rise, ΔTc - Hybrid IC internal average power dissipation, PD ∆Tc -- PD Substrate temperature rise, ∆Tc -- °C 80 With no heat sink, the IC vertical, and convection cooling 70 60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 Hybrid IC internal average power dissipation, PD -- W No. A2139-10/11 STK672-110-SL-E ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PS No. A2139-11/11
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