0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
2N7002

2N7002

  • 厂商:

    SECOS

  • 封装:

  • 描述:

    2N7002 - Small Signal MOSFET - SeCoS Halbleitertechnologie GmbH

  • 数据手册
  • 价格&库存
2N7002 数据手册
2N7002 Elektronische Bauelemente 115 mAMPS, 60VOLTS, RDS(on)=7.5 Small Signal MOSFET RoHS Compliant Product Small Signal MOSFET 115 mAmps, 60 Volts N–Ch an n el SOT–23 MAXIMUM RATINGS Rating Drain–Source Voltage Drain–Gate Voltage (RGS = 1.0 MΩ) Drain Current – Continuous TC = 25°C (Note 1.) – Continuous TC = 100°C (Note 1.) – Pulsed (Note 2.) Gate–Source Voltage – Continuous – Non–repetitive (tp ≤ 50 µs) Symbol VDSS VDGR ID ID IDM Value 60 60 ±115 ±75 ±800 Unit Vdc Vdc mAdc N–Channel VGS VGSM ±20 ±40 Vdc Vpk THERMAL CHARACTERISTICS Characteristic Total Device Dissipation FR–5 Board (Note 3.) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(Note 4.) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol PD Max 225 1.8 556 300 2.4 RθJA TJ, Tstg 417 –55 to +150 °C/W °C Unit mW mW/°C °C/W mW mW/°C 3 1 2 2 RθJA PD SOT–23 CASE 318 STYLE 21 MARKING DIAGRAM & PIN ASSIGNMENT Drain 3 1. The Power Dissipation of the package may result in a lower continuous drain current. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. 3. FR–5 = 1.0 x 0.75 x 0.062 in. 4. Alumina = 0.4 x 0.3 x 0.025 in 99.5% alumina. 1 025D −− 2 Gate 5 = Y ear 2005 D = Weeks A~z Source 02 = Device Code 7002 http://www.SeCoSGmbH.com Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 5 2N7002 Elektronische Bauelemente 115 mAMPS, 60VOLTS, RDS(on)=7.5 W Small Signal MOSFET ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0, ID = 10 µAdc) Zero Gate Voltage Drain Current (VGS = 0, VDS = 60 Vdc) Gate–Body Leakage Current, Forward (VGS = 20 Vdc) Gate–Body Leakage Current, Reverse (VGS = –20 Vdc) TJ = 25°C TJ = 125°C V(BR)DSS IDSS IGSSF IGSSR 60 – – – – – – – – – – 1.0 500 100 –100 Vdc µAdc nAdc nAdc ON CHARACTERISTICS (Note 2.) Gate Threshold Voltage (VDS = VGS, ID = 250 µAdc) On–State Drain Current (VDS ≥ 2.0 VDS(on), VGS = 10 Vdc) Static Drain–Source On–State Voltage (VGS = 10 Vdc, ID = 500 mAdc) (VGS = 5.0 Vdc, ID = 50 mAdc) Static Drain–Source On–State Resistance (VGS = 10 V, ID = 500 mAdc) TC = 25°C TC = 125°C (VGS = 5.0 Vdc, ID = 50 mAdc) TC = 25°C TC = 125°C Forward Transconductance (VDS ≥ 2.0 VDS(on), ID = 200 mAdc) VGS(th) ID(on) VDS(on) – – rDS(on) – – – – gFS 80 – – – – – 7.5 13.5 7.5 13.5 – mmhos – – 3.75 0.375 Ohms 1.0 500 – – 2.5 – Vdc mA Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0, f = 1.0 MHz) Output Capacitance (VDS = 25 Vdc, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance (VDS = 25 Vdc, VGS = 0, f = 1.0 MHz) Ciss Coss Crss – – – – – – 50 25 5.0 pF pF pF SWITCHING CHARACTERISTICS (Note 2.) Turn–On Delay Time Turn–Off Delay Time (VDD = 25 Vdc, ID ^ 500 mAdc, Vdc, 500 mAdc, RG = 25 Ω, RL = 50 Ω, Vgen = 10 V) td(on) td(off) – – – – 20 40 ns ns BODY–DRAIN DIODE RATINGS Diode Forward On–Voltage (IS = 11.5 mAdc, VGS = 0 V) Source Current Continuous (Body Diode) Source Current Pulsed 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%. VSD IS ISM – – – – – – –1.5 –115 –800 Vdc mAdc mAdc http://www.SeCoSGmbH.com Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 5 2N7002 Elektronische Bauelemente 115 mAMPS, 60VOLTS, RDS(on)=7.5 W Small Signal MOSFET TYPICAL ELECTRICAL CHARACTERISTICS 2.0 1.8 I D, DRAIN CURRENT (AMPS) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 VDS, DRAIN SOURCE VOLTAGE (VOLTS) TA = 25°C I D, DRAIN CURRENT (AMPS) VGS = 10 V 9V 8V 7V 6V 5V 4V 3V 9.0 10 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 VGS, GATE SOURCE VOLTAGE (VOLTS) 9.0 10 0.8 0.6 0.4 0.2 1.0 VDS = 10 V -55°C 125°C 25°C Figure 1. Ohmic Region Figure 2. Transfer Characteristics r DS(on) , STATIC DRAIN-SOURCE ON-RESISTANCE (NORMALIZED) VGS(th) , THRESHOLD VOLTAGE (NORMALIZED) 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -60 -20 +20 +60 T, TEMPERATURE (°C) +100 +140 VGS = 10 V ID = 200 mA 1.2 1.05 1.1 1.10 1.0 0.95 0.9 0.85 0.8 0.75 0.7 -60 -20 +20 +60 T, TEMPERATURE (°C) +100 +140 VDS = VGS ID = 1.0 mA Figure 3. Temperature versus Static Drain–Source On–Resistance Figure 4. Temperature versus Gate Threshold Voltage http://www.SeCoSGmbH.com Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 5 2N7002 Elektronische Bauelemente 115 mAMPS, 60VOLTS, RDS(on)=7.5 W Small Signal MOSFET INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.037 0.95 interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Cladt. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. http://www.SeCoSGmbH.com • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 5 2N7002 Elektronische Bauelemente 115 mAMPS, 60VOLTS, RDS(on)=7.5 W Small Signal MOSFET PACKAGE DIMENSIONS SOT–23 (TO–236) CASE 318–08 ISSUE AF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 3 1 2 BS V G C D H K J DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN http://www.SeCoSGmbH.com Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 5 of 5
2N7002 价格&库存

很抱歉,暂时无法提供与“2N7002”相匹配的价格&库存,您可以联系我们找货

免费人工找货
2N7002
  •  国内价格
  • 1+0.08546
  • 100+0.07976
  • 300+0.07406
  • 500+0.06836
  • 2000+0.06552
  • 5000+0.06381

库存:18476

2N7002
  •  国内价格
  • 1+0.0756
  • 30+0.0729
  • 100+0.0702
  • 500+0.0648
  • 1000+0.0621
  • 2000+0.06048

库存:0

2N7002
  •  国内价格
  • 20+0.08016
  • 200+0.07536
  • 500+0.07056
  • 1000+0.06576
  • 3000+0.06336
  • 6000+0.06

库存:2992

2N7002
  •  国内价格
  • 1+0.048
  • 100+0.0448
  • 300+0.0416
  • 500+0.0384
  • 2000+0.0368
  • 5000+0.03584

库存:2320

2N7002
  •  国内价格
  • 20+0.03875
  • 200+0.03625
  • 500+0.03375
  • 1000+0.03125
  • 3000+0.03
  • 6000+0.02825

库存:1932

2N7002
  •  国内价格
  • 50+0.11897
  • 500+0.10708
  • 5000+0.09914
  • 10000+0.09518
  • 30000+0.09121
  • 50000+0.08883

库存:0

2N7002
  •  国内价格
  • 20+0.06846
  • 200+0.06436
  • 500+0.06026
  • 1000+0.05616
  • 3000+0.05411
  • 6000+0.05124

库存:4686

2N7002
  •  国内价格
  • 50+0.06625
  • 500+0.05962
  • 5000+0.05521
  • 10000+0.053
  • 30000+0.05079
  • 50000+0.04946

库存:114