SSD9973
Elektronische Bauelemente 14A, 60V,RDS(ON)80 mΩ N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product
Description
TO-252
The SSD9973 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-252 is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications
such as DC/DC converters.
Featur es
* Low Gate Charge
* Simple Drive Requirement
D
REF. A B C D E F S
G
S
Millimeter Min. Max. 6.40 6.80 5.20 5.50 6.80 7.20 2.20 2.80 2.30 REF. 0.70 0.90 0.60 0.90
REF. G H J K L M R
Millimeter Min. Max. 0.50 0.70 2.20 2.40 0.45 0.55 0 0.15 0.90 1.50 5.40 5.80 0.80 1.20
Absolute Maximum Ratings
Parameter
Drain-Source Voltage Gate-Source Voltage Continuous Drain Current,VGS@10V Continuous Drain Current,VGS@10V Pulsed Drain Current
1
Symbol
VD S VG S ID@TC=25 C ID@TC=100C I DM PD@TC=25 C
o o o
Ratings
60
± 20 14 9 40 27 0.22
Unit
V V A A A W
W/ C
o o
Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range
Tj, Tstg
-55~+150
C
Thermal Data
Parameter
Thermal Resistance Junction-case Thermal Resistance Junction-ambient
Symbol Max. Max.
Rthj-c Rthj-a
Ratings
4.5 110
o o
Unit
C /W C /W
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Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 1 of 4
SSD9973
Elektronische Bauelemente 14A, 60V,RDS(ON)80 mΩ N-Channel Enhancement Mode Power Mos.FET
Electrical Characteristics( Tj=25 C Unless otherwise specified)
Parameter
Drain-Source Breakdown Vol tage Breakdown Voltage Temp. Co efficient Gate Threshold Voltage Gate-Source Leakage Curren t Drain-Source Leakage Curren t (Tj=25 C ) Drain-Source Leakage Curren t(Tj=150C) Static Drain-Source On-Resist ance
o o
o
Symbol
BVDSS BVDS/ Tj VGS(th) IGSS IDSS
Min.
60
_
Typ.
_
Max.
_
Unit
V V/ C V nA uA uA
o
Test Condition
VGS=0V, ID=250uA Reference to 25 C, ID=1mA VDS=VGS, ID=250uA VGS=±20V VDS=60V,VGS=0 VDS=48V,VGS=0 VGS=10V, ID=9A VGS=4.5V, ID=6 A
o
0.05
_ _ _ _ _ _
_
1.0
_ _ _ _
3.0
±100
1 25 80 100
13
_ _
RD S ( O N ) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs
_ _ _ _ _ _ _ _ _ _ _
mΩ
Total Gate Charge2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance
8 3 4 7 15 16 3 720 77 45 8.6
nC
ID=9 A VDS=48V VGS= 4.5V
_
_ _ _
VDD=30V ID=9 A nS VGS=10V RG=3.3Ω RD=3. 3Ω
1150
_ _
pF
VGS=0V VDS=25V f=1.0MHz
_
_
S
VDS=10V, ID=9 A
Source-Drain Diode
Parameter
Forward On Voltage 2 Reverse Recovery Time
Reverse Recovery Change
Symbol
VSD Trr
Min.
_ _
Typ.
_
Max.
1.2
_ _
Unit
V nS nC
Test Condition
IS=14 A, VGS=0V. IS=9 A, VGS=0V. dl/dt=100A/us
28
27
Qrr
_
Notes: 1.Pulse width limited by Max. junction temperature. 2. Pulse width≦300us, dutycycle≦2%.
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Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of 4
SSD9973
Elektronische Bauelemente 14A, 60V,RDS(ON)80 mΩ N-Channel Enhancement Mode Power Mos.FET
Characteristics Curve
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
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Fig 5. Forward Characteristics of Reverse Diode
Fig 6. Gate Threshold Voltage v.s. Junction Temperature
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 3 of 4
SSD9973
Elektronische Bauelemente 14A, 60V,RDS(ON)80 mΩ N-Channel Enhancement Mode Power Mos.FET
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
Fig 11. Switching Time Waveform
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Fig 12. Gate Charge Waveform
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 4 of 4
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