SSG4841P
Elektronische Bauelemente -9.0 A, -40 V, RDS(ON) 35 m P-Ch Enhancement Mode Power MOSFET
RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free
DESCRIPTION
These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management In portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. SOP-8
B
L
D M
FEATURES
A
C N J
K
Low RDS(on) provides higher efficiency and extends battery life. Low thermal impedance copper leadframe SOIC-8 saves board space. Fast switching speed. High performance trench technology.
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E
REF. A B C D E F G
PACKAGE INFORMATION
Package SOP-8 MPQ 2.5K LeaderSize 13’ inch
Millimeter Min. Max. 5.80 6.20 4.80 5.00 3.80 4.00 0° 8° 0.40 0.90 0.19 0.25 1.27 TYP.
REF. H J K L M N
Millimeter Min. Max. 0.35 0.49 0.375 REF. 45° 1.35 1.75 0.10 0.25 0.25 REF.
S S S G
D D D D
MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 1 Pulsed Drain Current 2 Continuous Source Current (Diode Conduction) Total Power Dissipation 1 Operating Junction & Storage Temperature Range t≦10 sec Steady State
1
Symbol VDS VGS ID @ TA = 25°C ID @ TA = 70°C IDM IS PD @ TA = 25°C PD @ TA = 70°C TJ, TSTG Thermal Resistance Ratings
Ratings -40 ±20 -9.0 -7.3 ±50 -2.1 3.1 2.6 -55 ~ 150 50 92
Unit V V A A A A W W °C °C / W °C / W
Thermal Resistance Junction-ambient (Max.) 1
RθJA
Notes: 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature.
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
31-Dec-2010 Rev. B
Page 1 of 2
SSG4841P
Elektronische Bauelemente -9.0 A, -40 V, RDS(ON) 35 m P-Ch Enhancement Mode Power MOSFET
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter Symbol Min. Typ. Static Gate Threshold Voltage Gate-Body Leakage Current Zero Gate Voltage Drain Current On-State Drain Current
1
Max.
Unit
Teat Conditions
VGS(th) IGSS IDSS ID(on) RDS(ON) gfs VSD
-1 -50 -
31 -0.7 Dynamic
2
±100 -1 -5 35 45 -
V nA μA μA A mΩ S V
VDS= VGS, ID= -250μA VDS= 0V, VGS= ±25V VDS= -24V, VGS= 0V VDS= -24V, VGS= 0V, TJ=55°C VDS= -5V, VGS= -10V VGS= -10V, ID= -9.0A VGS= -4.5V, ID= -7.2A VDS= -15V, ID= -9.0A IS= -2.1A, VGS= 0V
Drain-Source On-Resistance 1 Forward Transconductance Diode Forward Voltage
1
Total Gate Charge Gate-Source Charge Gate-Drain(“Miller”) Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time
Qg Qgs Qgd Td(on) Tr Td(off) Tf
-
15.3 5.2 5.8 15 12 62 46
nS nC
ID= -9.0A VDS= -15V VGS= -4.5V
VDD= -15V, ID= -1A VGEN= -10V, RL= 15Ω RG= 6Ω
Notes: 1. Pulse test:PW ≦ 300μs duty cycle ≦ 2%. 2. Guaranteed by design, not subject to production testing.
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
31-Dec-2010 Rev. B
Page 2 of 2
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