SSG9962

SSG9962 Elektronische Bauelemente 7A, 40V,RDS(ON) 25mΩ N-Channel Enhancement Mode Power Mos.FET RoHS Compliant Product SOP-8 Description 0.40 0.90 0.19 0.25 The SSG9962 provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. 45 6.20 5.80 0.25 o 0.375 REF 3.80 4.00 0.35 0.49 1.27Typ. 4.80 5.00 0.10~0.25 Features * Simple Drive Requirement * Lower On-Resistance 0 o 8 o 1.35 1.75 Dimensions in millimeters D1 8 D1 7 D2 6 D2 5 D1 Date Code D2 9962SS G1 1 S1 2 G1 3 S2 4 G2 G2 S1 S2 Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS@10V Continuous Drain Current, VGS@10V Pulsed Drain Current 1 3 3 Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 C o o o Ratings 40 ±20 7 5.5 20 2 0.016 Unit V V A A A W W/ C o o Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-ambient 3 Symbol Max. Rthj-a Ratings 62.5 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 4 SSG9962 Elektronische Bauelemente 7A, 40V,RDS(ON) 25mΩ N-Channel Enhancement Mode Power Mos.FET Electrical Characteristics( Tj=25 oC Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70oC) Static Drain-Source On-Resistance2 Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. 40 _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA Test Condition VGS=0V, ID=250uA Reference to 25oC, ID=1mA VDS=VGS, ID=250uA VGS=± 20V VDS=40V,VGS=0 VDS=32V,VGS=0 VGS=10V, ID=7A VGS=4.5V, ID=5 A 0.1 _ _ _ _ _ _ 1.0 _ _ _ _ 3.0 ±100 1 25 25 40 _ _ _ RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs _ _ _ _ _ _ _ _ _ _ _ mΩ Total Gate Charge 2 25.8 4.4 9.1 10.6 6.8 26.3 12 1165 205 142 11 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance nC ID= 7 A VDS=32V VGS= 10V _ _ _ _ VDD=20V ID=1A nS VGS=10 V RG=5.7Ω RD=20 Ω _ _ _ pF VGS=0V VDS= 25V f=1.0MHz _ _ S VDS=10V, ID=7A Source-Drain Diode Parameter Forward On Voltage 2 Symbol VSD Min. _ _ Typ. _ Max. 1 .2 _ Unit V Test Condition IS=1.7A, VGS=0V. Is= 7A, V GS=0V dl/dt=100A/us Reverse Recovery Time 2 Trr Qrr 2 1.2 nS Reverse Recovery Charge _ 16 _ nC Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width≦300us, dutycycle≦2%. 3.Surface mounted on 1 inch2 copper pad of FR4 board;135 °C/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 4 SSG9962 Elektronische Bauelemente 7A, 40V,RDS(ON) 25mΩ N-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature http://www.SeCoSGmbH.com/ Fig 5. Forward Characteristics of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 4 SSG9962 Elektronische Bauelemente 7A, 40V,RDS(ON) 25mΩ N-Channel Enhancement Mode Power Mos.FET GND Description Typic ally a large stor age c apacitor is c onnec ted fr om this pin to gr ound to ins ur e that the input 1.3V or open= output enable. NC tage does not s ag below the minimum dr opout voltage during the load V higher than Vout in or der f or the devic e to Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Circuit Fig 12. Gate Charge Circuit http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 4