SSPS7333P

SSPS7333P Elektronische Bauelemente -10.9 A , -30 V , RDS(ON) 20 mΩ P-Ch Enhancement Mode Power MOSFET RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free DESCRIPTION These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. DFN3x3-8PP B D C FEATURES Low RDS(on) provides higher efficiency and extends battery life Low thermal impedance copper leadframe DFN3x3-8PP saves board space Fast switching speed High performance trench technology e E θ A d b g APPLICATION DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. F G PACKAGE INFORMATION Package DFN3x3-8PP MPQ 3K Leader Size 13 inch Top View REF. A B C D E F G Millimeter Min. Max. 0.70 0.90 3.00BSC 0.10 0.25 1.80 2.3 3.2BSC 0.01 0.02 2.35BSC REF. θ b d e g Millimeter Min. Max. 0° 12° 0.20 0.40 0.65BSC 3.00BSC 0.70(TYP.) MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current 2 1 Symbol VDS VGS TA = 25° C TA = 70° C TA = 25° C TA = 70° C ID IDM Ratings -30 ±20 -10.9 -8.9 -50 3.5 2.0 -55~150 Unit V V A A A W W ° C Total Power Dissipation 1 PD TJ, TSTG Operating Junction & Storage Temperature Range Thermal Resistance Ratings Thermal Resistance Junction-Ambient (Max.) 1 t ≦ 10 sec Steady State RθJA 35 81 ° /W C ° /W C Notes: 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature. http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 19-Jul-2011 Rev. A Page 1 of 2 SSPS7333P Elektronische Bauelemente -10.9 A , -30 V , RDS(ON) 20 mΩ P-Ch Enhancement Mode Power MOSFET ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Gate-Threshold Voltage Gate-Body Leakage Current Zero Gate Voltage Drain Current Symbol VGS(th) IGSS IDSS Min. -1 - Typ. Static -0.8 Max. ±100 -1 Unit V nA µA Teat Conditions VDS=VGS, ID= -250µA VDS=0, VGS= ±25V VDS= -24V, VGS=0 VDS= -24V, VGS=0, TJ=55° C -5 20 m 36 2 Drain-Source On-Resistance Diode Forward Voltage 1 RDS(ON) VSD VGS= -10V, ID= -10A VGS= -4.5V, ID= -8A - V IS=2.5A, VGS=0 Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Qg Qgs Qgd Td(on) Tr Td(off) Tf 33 5 9 10 6 34 20 nS nC VDS= -15 V, VGS= -5 V, ID= -11.5 A VDD= -15V ID= -1A VGEN= -10V RL=6 Notes: 1. Pulse test：PW ≦ 300µs duty cycle ≦ 2%. 2. Guaranteed by design, not subject to production testing. http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 19-Jul-2011 Rev. A Page 2 of 2