STT3470N

STT3470N Elektronische Bauelemente 2.2 A, 100 V, RDS(ON) 280 m N-Channel Enhancement Mode Mos.FET RoHS Compliant Product A suffix of “-C” specifies halogen and lead-free DESCRIPTION These miniature surface mount MOSFETs utilize a High Cell Density trench process to provide Low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. F A E 6 5 4 TSOP-6 L B 1 2 3 C K H J FEATURES  DG    Low RDS(on) provides higher efficiency and extend battery life Low thermal impedance copper leadframe TSOP-6 saves board space Fast switching speed High performance trench technology REF. A B C D E F Millimeter Min. Max. 2.70 3.10 2.60 3.00 1.40 1.80 1.10 MAX. 1.90 REF. 0.30 0.50 REF. G H J K L Millimeter Min. Max. 0 0.10 0.60 REF. 0.12 REF. 0° 10° 0.95 REF. PACKAGE INFORMATION Package TSOP-6 MPQ 3K LeaderSize 7’ inch D D G D D S ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 1 Pulsed Drain Current 2 Continuous Source Current (Diode Conduction) 1 Power Dissipation 1 Operating Junction and Storage Temperature Range Symbol VDS VGS ID IDM IS PD Tj, Tstg Ratings 100 ±20 2.2 ±10 1.1 2 -55 ~ 150 Unit V V A A A W °C TA= 25°C TA= 25°C Thermal Resistance Ratings Parameter Maximum Junction to Ambient 1 Notes 1. Surface Mounted on 1” x 1” FR4 Board. Pulse width limited by maximum junction temperature. Symbol t ≦ 10 sec Steady State Typ. 93 130 Max. 110 150 Unit °C / W RJA 2. http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 30-Dec-2010 Rev. A Page 1 of 2 STT3470N Elektronische Bauelemente 2.2 A, 100 V, RDS(ON) 280 m N-Channel Enhancement Mode Mos.FET ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current 1 Drain-Source On-Resistance 1 Forward Transconductance 1 Diode Forward Voltage Symbol Min. VGS(th) IGSS IDSS ID(on) RDS(ON) gfs VSD 1 10 - Typ. Max. 11.3 0.75 ±100 1 10 280 Unit V nA A A mΩ Test Conditions VDS=VGS, ID= 250uA VDS= 0V, VGS= ±8V VDS= 80V, VGS= 0V VDS= 80V, VGS= 0V, TJ= 55°C VDS = 5V, VGS= 10V VGS= 10V, ID= 2.2A VGS= 5.5V, ID= 2A 355 S V VDS= 10V, ID= 2.2A IS= 1.6A, VGS= 0V Dynamic 2 Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Notes： 1. 2. Pulse test：PW ≦ 300 us duty cycle ≦ 2%. Guaranteed by design, not subject to production testing. Qg Qgs Qgd Td(on) Tr Td(off) Tf - 7.0 1.1 20 8 24 35 10 nS VDD= 10V, VGEN= 4.5V, RL= 15, ID= 1A nC VDS= 10V, VGS= 5.5V, ID= 2.2A http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 30-Dec-2010 Rev. A Page 2 of 2