STT6405

STT6405 Elektronische Bauelemente -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET TSOP-6 RoHS Compliant Product A suffix of “-C” specifies halogen and lead-free DESCRIPTION The STT6405 uses advanced trench technology to provide excellent on-resistance with low gate change. The device is suitable for use as a load switch or in PWM applications. A E L B FEATURES P-Channel Lower Gate Charge Small Footprint & Low Profile Package F DG K C H J MARKING CODE D 6 D5 S 4 Drain 1256 78 3 Gate REF. A B C D E F 6405 = Date Code D1 D 2 G 3 4 Source Millimeter Min. Max. 2.70 3.10 2.60 3.00 1.40 1.80 1.10 MAX. 1.90 REF. 0.30 0.50 REF. G H J K L Millimeter Min. Max. 0 0.10 0.60 REF. 0.12 REF. 0° 10° 0.95 REF. ABSOLUTE MAXIMUM RATINGS PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 1 3 SYMBOL VDS VGS ID @TA=25℃ ID @TA=70℃ IDM PD @TA=25℃ Tj, Tstg RθJA RATINGS -30 ±20 -5.0 -4.2 -20 2 0.016 -55 ~ +150 62.5 UNIT V V A A W W/ ℃ ℃ ℃/ W Pulsed Drain Current Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range 3 Thermal Resistance- Junction to Ambient Max. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) PARAMETER Drain-Source Breakdown Voltage Gate Threshold Voltage Forward Transconductance Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25℃) Drain-Source Leakage Current (Tj=55℃) Static Drain-Source On-Resistance Total Gate Charge Gate-Source Charge Gate-Drain (“Miller”) Charge 2 Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Forward On Voltage 2 Reverse Recovery Time Reverse Recovery Charge Notes: 2 2 2 SYMBOL BVDSS VGS(th) gfs IGSS MIN TYP M AX UNIT -30 -1.0 8.6 V V S nA µA m nC TEST CONDITIONS VGS = 0, ID= -250 µA VDS = VGS, ID= -250µA VDS = -5V, ID = -5.0A VGS = ±20 V VDS = -30 V, VGS = 0 VDS = -24 V, VGS = 0 VGS = -10 V, ID = -5.0 A VGS = -4.5 V, ID = -4.0 A ID = -5.0 A VDS = -15 V VGS = -10 V VDS = -15 V VGS = -10 V RG = 3 RL = 3 VGS = 0 V VDS = -15 V f = 1.0 MHz f=1.0 MHz IS = -1.0 A, VGS= 0 V IS = -5.0A, VGS=0V, dl/dt= 100A/µs -3.0 ±100 -1 IDSS -5 50 RDS(ON) 75 Qg 14.7 18 Qgs 2 Qgd 3.8 Td(on) 8.3 Tr 5 Td(off) 29 Tf 14 Ciss 700 840 Coss 120 Crss 75 Rg 10 SOURCE-DRAIN DIODE VSD -1.0 Trr 23.5 Qrr 13.4 - ns pF V ns nC 1. Pulse width limited by Max. junction temperature. 2. Pulse width≦300µs, duty cycle≦2%. 3. Surface mounted on 1 in2 copper pad of FR4 board; 156℃/W when mounted on Min. copper pad. Page 1 of 3 28-Oct-2009 Rev. B STT6405 Elektronische Bauelemente -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET CHARACTERISTIC CURVES 28-Oct-2009 Rev. B Page 2 of 3 STT6405 Elektronische Bauelemente -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET CHARACTERISTIC CURVES 28-Oct-2009 Rev. B Page 3 of 3