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SZMD12C

SZMD12C

  • 厂商:

    SECOS

  • 封装:

  • 描述:

    SZMD12C - Transient Voltage Suppressors for ESD Protection - SeCoS Halbleitertechnologie GmbH

  • 数据手册
  • 价格&库存
SZMD12C 数据手册
SZMD12C Elektronische Bauelemente 150W, 12 V Transient Voltage Suppressors for ESD Protection RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free FEATURES SOT-23 package for surface mount application Protects 12V components Protects two unidirectional line or one bi-direction line Provides electrically is olated protection K SOT-23 A L 3 3 Top View 1 2 CB 1 2 E D APPLICATIONS Cellular Handsets and Accessories Portable devices Industrial Controls Set -Top Box Servers, Notebook, and Desktop PC 1 3 F REF. A B C D E F G Millimeter Min. Max. 2.80 3.00 2.25 2.55 1.20 1.40 0.90 1.15 1.80 2.00 0.30 0.50 H REF. G H J K L J Millimeter Min. Max. 0.10 REF. 0.55 REF. 0.08 0.15 0.5 REF. 0.95 TYP. Marking Code KDJ 2 ABSOLUTE RATINGS (Tamb = 25°C ) Rating IEC 61000-4-2 (ESD) Air contact Contact discharge ESD voltage Per human body model Total power dissipation on FR-5 Board (Note 1) @ TA=25℃ Junction and storage temperature range Lead solder temperature – maximum (10 Second duration) Symbol Value ±15 ±8 16 150 -55 ~ +150 260 Units kV kV kV m/W °C °C PD TJ, TSTG TL Stresses exceeding Maximum Ratings may damage the device. Maximum Rating are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR-5 = 1.0*0.75*0.62 in. ELECTRICAL CHARACTERISTICS (Ratings at 25°C ambient temperature unless otherwise specified. VF = 0.9V at IF = 10mA) IPP VC (V) VBR (V) VRWM IR(uA) IT PPK @ Max IPP (A) Device (V) @ VRWM @ IT (Note 2) (mA) (W)* (Note 3) (Note 3) C (pF) (Note 4) SZMD12C Max 12 Max 0.1 Min 13.8 mA 5.0 Max 25.0 Max 8.0 Max 150 Typ 50 Other voltages available upon request. 2. VBR is measured with a pulse test current IT at an ambient temperature of 25℃ 3. Surge current waveform per Figure 3. 4. Measured at 1MHz 0V. http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 01-June-2002 Rev. A Page 1 of 2 SZMD12C Elektronische Bauelemente 150W, 12 V Transient Voltage Suppressors for ESD Protection RATINGS AND CHARACTERISTICS CURVES Clamping Voltage vs. Peak Pulse Current 30 25 Clamping Voltage - VC (V) 20 15 10 5 0 0 2 4 6 8 10 Peak Pulse Current - IPP (A) Waveform Parameters tr = 8µs td = 20µS Power Derating Curve 110 100 % of Rated Power or I PP 90 80 70 60 50 40 30 20 10 0 0 25 50 75 100 125 150 Ambient Temperature - TA ( o C) 110 100 90 80 Pulse Waveform Wave form Paramete rs: tr = 8 s td = 20 s e -t Applications Information Device Connection Options The SZMD series is designed to protect one bi-directional or two uni-directional data or l/O lines operating at 12 volts.Connection options are as follows: ‧Bidirectional:Pin 1 is connected to the data line and pin 2 is connected to ground (Since the device lls symmetrical,these conmtions may be re- Ver3ed).For best results,the ground connection should be made directly to a ground plane on the board.The path length should be kept as short as possible to minimize parasitic inductance-Pin 3 is not connected. ‧Unidirectional:Data lines are connected to pin1 and pin2.Pin 3 is connected to ground.For best results,this pin should be connected directly to a ground plane on the board.The path lengh should be kept as short as possible to minimize parasitic inductance. Circuit Board Layout Recommendations for suppres- sion of ESD. Good circuit board layout is critical for the suppression of fast rise-time transients such as ESD.The following guidelines are recommended (Refer to application note Sl99.01 for more detailed information): ‧Place the TVS near the input terminals or connec- tors to restrict transient coupling. ‧Minimize the path length between the TVS and the protected line. ‧Minimize all conductive loops including power and ground loops. ‧The ESD transient return path toground should be kept as short as possible. ‧Never run critical signals near board edges ‧Use ground planes whenever possib|e. Percent of I PP 70 60 50 40 30 20 10 0 0 5 10 td = I PP /2 15 20 25 30 Time (us) http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. 01-June-2002 Rev. A Page 2 of 2
SZMD12C 价格&库存

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