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SFD30N06

SFD30N06

  • 厂商:

    SEMIWELL

  • 封装:

  • 描述:

    SFD30N06 - N-Channel MOSFET - SemiWell Semiconductor

  • 详情介绍
  • 数据手册
  • 价格&库存
SFD30N06 数据手册
PRELIMINARY SemiWell Semiconductor SFD30N06 N-Channel MOSFET Features ■ ■ ■ ■ ■ Low RDS(on) (0.04Ω )@VGS=10V Gate Charge (Typical 27nC) Improved dv/dt Capability 100% Avalanche Tested Maximum Junction Temperature Range (150°C) Symbol ● 2. Drain 1. Gate ◀ ● ● ▲ 3. Source General Description This Power MOSFET is produced using SemiWell’s advanced planar stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a low gate charge with superior switching performance, and rugged avalanche characteristics. This Power MOSFET is well suited for synchronous DC-DC Converters and Power Management in portable and battery operated products. D-PACK (TO-252) 2 1 3 Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS dv/dt PD TSTG, TJ TL Drain to Source Voltage Continuous Drain Current(@TC = 25°C) Continuous Drain Current(@TC = 100°C) Drain Current Pulsed Gate to Source Voltage Single Pulsed Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation(@TA = 25 °C) Total Power Dissipation(@TC = 25 °C) Derating Factor above 25 °C Operating Junction Temperature & Storage Temperature Maximum Lead Temperature for soldering purpose, 1/8 from Case for 5 seconds. (Note 2) (Note 3) (Note 1) Parameter Value 60 23 15 92 ±20 430 7.0 2.5 44 0.35 - 55 ~ 150 300 Units V A A A V mJ V/ns W W W/°C °C °C Thermal Characteristics Symbol RθJC RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Value Min. - Typ. - Max. 2.85 110 Units °C/W °C/W December, 2002. Rev. 0. Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. 1/7 SFD30N06 Electrical Characteristics Symbol Off Characteristics BVDSS Δ BVDSS/ Δ TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature coefficient Zero Gate Voltage Drain Current Gate-Source Leakage, Forward Gate-Source Leakage, Reverse VGS = 0V, ID = 250uA ID = 250uA, referenced to 25 °C VDS = 60V, VGS = 0V VDS = 48V, TC = 150 °C VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VDS = VGS, ID = 250uA VGS =10 V, ID = 11.5A 60 0.062 1 10 100 -100 V V/°C uA uA nA nA ( TC = 25 °C unless otherwise noted ) Parameter Test Conditions Min Typ Max Units IGSS On Characteristics VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-state Resistance 2.0 0.029 4.0 0.04 V Ω Dynamic Characteristics Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance VGS =0 V, VDS =25V, f = 1MHz 930 290 75 1210 380 100 pF Dynamic Characteristics Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge(Miller Charge) VDS =48V, VGS =10V, ID =30A ※ see fig. 12. (Note 4, 5) VDD =30V, ID =15A, RG =50Ω ※ see fig. 13. (Note 4, 5) 15 25 60 40 27 6.2 11.1 40 60 130 90 35 nC ns - Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr Parameter Continuous Source Current Pulsed Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions Integral Reverse p-n Junction Diode in the MOSFET IS =23A, VGS =0V IS=30A,VGS=0V,dIF/dt=100A/us Min. - Typ. 45 65 Max. 23 92 1.5 - Unit. A V ns nC ※ NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L = 950uH, IAS =23A, VDD = 25V, RG = 0Ω , Starting TJ = 25°C 3. ISD ≤ 30A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2% 5. Essentially independent of operating temperature. 2/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. SFD30N06 Fig 1. On-State Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V Bottom : 5.0 V Top : Fig 2. Transfer Characteristics ID, Drain Current [A] 10 1 ID, Drain Current [A] 10 1 150 C 25 C -55 C o o o ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 25V 2. 250µ s Pulse Test 10 -1 10 0 10 0 10 1 10 0 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Fig 3. On Resistance Variation vs. Drain Current and Gate Voltage 100 Fig 4. On State Current vs. Allowable Case Temperature RDS(ON), Drain-Source On-Resistance[mΩ ] VGS = 10V 60 VGS = 20V 40 IDR[A], Reverse Drain Current 80 10 1 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test 20 ※ Note : TJ = 25℃ 0 0 20 40 60 80 100 120 140 10 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ID, Drain Current [A] VSD[V], Source-Drain voltage Fig 5. Capacitance Characteristics 2000 Ciss=Cgs+Cgd(Cds=shorted) Coss=Cds+Cgd Crss=Cgd Fig 6. Gate Charge Characteristics 12 VGS, Gate-Source Voltage [V] 10 VDS = 30V VDS = 48V 1500 Capacitance [pF] 1000 Ciss ※ Notes : 1. VGS = 0V 2. f=1MHz 8 6 500 Coss Crss 4 2 ※ Note : ID = 30.0 A 0 0 5 10 15 20 25 30 35 0 0 5 10 15 20 25 30 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] 3/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. SFD30N06 Fig 7. Breakdown Voltage Variation vs. Junction Temperature 1.2 2.5 Fig 8. On-Resistance Variation vs. Junction Temperature BVDSS, (Normalized) Drain-Source Breakdown Voltage RDS(ON), (Normalized) Drain-Source On-Resistance 2.0 1.1 1.5 1.0 1.0 0.9 ※ Notes : 1. VGS = 0 V 2. ID = 250 µ A 0.5 ※ Notes : 1. VGS = 10 V 2. ID = 11.5 A 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Fig 9. Maximum Safe Operating Area 10 3 Fig 10. Maximum Drain Current vs. Case Temperature 25 Operation in This Area is Limited by R DS(on) 2 20 ID, Drain Current [A] 10 100 µs 1 ms 10 1 ID' Drain Current [A] 2 15 10 ms DC 10 10 0 ※ Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 5 10 -1 0 -1 10 10 0 10 1 10 25 50 75 100 o 125 150 VDS, Drain-Source Voltage [V] TC' Case Temperature [ C] Fig 11. Transient Thermal Response Curve D = 0 .5 Zθ JC Thermal Response (t), 10 0 0 .2 0 .1 0 .0 5 10 -1 0 .0 2 0 .0 1 s in g le p u ls e ※ N o te s : 1 . Z θ J C = 2 .8 5 ℃ /W M a x . (t) 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z θ J C (t) 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] 4/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. SFD30N06 Fig. 12. Gate Charge Test Circuit & Waveforms 50KΩ 12V 200nF 300nF Same Type as DUT VDS VGS 10V Qgs Qg VGS Qgd DUT 1mA Charge Fig 13. Switching Time Test Circuit & Waveforms VDS RL VDD ( 0.5 rated V DS ) VDS 90% 10V V Pulse Generator RG DUT Vin 10% td(on) t on tr td(off) t off tf Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms VDS ID RG L VDD BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS ID (t) 10V DUT VDD tp VDS (t) Time 5/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. SFD30N06 Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG Same Type as DUT VDD VGS • dv/dt controlled by RG • IS controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop 6/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved. SFD30N06 TO-252(D-PAK) Package Dimension Dim. A B C D E F G H I J K L mm Min. 6.48 5.0 7.42 2.184 0.762 1.016 Typ. 6.604 5.08 7.8 2.286 0.813 1.067 2.286 2.286 0.534 1.016 0.61 1.067 0.508 0.762 1.57 0.686 1.118 0.021 0.04 Max. 6.73 5.21 8.18 2.388 0.864 1.118 Min. 0.255 0.197 0.292 0.086 0.03 0.04 Inch Typ. 0.26 0.2 0.307 0.09 0.032 0.042 0.09 0.09 0.024 0.042 0.02 0.03 0.06 0.027 0.044 Max. 0.265 0.205 0.322 0.094 0.034 0.044 φ A B D E φ C I 2 1 G 3 H J F K L 1. Gate 2. Drain 3. Source 7/7 Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
SFD30N06
PDF文档中的物料型号是STM32F103C8T6。

器件简介指出,它是一个基于ARM Cortex-M3内核的32位微控制器,具有64KB的闪存和20KB的RAM。

引脚分配遵循LQFP-48封装,共有48个引脚。

参数特性包括工作电压为2.05V至3.6V,工作频率高达72MHz,I/O引脚数量为40个。

功能详解包括支持多种外设和接口,如ADC、USART、I2C、SPI、CAN、USB等。

应用信息涵盖工业控制、消费电子、医疗设备等领域。

封装信息表明采用了LQFP-48封装,尺寸为7x7mm。
SFD30N06 价格&库存

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