SemiWell Semiconductor Bi-Directional Triode Thyristor
Symbol
STR4A60
Features
◆ Repetitive Peak Off-State Voltage : 600V ◆ R.M.S On-State Current ( IT(RMS)= 4 A ) ◆ High Commutation dv/dt
○
2.T2
▼ ▲
○
3.Gate
1.T1
○
General Description
This device is new surface mounted package line up suitable for space limited application such as low power AC switching applications, such as fan speed, small light controllers and home appliance equipment.
TO-126
3 2 1
Absolute Maximum Ratings
Symbol
VDRM IT(RMS) ITSM I2 t PGM PG(AV) IGM VGM TJ TSTG
( TJ = 25°C unless otherwise specified ) Condition Ratings
600 TC = 95 °C One Cycle, 50Hz/60Hz, Peak, Non-Repetitive 4.0 30/33 4.5 1.5 0.1 1 7.0 - 40 ~ 125 - 40 ~ 150 0.26
Parameter
Repetitive Peak Off-State Voltage R.M.S On-State Current Surge On-State Current I2 t Peak Gate Power Dissipation Average Gate Power Dissipation Peak Gate Current Peak Gate Voltage Operating Junction Temperature Storage Temperature Mass
Units
V A A A2 s W W A V °C °C g
Jun, 2003. Rev. 3
copyright@SemiWell Semiconductor Co., LTd., All rights reserved.
1/6
STR4A60
Electrical Characteristics
Symbol Items
Repetitive Peak Off-State Current Peak On-State Voltage Ⅰ Ⅱ Ⅲ Ⅰ Ⅱ Ⅲ Non-Trigger Gate Voltage Critical Rate of Rise Off-State Voltage at Commutation Holding Current Thermal Impedance Junction to case TJ = 125 °C, VD = 1/2 VDRM TJ = 125 °C, [di/dt]c = -2.0 A/ms, VD=2/3 VDRM Gate Trigger Voltage VD = 6 V, RL=10 Ω Gate Trigger Current VD = 6 V, RL=10 Ω
Conditions
VD = VDRM, Single Phase, Half Wave TJ = 125 °C IT = 6.0 A, Inst. Measurement
Ratings Min.
─ ─ ─ ─ ─ ─ ─ ─ 0.2 5.0 ─ ─
Typ.
─ ─ ─ ─ ─ ─ ─ ─ ─ ─ 5.0 ─
Max.
1.0 1.6 20 20 20 1.5 1.5 1.5 ─ ─ ─ 3.5
Unit
IDRM VTM I+GT1 I -GT1 I -GT3 V+GT1 V-GT1 V-GT3 VGD (dv/dt)c IH Rth(j-c)
mA V
mA
V
V
V/㎲
mA °C/W
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STR4A60
Fig 1. Gate Characteristics
10
2
Fig 2. On-State Voltage
10
1
VGM (7V)
On-State Current [A]
PGM (1.5W) Gate Voltage [V] PG(AV) (0.1W) IGM (1A)
10
1
10
0
25 ℃
125 C
o
10
0
25 C
o
VGD (0.2V)
10
-1
10
1
10
2
10
3
10
-1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
Gate Current [mA]
On-State Voltage [V]
Fig 3. On State Current vs. Maximum Power Dissipation
6.0
130
Fig 4. On State Current vs. Allowable Case Temperature
Allowable Case Temperature [ oC]
5.5 5.0
π θ
360°
θ
2π
Power Dissipation [W]
4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0.5
θ θ θ θ
= 180 o = 150 o = 120 o = 90
o o
o
125 120 115 110
θ
: Conduction Angle
θ = 60 θ = 30
π θ
θ
2π
105 100 95 0.0
360°
θ θ θ θ θ θ
= 30 o = 60 o = 90 o = 120 o = 150 o = 180
o
θ
: Conduction Angle
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
RMS On-State Current [A]
RMS On-State Current [A]
Fig 5. Surge On-State Current Rating ( Non-Repetitive )
35
Fig 6. Gate Trigger Voltage vs. Junction Temperature
10
30
Surge On-State Current [A]
25
60Hz
V VGT (25 C) VGT (t C) V
1
o
+ GT1 _ GT1 _ GT3
15
50Hz
10
5
o
20
V
0 0 10
10
1
10
2
0.1 -50
0
50
100
o
150
Time (cycles)
Junction Temperature [ C]
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STR4A60
Fig 7. Gate Trigger Current vs. Junction Temperature
10
10
Fig 8. Transient Thermal Impedance
IGT (25 C)
IGT (t C)
I
1
+ GT1 _ GT1 _ GT3
I I
Transient Thermal Impedance [ C/W]
o
o
o
1
0.1 -50
0
50
100
o
150
10
-2
10
-1
10
0
10
1
10
2
Junction Temperature [ C]
Time (sec)
Fig 9. Gate Trigger Characteristics Test Circuit
10Ω
10Ω
10Ω
▼ ▲
6V
●
▼ ▲
A
●
▼ ▲
A
●
6V
6V
A
V
●
RG
V
●
RG
V
●
RG
Test Procedure Ⅰ
Test Procedure Ⅱ
Test Procedure Ⅲ
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STR4A60
TO-126 Package Dimension
Dim. A B C D E F G H I J K L
mm Min. 7.5 10.8 14.2 2.7 3.8 2.5 1.2 2.3 4.6 0.48 0.7 1.4 3.2 0.62 0.86 0.019 0.028 1.5 0.047 Typ. Max. 7.9 11.2 14.7 2.9 Min. 0.295 0.425 0.559 0.106
Inch Typ. Max. 0.311 0.441 0.579 0.114 0.150 0.098 0.059 0.091 0.181 0.024 0.034 0.055 0.126
φ
A E B
D
φ
F 3 C 2 1
G
L
1. Gate 2. T2 3. T1
J K
H I
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STR4A60
TO-126 Package Dimension, Forming
Dim. A B C D E F G H I J K L M
mm Min. 7.5 10.8 14.2 2.7 3.8 2.5 1.2 2.3 4.6 0.48 0.7 1.4 5.0 3.2 0.62 0.86 0.019 0.028 1.5 0.047 Typ. Max. 7.9 11.2 14.7 2.9 Min. 0.295 0.425 0.559 0.106
Inch Typ. Max. 0.311 0.441 0.579 0.114 0.150 0.098 0.059 0.091 0.181 0.024 0.034 0.055 0.197 0.126
φ
A E B
D
φ
F 3 C 2 1 M J H I
G
L
1. Gate 2. T2 3. T1
K
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