EDGE4717D

Edge4717D Quad Channel, Per Pin Precision Measurement Unit TEST AND MEASUREMENT PRODUCTS Description The Edge4717D is a precision measurement unit designed for automated test equipment and instrumentation. Manufactured in a wide voltage CMOS process, it is a monolithic solution for a quad channel per pin PMU. Each channel of the Edge4717D features a PMU that can force or measure voltage over a typical 15V I/O range, and supports 4 current ranges: ± 3.2 µA, ± 80 µA, ± 2 mA, ± 30 mA. The Edge4717D has an on-board window comparator per channel that provides two bits of information — DUT too high and DUT too low. There is also a monitor pin which provides a real time analog signal proportional to either the voltage or current measured at the DUT. The Edge4717D is designed to be a low power, low cost, small footprint solution to allow high pin count testers to support a PMU per pin. On-board voltage clamps, with over-current detection, provide protection to the DUT and 4717D. The Edge4717D also has a sample-and-hold feature available for capturing DUT current or voltage measurements. The Edge4717D is a design improvement to the Edge4717 that features: – Increased FV/MV range – Improved over-current detection circuit functionality – LVTTL comparator outputs (pull-up resistors no longer required) – Improved HiZ switching characteristics – Improved Force Voltage Linearity Features • • • • • • • • • • FV / MI Capability FI / MV Capability FV / MV Capability FI / MI Capability 4 Current Ranges (± 3.2 µA, ± 80 µA, ± 2 mA, ± 30 mA) –5.5V to 9.5V Nominal Output Range (Zero Current) –3.5 to 7.5V Nominal Output Range (Full Scale Current) On-board Voltage Clamps Internal Sample and Hold 228 Pin 23 mm x 23 mm TBGA Package Functional Block Diagram CHANNEL 0 SNK_MON SRC_MON HiZ VINP REF FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS DETECTOR LOGIC VOLTAGE MONITOR DUT_GND OVER-CURRENT DETECT OVER-CURRENT DETECT SNK_OUT OPEN_RLY SRC_OUT FORCE GUARD SENSE DUTLTH DUTGTL IVMON ÷ 2.5 CHANNEL 1 SNK_MON SRC_MON HiZ VINP REF FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS DETECTOR LOGIC OVER-CURRENT DETECT OVER-CURRENT DETECT SNK_OUT OPEN_RLY SRC_OUT FORCE GUARD SENSE DUTLTH DUTGTL IVMON ÷ 2.5 VOLTAGE MONITOR CHANNEL 2 SNK_MON SRC_MON HiZ VINP REF FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS DETECTOR LOGIC OVER-CURRENT DETECT OVER-CURRENT DETECT SNK_OUT OPEN_RLY SRC_OUT FORCE GUARD SENSE DUTLTH DUTGTL IVMON ÷ 2.5 VOLTAGE MONITOR CHANNEL 3 Applications • Automated Test Equipment - Memory Testers - VLSI Testers - Mixed Signal Tester SNK_MON SRC_MON HiZ VINP REF FV / FI* MI / MV* IVMAX IVMIN COMP_IN DISABLE COMPARATORS DETECTOR LOGIC OVER-CURRENT DETECT OVER-CURRENT DETECT SNK_OUT OPEN_RLY SRC_OUT FORCE GUARD SENSE DUTLTH DUTGTL IVMON ÷ 2.5 VOLTAGE MONITOR Revision 5 / October 14, 2005 1 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description Pin Name VINP[0:3] REF[0:3] Pin # B19, H22, N21, V22 A19, G22, M21, U22 Description Analog voltage input which forces the output voltage (FV mode) and the output current (FI mode) (one per channel). Reference pin for divide by 2.5 circuit for force current mode; this reference is typically set to 2.25V. Analog output pin which forces current or voltage. Analog input pin which senses voltage. TTL compatible input which determines whether the PMU is forcing current or forcing voltage. TTL compatible input which determines whether the PMU is measuring current or measuring voltage. TTL compatible current range select inputs. TTL compatible current range select inputs. Analog input voltages which establish the lower threshold level for the measurement comparator. Analog input voltages which establish the upper threshold level for the measurement comparator. Analog voltage input to measurement comparator. Digital comparator output that indicates the DUT measurement is less than the upper threshold. Digital comparator output that indicates the DUT measurement is greater than the lower threshold. TTL compatible input which places IVMON output in high impedance. TTL compatible input that places the FORCE output into high impedance. External resistor input corresponding to Range A. External resistor input corresponding to Range B. External resistor input corresponding to Range C. External resistor input corresponding to Range D. Analog voltage input to sink current clamp. Analog voltage input to source current clamp. Clamp output. Clamp output. FORCE[0:3] SENSE[0:3] FV_FI*[0:3] E2, J2, N2, U2 E3, J3, N3, U3 A7, C11, A14, B17 MI_MV*[0:3] C9, B11, B14, C16 RS0[0:3] RS1[0:3] IVMIN[0:3] IVMAX[0:3] COMP_IN[0:3] DUT_LTH[0:3] DUT_GTL[0:3] DISABLE[0:3] HIZ[0:3] RA[0:3] RB[0:3] RC[0:3] RD[0:3] SNK_MON[0:3] SRC_MON[0:3] SNK_OUT[0:3] SRC_OUT[0:3] C7, B9, C12, B15 C6, A8, B12, A15 C17, H20, M20, U21 C18, H21, N22, U20 D2, H2, M2, T2 AA13, Y12, AA10, Y9 AA14, AA12, Y11, AA9 A6, B10, B13, B16 B7, A10, C13, A17 F3, K3, P3, V3 F2, K2, P2, V2 F1, K1, P1, V1 G3, L3, R3, W3 F21, K22, R22, AA17 F22, L22, T22, Y16 C1, G1, L1, R1 E1, J1, N1, U1  2005 Semtech Corp. / Rev. 5, 10/14/05 2 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) Pin Name OPEN_RLY[0:3] IVMON[0:3] LTCH_MODE[0:3] SAMPLE[0:3] Pin # Y14, Y13, AA11, Y10 B18, G21, M22, T21 B6, C10, A12, A16 C8, A9, A13, C15 Description Open drain output that is used for opening relays between tester and DUT in case of an over-current condition. Analog voltage output that provides a real time monitor of either the measured voltage or measured current level. Controls a mux for determination of whether IVMONITOR is from sampleand-hold or not sampled. Used for sampling the voltage on the SENSE[0:3] voltage monitor pins. Driven guard pin used for guard traces. Digital input control pin for mux for testing sample-and-hold. Analog input for testing the sample-and-hold. Internal compensation pins that require an external capacitor connection between the two pins. Internal compensation pin that requires an external capacitor connection between the pin and ground. Internal compensation pin that requires an external capacitor connection between the pin and FORCE output. Input reference pin that should be connected to DUT ground line. GUARD[0:3] TEST[0:3] TEST_IN[0:3] COMP1[0:3] COMP2[0:3] COMP3[0:3] COMP4[0:3] DUT_GND Power Pins VCC D1, H1, M1, T1 B8, A11, C14, A18 C19, J22, N20, V21 D20, J20, P21, V20 D21, J21, P20, Y19 E21, K21, R21, Y18 F20, K20, R20, Y17 Y6 A1, A2, A21, A22, B1, B2, B21, B22, C3, C20, Y3, Y20, AA1, AA2, AA21, AA22, AB1, AB2, AB21, AB22 Y15 A20, B20, C21, C22, D22, E22, G2, L2, R2, W2, W21, W22, Y21, Y22, AA15, AA18, AA19, AA20, AB13, AB14, AB15, AB16, AB17, AB18, AB19, AB20 A3, A4, A5, B3, B4, B5, C2, C4, C5, W1, Y1, Y2, Y4, Y5, Y7, Y8, AA3, AA4, AA5, AA6, AA7, AA8, AB3, AB4, AB5, AB6, AB7, AB8, AB9, AB10, AB11, AB12 D3, E20, H3, G20, L20, L21, M3, P22, T3, T20, W20, AA16 Positive analog power supply. VDD VEE Positive digital supply (comparator). Negative analog power supply. GND Ground. NC No Connection. (Unused pins; leave unconnected).  2005 Semtech Corp. / Rev. 5, 10/14/05 3 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) A1 Ball Pad Indicator SEMTECH Top View 23mm x 23mm 228 Pin TBGA 1 A B C D E F G H J K L M N P R T U V W Y AA AB A1 VCC E4717 228 Pin TBGA 23mm x 23mm 2 A2 VCC 3 A3 GND 4 A4 GND 5 A5 GND 6 A6 DISABLE0 7 A7 FV_FIN0 8 A8 RS11 9 A9 SAMPLE1 10 A10 HIZ1 11 A11 TEST1 12 A12 LTCH_MODE2 13 A13 SAMPLE2 14 A14 FV_FIN2 15 A15 RS13 16 A16 LTCH_MODE3 17 A17 HIZ3 18 A18 TEST3 19 A19 IREF0 20 A20 VEE 21 A21 VCC 22 A22 VCC B1 VCC B2 VCC B3 GND B4 GND B5 GND B6 LTCH_MODE0 B7 HIZ0 B8 TEST0 B9 RS01 B10 DISABLE1 B11 MI_MVN1 B12 RS12 B13 DISABLE2 B14 MI_MVN2 B15 RS03 B16 DISABLE3 B17 FV_FIN3 B18 IVMON0 B19 VINP0 B20 VEE B21 VCC B22 VCC C1 SNK_OUT0 C2 GND C3 VCC C4 GND C5 GND C6 RS10 C7 RS00 C8 SAMPLE0 C9 MI_MVN0 C10 LTCH_MODE1 C11 FV_FIN1 C12 RS02 C13 HIZ2 C14 TEST2 C15 SAMPLE3 C16 MI_MVN3 C17 IV_MIN0 C18 IV_MAX0 C19 TEST_IN0 C20 VCC C21 VEE C22 VEE D1 GUARD0 D2 COMP_IN0 D3 NC D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 COMP10 D21 COMP20 D22 VEE E1 SRC_OUT0 E2 FORCE0 E3 SENSE0 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 NC E21 COMP30 E22 VEE F1 RC0 F2 RB0 F3 RA0 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 COMP40 F21 SNK_MON0 F22 SRC_MON0 G1 SNK_OUT1 G2 VEE G3 RD0 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 HLD_CAP0 (NC) G21 IVMON1 G22 IREF1 H1 GUARD1 H2 COMP_IN1 H3 NC H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 IV_MIN1 H21 IV_MAX1 H22 VINP1 J1 SRC_OUT1 J2 FORCE1 J3 SENSE1 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 COMP11 J21 COMP21 J22 TEST_IN1 K1 RC1 K2 RB1 K3 RA1 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 COMP41 K21 COMP31 K22 SNK_MON1 L1 SNK_OUT2 L2 VEE L3 RD1 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 NC L21 HLD_CAP1 (NC) L22 SRC_MON1 M1 GUARD2 M2 COMP_IN2 M3 NC M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 IV_MIN2 M21 IREF2 M22 IVMON2 N1 SRC_OUT2 N2 FORCE2 N3 SENSE2 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 N15 N16 N17 N18 N19 N20 TEST_IN2 N21 VINP2 N22 IV_MAX2 P1 RC2 P2 RB2 P3 RA2 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 COMP22 P21 COMP12 P22 NC R1 SNK_OUT3 R2 VEE R3 RD2 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 COMP42 R21 COMP32 R22 SNK_MON2 T1 GUARD3 T2 COMP_IN3 T3 NC T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 HLD_CAP2 (NC) T21 IVMON3 T22 SRC_MON2 U1 SRC_OUT3 U2 FORCE3 U3 SENSE3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 IV_MAX3 U21 IV_MIN3 U22 IREF3 V1 RC3 V2 RB3 V3 RA3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V20 COMP13 V21 TEST_IN3 V22 VINP3 W1 GND W2 VEE W3 RD3 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 NC W21 VEE W22 VEE Y1 GND Y2 GND Y3 VCC Y4 GND Y5 GND Y6 DUT_GND Y7 GND Y8 GND Y9 DUT_LTH3 Y10 OPEN_RLY3 Y11 DUT_GTL2 Y12 DUT_LTH1 Y13 OPEN_RLY1 Y14 OPEN_RLY0 Y15 VDD Y16 SRC_MON3 Y17 COMP43 Y18 COMP33 Y19 COMP23 Y20 VCC Y21 VEE Y22 VEE AA1 VCC AA2 VCC AA3 GND AA4 GND AA5 GND AA6 GND AA7 GND AA8 GND AA9 DUT_GTL3 AA10 DUT_LTH2 AA11 OPEN_RLY2 AA12 DUT_GTL1 AA13 DUT_LTH0 AA14 DUT_GTL0 AA15 VEE AA16 HLD_CAP3 (NC) AA17 SNK_MON3 AA18 VEE AA19 VEE AA20 VEE AA21 VCC AA22 VCC AB1 VCC AB2 VCC AB3 GND AB4 GND AB5 GND AB6 GND AB7 GND AB8 GND AB9 GND AB10 GND AB11 GND AB12 GND AB13 VEE AB14 VEE AB15 VEE AB16 VEE AB17 VEE AB18 VEE AB19 VEE AB20 VEE AB21 VCC AB22 VCC  2005 Semtech Corp. / Rev. 5, 10/14/05 4 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS PIN Description (continued) A1 Ball Pad Indicator (see gold triangle located at the corner) Bottom View 23mm x 23mm 228 Pin TBGA 22 A22 VCC 21 A21 VCC 20 A20 VEE 19 A19 IREF0 18 A18 TEST3 17 A17 HIZ3 16 A16 LTCH_MODE3 15 A15 RS13 14 A14 FV_FIN2 13 A13 SAMPLE2 12 A12 LTCH_MODE2 11 A11 TEST1 10 A10 HIZ1 9 A9 SAMPLE1 8 A8 RS11 7 A7 FV_FIN0 6 A6 DISABLE0 5 A5 GND 4 A4 GND 3 A3 GND 2 A2 VCC 1 A1 VCC A B C D E F G H J K L M N P R T U V W Y AA AB B22 VCC B21 VCC B20 VEE B19 VINP0 B18 IVMONITOR0 B17 FV_FIN3 B16 DISABLE3 B15 RS03 B14 MI_MVN2 B13 DISABLE2 B12 RS12 B11 MI_MVN1 B10 DISABLE1 B9 RS01 B8 TEST0 B7 HIZ0 B6 LTCH_MODE0 B5 GND B4 GND B3 GND B2 VCC B1 VCC C22 VEE C21 VEE C20 VCC C19 TEST_IN0 C18 IV_MAX0 C17 IV_MIN0 C16 MI_MVN3 C15 SAMPLE3 C14 TEST2 C13 HIZ2 C12 RS02 C11 FV_FIN1 C10 LTCH_MODE1 C9 MI_MVN0 C8 SAMPLE0 C7 RS00 C6 RS10 C5 GND C4 GND C3 VCC C2 GND C1 SNK_OUT0 D22 VEE D21 COMP20 D20 COMP10 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 NC D2 COMP_IN0 D1 GUARD0 E22 VEE E21 COMP30 E20 NC E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 SENSE0 E2 FORCE0 E1 SRC_OUT0 F22 SRC_MON0 F21 SNK_MON0 F20 COMP40 F19 F18 F17 F16 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 RA0 F2 RB0 F1 RC0 G22 IREF1 G21 IVMON1 G20 HLD_CAP0 (NC) G19 G18 G17 G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 RD0 G2 VEE G1 SNK_OUT1 H22 VINP1 H21 IV_MAX1 H20 IV_MIN1 H19 H18 H17 H16 H15 H14 H13 H12 H11 H10 H9 H8 H7 H6 H5 H4 H3 NC H2 COMP_IN1 H1 GUARD1 J22 TEST_IN1 J21 COMP21 J20 COMP11 J19 J18 J17 J16 J15 J14 J13 J12 J11 J10 J9 J8 J7 J6 J5 J4 J3 SENSE1 J2 FORCE1 J1 SRC_OUT1 K22 SNK_MON1 K21 COMP31 K20 COMP41 K19 K18 K17 K16 K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 RA1 K2 RB1 K1 RC1 L22 SRC_MON1 L21 HLD_CAP1 (NC) L20 NC L19 L18 L17 L16 L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 RD1 L2 VEE L1 SNK_OUT2 M22 IVMON2 M21 IREF2 M20 IV_MIN2 M19 M18 M17 M16 M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 NC M2 COMP_IN2 M1 GUARD2 N22 IV_MAX2 N21 VINP2 N20 TEST_IN2 N19 N18 N17 N16 N15 N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 SENSE2 N2 FORCE2 N1 SRC_OUT2 P22 NC P21 COMP12 P20 COMP22 P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 RA2 P2 RB2 P1 RC2 R22 SNK_MON2 R21 COMP32 R20 COMP42 R19 R18 R17 R16 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 RD2 R2 VEE R1 SNK_OUT3 T22 SRC_MON2 T21 IVMON3 T20 HLD_CAP2 (NC) T19 T18 T17 T16 T15 T14 T13 T12 T11 T10 T9 T8 T7 T6 T5 T4 T3 NC T2 COMP_IN3 T1 GUARD3 U22 IREF3 U21 IV_MIN3 U20 IV_MAX3 U19 U18 U17 U16 U15 U14 U13 U12 U11 U10 U9 U8 U7 U6 U5 U4 U3 SENSE3 U2 FORCE3 U1 SRC_OUT3 V22 VINP3 V21 TEST_IN3 V20 COMP13 V19 V18 V17 V16 V15 V14 V13 V12 V11 V10 V9 V8 V7 V6 V5 V4 V3 RA3 V2 RB3 V1 RC3 W22 VEE W21 VEE W20 NC W19 W18 W17 W16 W15 W14 W13 W12 W11 W10 W9 W8 W7 W6 W5 W4 W3 RD3 W2 VEE W1 GND Y22 VEE Y21 VEE Y20 VCC Y19 COMP23 Y18 COMP33 Y17 COMP43 Y16 SRC_MON3 Y15 VDD Y14 OPEN_RLY0 Y13 OPEN_RLY1 Y12 DUT_LTH1 Y11 DUT_GTL2 Y10 OPEN_RLY3 Y9 DUT_LTH3 Y8 GND Y7 GND Y6 DUT_GND Y5 GND Y4 GND Y3 VCC Y2 GND Y1 GND AA22 VCC AA21 VCC AA20 VEE AA19 VEE AA18 VEE AA17 SNK_MON3 AA16 HLD_CAP3 (NC) AA15 VEE AA14 DUT_GTL0 AA13 DUT_LTH0 AA12 DUT_GTL1 AA11 OPEN_RLY2 AA10 DUT_LTH2 AA9 DUT_GTL3 AA8 GND AA7 GND AA6 GND AA5 GND AA4 GND AA3 GND AA2 VCC AA1 VCC AB22 VCC AB21 VCC AB20 VEE AB19 VEE AB18 VEE AB17 VEE AB16 VEE AB15 VEE AB14 VEE AB13 VEE AB12 GND AB11 GND AB10 GND AB9 GND AB8 GND AB7 GND AB6 GND AB5 GND AB4 GND AB3 GND AB2 VCC AB1 VCC  2005 Semtech Corp. / Rev. 5, 10/14/05 5 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description Circuit Overview The Edge4717D is a quad channel parametric test and measurement unit that can : • Force Voltage / Measure Current • Force Current / Measure Voltage • Force Voltage / Measure Voltage • Force Current / Measure Current • Measure Voltage / Force Disable The Edge4717D features a PMU (per channel) that can force or measure voltage over a 15V range and force or measure current over four distinct ranges: • ± 3.2 µA • ± 80 µA • ± 2 mA • ± 30 mA The Edge4717D features an on-board window comparator (per channel) that provides two bit measurement range classification. Also, a monitor pin, IVMON, is capable of outputting either a real time analog voltage signal which tracks the measured parameter, or a sampled value of the measurement parameter captured using the sample and hold circuitry. PMU Functionality The trapezoid in Figure 1 describes the current-voltage functionality of the PMU with VCC = 12V and VEE = –8V, in Range D. V VOUT (@ I = 0) = 9.25V VCC = 12 Control Inputs FV / FI* is a TTL compatible input which determines whether the PMU forces current or voltage, and MI/MV* is a TTL compatible input which determines whether the PMU measures current or voltage. FV/FI* and MI/MV* are independent for each channel of the Edge4717D. HIZ is a TTL compatible input which can be used to place the PMU’s force amp into a high impedance state. Tables 1 and 2 describe the modes of operation related to these three input pins. HIZ 1 0 0 0 0 FV / FI* X 0 0 1 1 MI/MV* X 0 1 0 1 Mode of Operation High Impedance Force Current, Measure Voltage Force Current, Measure Current Force Voltage, Measure Voltage Force Voltage, Measure Current Table 1. RS0 and RS1 are TTL compatible inputs to an internal analog MUX which selects an external resistor corresponding to a desired current range. The truth table for RS0 and RS1, along with the associated external resistor values and current ranges, is shown in Table 2. RS0 and RS1 are independent for each channel of the Edge4717D. RS1 VOUT (@ 30 mA) = 9V No restrictions RS0 0 1 0 1 Range A B C D Current Range 3.2 µA 80 µA 2 mA 30 mA "Nominal" Ext. R RA = 625KΩ RB = 25KΩ RC = 1KΩ RD = 40Ω 0 0 1 IMIN (–30 mA) IMAX (30 mA) 1 Table 2. VOUT (@ –30 mA) = –2.5V VOUT (@ –10 mA) = –5.1 (in Range D) VOUT (@ I = 0) = –5.5V VEE = –8V NOTE: Negative current is defined as current flowing into PMU from DUT. Figure 1. PMU Functionality  2005 Semtech Corp. / Rev. 5, 10/14/05 6 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) FORCE/SENSE FORCE is an analog output which either forces a current or forces a voltage, depending on which operating mode is selected. In FV mode, the voltage forced is equivalent to the voltage applied to the VINP pin. In FI mode, the current forced is mapped to the input as described in the Force Current section. FORCE can be placed in a highimpedance state through the setting of the HIZ input pin. When the HIZ input pin is set to logical “0”, the Edge4717D FORCE output will be controlled by the internal driver amplifier, and the Edge4717D will force a user-defined current or voltage (depending upon the setting of FV/FI*) at the FORCE pin. When HIZ is set to logical “1”, the FORCE output is placed into a low-leakage, high impedance state. SENSE is a high impedance analog input which measures the DUT voltage in the MV operating mode. (FORCE and SENSE are brought out to separate pins to allow remote sensing.) LTCH_MODE Sample X (Falling Edge) 0 1 Sample-and_Hold State Transparent Sample Data Hold Data Transparent Disable 1 0 0 MI / MV* X 0 1 Sensed Parameter High Impedance Measured Voltage Measured Current Table 3. Sample and Hold The Edge4717D features a sample and hold circuit (per channel) which can be used to capture the corresponding voltage value of the sensed parameter (MI or MV) to be displayed at IVMON. The output of the sample and hold is internally connected to IVMON through a latch controlled by LTCH_MODE. The setting of LTCH_MODE determines whether the data at IVMON comes from the sample and hold circuit or directly from the sensed parameter (see Table 4). IVMON IVMON is a real time analog voltage output which tracks the sensed parameter. In the MV mode (MI/MV* = 0), the output voltage displayed at IVMON is a 1:1 mapping of the SENSE voltage. In the MI mode (MI/MV* = 1), IVMON follows the equation: IVMON = I(measured) * REXT Using nominal values for the external resistors (RA, RB, and RC), a voltage at IVMON of +2V corresponds to Imax, and –2V corresponds to Imin of the selected current range. For Range D, +1.2V corresponds to Imax and –1.2V corresponds to Imin. The IVMON pin can also be placed into a high impedance state by using the DISABLE input (see Table 3). 0 1 1 1 Table 4. Note: No update is performed on the sample-and-hold. Sample and Hold Testing An analog MUX in the 4717D allows for testing of the sample-and-hold circuit. The MUX control pin, TEST, is a TTL compatible input whose operation is described in Table 5. To test the sample and hold circuitry, an analog signal can be applied to the TEST_IN pin and sampled.  2005 Semtech Corp. / Rev. 5, 10/14/05 7 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) VINP Corresponding Forced Current ≥ Imax (Full-Scale, Ranges A, B, C) ≥ Imax (Full-Scale, Range D) 0 ≤ Imin (Full-Scale, Range D) ≤ Imin (Full-Scale, Ranges A, B, C) VREF + 5.5V VREF + 3.5V VREF VREF – 3.5V VREF – 5.5V TEST 0 1 Function Normal Operation TEST_IN used for sampleand-hold testing Table 5. Test Head Ground Reference The Edge4717D features a test head ground referencing feature which allows the force voltage function to be referenced to a separate ground reference other than the ground (GND) power used for the device. The test head ground should be connected to the DUT_GND pin of the Edge4717D. The maximum allowed variation between DUT_GND and GND is ± 250 mV. Force Voltage Mode In the FV mode (FV/FI* = 1), VINP is a high impedance, analog voltage input that maps directly to the voltage forced at the FORCE pin. Measure Current Mode In the MI mode (MI/MV* = 1), a current monitor is connected in series with the PMU forcing amplifier. This monitor generates a voltage that is proportional to the current passing through it, and is brought out to IVMON. This voltage (corresponding to the measured current) can also be tested by the on-board window comparator. Force Current Mode In the FI mode (FV/FI* = 0), VINP is a high impedance, analog voltage input that is converted into a current at the FORCE pin (see Figure 1) using the following relationship: VINP – VREF Forced Current = (REXT * 2.5) where VREF is the reference voltage input at the REF pin which is nominally set at 2.25V. (Positive current is defined as current flowing out of the PMU.) Table 6 describes the relationship between the voltage applied to VINP and the current at FORCE for Ranges A, B, and C.  2005 Semtech Corp. / Rev. 5, 10/14/05 8 Table 6. In the Force Current mode, the voltage at VINP is divided by 2.5 internally on the chip, so that a ± 2V range is used internally for forcing currents on Ranges A, B, and C. Range D uses a ± 1.2V range across REXT for forcing currents. Measure Voltage Mode In the MV mode (MI/MV* = 0), DUT voltage is measured via the SENSE input pin. This measured voltage can be displayed on the IVMON pin and tested using the internal window comparator. Comparator The Edge4717D features an on-board window comparator which provides two-bit measurement range classification. IVMAX and IVMIN are high impedance analog inputs that establish the upper and lower thresholds for the window comparator. COMP_IN is the window comparator input pin. COMP_IN should be connected to IVMON on each channel if it is desired to use the comparator to indicate PMU measurements. In the MI mode, an I/V MAX input of +2V will set the upper threshold of the window comparator to a voltage corresponding to +FSC (full-scale current), and an I/V MIN input of –2V will set the lower threshold to a voltage corresponding to –FSC for Ranges A, B, and C. Similarly for Range D, –1.2V corresponds to sinking full-scale current, and +1.2V corresponds to sourcing full-scale current (positive current is defined as current flowing out of the PMU). DUTGTL the DUTLTH are LVTTL compatible outputs which indicate the range of the measured parameter in relation to IVMIN and IVMAX. Comparator functionality is summarized in Table 7. www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) TEST CONDITION COMP_IN > IVMAX COMP_IN < IVMAX COMP_IN > IVMIN COMP_IN < IVMIN COMP_IN < IVMAX and COMP_IN > IVMIN DUT LTH 0 1 N/A DUT GTL N/A 1 0 1 Clamp Condition SRC_OUT < FORCE–Vdiode SRC_OUT > FORCE–Vdiode SNK_OUT < FORCE+Vdiode Clamp Diode Current N/A ICLAMP > 55 mA ICLAMP < 55 mA ICLAMP > 55 mA ICLAMP < 55 mA N/A OPEN_RLY 1 0 1 0 1 1 1 SNK_OUT > FORCE+Vdiode Table 7. Comparator Truth Table REXT Selection The Edge4717D is designed such that the maximum voltage drop across REXT (RA, RB, RC, or RD depending on range selected using RS0 and RS1 inputs) is ≤ 2V. Resistor values can be chosen to operate the PMU at any current range up to ± 50 mA in accordance with the following equation: REXT[Ω] = 2 [V] , IMAX ≤ IMAX[A] IMAX ≤ IMAX ≤ IMAX ≤ 50 mA for Range D 2 mA for Range C 80 µA for Range B 3.2 mA for Range A Table 8. Over-Current Detection Circuit Functionality (Vdiode is the forward voltage of the external clamp diode). For applications that require the use of external resistors that are much smaller in Ohmic value than those that are outlined in Table 2, one will need to account for the variation in switch resistance vs. common mode voltage of the range selection switches (A-D in Figure 3) when specifying the overall accuracy of the application. Common Mode Error/Calibration In order to attain a high degree of accuracy in a typical ATE application, offset and gain errors are accounted for through software calibration. When operating the Edge4717D in the Measure Current (MI) or Force Current (FI) modes, an additional source of error, common mode error, should be accounted for. Common mode error is a measure of how the common mode voltage, VCM, at the input of the current sense amplifier affects the forced or measured current values (see Figure 2). Since this error is created by internal resistors in the current sense amplifier, it is very linear in nature. Using the common mode error and common mode linearity specifications, one can see that with a small number of calibration steps (see Applications note PMU-A1), the effect of this error can be significantly reduced. Voltage Clamps/Over-Current Detection The Edge4717D features four pairs of on-board clamps (one pair per channel), which can be used to clamp the voltage of pins connected to SRC_OUT and SNK_OUT between limits set by the voltages applied to SRC_MON and SNK_MON. SNK_MON is a high impedance input that establishes the upper clamping limit, while SRC_MON is a high impedance analog input that establishes the lower clamping limit. In addition to voltage clamping functionality, the clamp circuitry of the Edge4717D also features overcurrent detection capability. Over-current detection is only enabled when one of the voltage clamping thresholds is exceeded (FORCE + Vdiode > SNK_MON or FORCE – Vdiode < SRC_MON). When enabled, an over-current condition is signaled via the OPEN-RLY pin. OPEN_RLY is an open drain output pin that pulls down when an overcurrent condition is detected. OPEN_RLY functionality is depicted in Table 8.  2005 Semtech Corp. / Rev. 5, 10/14/05 9 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Circuit Description (continued) VOS@IVMON Power Supply Sequencing CM Linearity In order to avoid the possibility of latch-up, the following power-up requirements must be satisified: 1. VEE ≤ GND ≤ VDD ≤ VCC at all times 2. VEE ≤ All inputs ≤ VCC CM Error = Slope 2 mV VCM@FORCE –3.5V –2 mV 9.5V The following power supply sequencing can be used as a guideline when operating the Edge4717D: Power Up Sequence 1. VCC (substrate) 2. VEE/VDD 3. Digital Inputs 4. Analog Inputs (Note: Slope may be negative) Figure 2. Graphical Representation of Common Mode Error Transient Clamps The Edge4717D has on-board transient clamps to limit the voltage and current spikes that might result from either changing the current range or changing the operating mode. Driven Guard Pin The Edge4717D features a pin (per channel), GUARD, which can be used to drive the guard traces of a FORCE/ SENSE pair. By surrounding FORCE and SENSE traces with guard traces which connect to the GUARD pin, an effective method to achieve minimal leakage can be achieved. Power Down Sequence 1. Analog Inputs 2. Digital Inputs 3. VEE/VDD 4. VCC (substrate)  2005 Semtech Corp. / Rev. 5, 10/14/05 10 www.semtech.com Current limiting resistors on the SRC_MON and SNK_MON inputs ensure that the Edge4717D is not damaged when SRC_MON > SNK_MON. ~500Ω ~ – + SNK_OUT > (FORCE+Vdiode) SNK Over-Current Detection SNK_OUT < (FORCE+Vdiode) OPEN_RLY SRC_OUT < (FORCE–Vdiode) SRC Over-Current Detection SRC_OUT > (FORCE–Vdiode) + – ~500Ω ~ D* D RD RC FORCE RB RA C* C CEXT B* B A* A + DRIVER – D* C* B* A* MI* MI 0 0 TEST_IN CEXT FV FV* FV SAMPLE COMP4 CEXT LTCH_MODE MI MI* DISABLE FV* TEST 1 S&H 1 + – 10 IVMON A – INST. + B C D COMP2 COMP1 COMP3 SNK_MON SNK_OUT – Vdiode + Positive Clamp  2005 Semtech Corp. / Rev. 5, 10/14/05 Negative Clamp Circuit Description (continued) – Vdiode + SRC_OUT TEST AND MEASUREMENT PRODUCTS SRC_MON VINP FV* FV REF .4X FV FV* 40KΩ ~1KΩ Figure 3. Functional Schematic IV_MAX COMP_IN IV_MIN + – DUT_GTL + – DUT_LTH 11 GUARD SENSE DUT_GND + – 40KΩ FV* FV MI ⇒ MI/MV* = 1 MI* ⇒ MI/MV* = 0 FV ⇒ FV/FI* = 1 FV* ⇒ FV/FI* = 0 DSRC = External Diode DSNK = External Diode CEXT = External Capacitors Edge4717D www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Application Information 120 pF COMP1 COMP2 OPEN_RLY RPU VDD 120 pF COMP4 625 KΩ RA 25 KΩ RB To LVTTL Gate DUT LTH 1 KΩ RC DUT GTL To LVTTL Gate RD 40 Ω Edge4717D FORCE To DUT SENSE + Vdiode – COMP3 100 pF to 1 nF (exact value is TBD) SRC_OUT – Vdiode + SNK_OUT VCC VDD VEE DUT_GND Use of diodes with a low reverse leakage current, such as the Zetex FLLD261 or equivalent are recommended. .1 µF .01 µF .01 µF .1 µF .01 µF VCC VDD VEE Test Head Ground Actual decoupling capacitor values depend on the actual system environment. Figure 4. Required External Components (Per Channel)  2005 Semtech Corp. / Rev. 5, 10/14/05 12 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Package Information 0.10 D –A– PIN Descriptions 11 Corner –B– E The entire top-side of the E4717D package is constructed of copper, which offers a path of high thermal conductivity for cooling. 45 degree 0.5 mm Chamfer (4 PLCS) Top View 10 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 e E1 A B C D E F G H J K L M N P R T U V W Y AA AB e Detail B D1 Bottom View  2005 Semtech Corp. / Rev. 5, 10/14/05 13 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Package Information (continued) Detail A Side View g c A1 P A / / ccc C g –C– b 0.30 S C A S B S 5 aaa C 6 4 0.10 S C Detail A Detail B NOTES: 1. 2. 3. All dimensions are in millimeters. “e” represents the basic solder ball grid pitch. “M” represents the basic solder ball matrix size, and symbol “N” is the maximum allowable number of balls after depopulating. 4. 5. 6. 7. 8. 9. 10. 11. “b” is measured at the maximum solder ball diameter (after reflow) parallel to primary datum –C– . Dimension “aaa” is measured parallel to primary datum –C– . Primary datum –C– and seating plane are defined by the spherical crowns of the solder balls. Package surface shall be black oxide. Cavity depth varies with die thickness. Substrate material base is copper. Bilateral tolerance zone is applied to each side of package body. 45 degree 0.5 mm Chamfer corner and white dot for Pin 1 identification.  2005 Semtech Corp. / Rev. 5, 10/14/05 14 REF. A A1 D D1 E E1 b c M N aaa ccc e g P Dimensional References MIN. 1.25 0.40 22.80 NOM. 1.4 0.50 23.00 21.00 BSC 22.80 23.00 21.00 BSC 0.525 0.85 0.65 0.90 22 228 0.15 0.25 1.00 TYP 0.35 0.15 0.775 0.95 23.20 MAX. 1.55 0.60 23.20 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Recommended Operating Conditions Parameter Positive Analog Power Supply Negative Analog Power Supply Total Analog Power Supply Digital Power Supply Case Temperature Thermal Resistance of Package (Junction to Case) Symbol VCC VEE VCC – VEE VDD TC θjc Min 11.5 –8.5 19 3.0 25 0.3 Typ 12 –8 20 3.3 Max 12.5 –7.5 21 5.25 +65 Units V V V V ˚C ˚C/W Absolute Maximum Ratings Parameter Positive Power Supply Negative Power Supply Total Power Supply Digital Power Supply Digital Inputs Analog Inputs Storage Temperature Case Temperature Soldering Temperature Symbol VCC VEE VCC – VEE VDD –15 0 0 –.5 VEE – .5 –55 22 +7 7.0 VCC + .5 +125 100 260 Min Typ Max +15 Units V V V V V V ˚C ˚C ˚C Stresses above listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.  2005 Semtech Corp. / Rev. 5, 10/14/05 15 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics Parameter Power Supplies Power Supply Consumption (No-Load) Positive Supply Negative Supply "Digital" Supply Power Supply Rejection Ratio VCC to any Analog Output (except in Hold mode) 1 MHz 500 kHz 100 kHz VEE to any Analog Output (except in Hold mode) 1 MHz 500 kHz 100 kHz VDD to any Analog Output (except in Hold mode) < 1 MHz VCC to IVMON (Hold Mode) 1 MHz 500 kHz 100 kHz 200 Hz VEE to IVMON (Hold Mode) 1 MHz 500 kHz 100 kHz 200 Hz VDD to IVMON (Hold Mode) < 1 MHz Force Voltage Mode Input Voltage Range Input Leakage Current Output Forcing Voltage (Positive Full-Scale Current through RE X T ) Output Forcing Voltage (0 Current through RE X T ) Output Forcing Voltage (Negative Full-Scale Current through RE X T ) Voltage Accuracy Offset Gain Linearity  2005 Semtech Corp. / Rev. 5, 10/14/05 16 Symbol Min Typ Max Units ICC IEE IDD PSRR 35 35 72 72 5 mA mA mA 20 20 25 dB dB dB 16 18 25 60 0.6 6 20 30 1.7 7 21 30 60 dB dB dB dB dB dB dB dB dB dB dB dB dB VINP Ileak VFORCE VFORCE VFORCE VEE + 2.0 –1 VEE + 2.5 VEE + 2.5 VEE + 4.5 0 VCC – 2.0 1 VCC – 4.5 VCC – 2.5 VCC – 2.5 V µA V V V VOS Gain FV INL –200 .985 –0.025 .01 200 1.015 +0.025 mV V/V % FSVR www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Measure Current Mode Current Measurement Range Range A Range B Range C Range D Current Measurement Accuracy Offset (@ IVMON) Gain (Note 1) Linearity Ranges A, B, C Range D Common Mode Error Common Mode Linearity FORCE = VEE + 4.5V to VCC – 4.75V IVMON Output Impedance IVMON Leakage Current (IVMON = VEE+2.5V TO VCC–2.5V) Force Current Mode Input Voltage Range Input Leakage Current REF Input Voltage Range REF Leakage Current Output Forcing Current Range A Range B Range C Range D Compliance Voltage Range Positive Full-Scale Current 0 Current Negative Full-Scale Current Current Accuracy Offset Gain (Note 2) Linearity Ranges A, B, C Range D Common Mode Error Common Mode Linearity FORCE = VEE + 4.5V to VCC – 4.5V VINP IL E A K VREF Symbol Min Typ Max Units IM E A S U R E –3.2 –80 –2 –30 VOS Gain MI INL –150 .985 –.08 –80 CM Error CM INL RO U T IL E A K –5.5 –.05 –100 500 3.2 80 2 30 150 1.015 .08 +80 5.5 .05 100 µA µA mA mA mV V/V % FSCR µA mV/V %FSCR Ω nA IL E A K IF O R C E VREF – 5.5 –1 0 –1 –3.2 –80 –2 –30 0 VREF + 5.5 1 2.5 –1 3.2 80 2 30 VCC – 3.0 VCC – 2.5 VCC – 2.5 3.6 .415 .08 +80 5.5 .05 V µA V µA µA µA mA mA V V V % FSCR V/V % FSCR µA mV/V % FSCR VFORCE VEE + 2.5 VEE + 2.5 VEE + 3.0 IOS Gain FI INL –3.6 .385 –.08 –80 CM Error CM INL –5.5 –.05 .4  2005 Semtech Corp. / Rev. 5, 10/14/05 17 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Measure Voltage Mode Voltage Measurement Range Voltage Measurement Accuracy Offset Gain Linearity FORCE/SENSE Combined Leakage Current in HiZ (FV/FI*=0, FORCE/SENSE = VEE+2.5V to VCC–2.5V) IVMON Output Impedance IVMON Leakage Current (IVMON = VEE+2.5V to VCC–2.5V) Digital Inputs (FV/FI*, MI/MV*, RS0, RS1, DISABLE, TEST, HiZ, LTCH_MODE, SAMPLE) Input Low Level Input High Level Input Leakage Current Voltage Clamps Range Effective Output Impedance of Clamps Sink Clamp Voltage Range Source Clamp Voltage Range SRC_MON Leakage Current SNK_MON Leakage Current Linearity @ 5 mA Constant Current Offset @ 5 mA Constant Current PPMU Voltage Clamps Current Interrupt Limit (OPEN_RLY Trigger Current) PPMU Voltage Clamps Current Limiting Range Output Low Voltage for OPEN_RLY Pin @ 1 mA TEST_IN Leakage Current OPEN_RLY Leakage Current @ 5V Sample and Hold Circuit Linearity Error Hold Step TempCo of Hold Step (Note 3) Output Impedance of IVMON (Note 3) S&H INL VH S ∆V / ∆˚C RO U T 500 –.025 .01 16 .025 20 50 % FSVR mV µV/˚C Ω SNK_MON – SRC_MON RO U T SNK_MON SRC_MON IL E A K IL E A K CLAMP INL VOS IC L A M P IL I M I T VO L IL E A K IL E A K –1 –1 VEE + 2.5 VEE + 2.0 –1 –1 –.400 –150 35 35 .5 16.0 10 VCC – 2.0 VCC – 2.5 1 1 +.400 +150 95 95 500 1 1 V Ω V V µA µA % FSVR mV mA mA mV µA µA VIL VIH Ileak 2.0 –1 0 1 0.8 V V µA VSENSE VOS Gain MV INL IL E A K RO U T IL E A K VEE + 2.5 –200 .985 –.025 –10 VCC – 2.5 200 1.015 .025 10 V mV V/V %FSVR nA Ω nA Symbol Min Typ Max Units ±.01 500 –100 100  2005 Semtech Corp. / Rev. 5, 10/14/05 18 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS DC Characteristics (continued) Parameter Short Circuit Protection Forcing Op-Amp Current Limit (Note 3) Driven Guard / Test Head Ground GUARD – SENSE @ DUT_GND = 0 SENSE = 5V DUT_GND to GND Voltage Range DUT_GND Leakage Current Comparator IVMAX Voltage Range IVMIN Voltage Range Comparator Offset (IVMIN, IVMAX) Input Bias Current at (IVMIN, IVMAX, COMP_IN) Digital Outputs (DUTLTH, DUTGTL) Output Low Level (TBD load) Output High Level (TBD load) VO L VO H 2.4 400 VDD mV V IVMAX IVMIN VO S Ib i a s VEE + 1.75 VEE + 1.75 –100 –1 VCC – 1.75 VCC – 1.75 +100 +1 V V mV µA VD I F F –100 +100 mV IM A X 35 75 mA Symbol Min Typ Max Units VO S IL E A K –250 –1 +250 1 mV µA Note 1: Note 2: Gain = Gain = IVMON VEXT , where VEXT is the voltage across REXT, which corresponds to measured current. VEXT , REF = 2.25V nominal, V EXT is the voltage across REXT, which corresponds to VINP – REF forced current. Note 3: Guaranteed by design and characterization. Not production tested. Unit Definitions: FSCR = Full Scale Current Range Range A, ± 3.2 µA Range B, ± 80 µA Range C, ± 2 mA Range D, ± 30 mA FSVR = Full Scale Voltage Range FV mode, no current = 14V minimum FV mode, current load = 12V minimum MV mode = 14V minimum  2005 Semtech Corp. / Rev. 5, 10/14/05 19 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS AC Characteristics Parameter Force Voltage / Measure Current FORCE Output Voltage Settling Time (Note 1) (To 0.1% of 10V step) RANGE A RANGES B, C, D Measured Current Settling Time (Note 1) (To 0.1% of FSCR step) RANGE A RANGES B, C, D Stability (Note 1) Capacitive Loading Range for Stable Operation Force Amp Saturation Recovery Time HiZ True to FORCE Disable Time HiZ False to FORCE Enable Time Force Current / Measure Voltage FORCE Output Current Settling Time (Note 1) (To 0.1% of FSCR step) RANGE A RANGES B, C, D SENSE (Measure) Voltage Settling Time (Note 1) (To 0.1% of 10V step) RANGE A RANGES B, C, D Stability (Note 1) Capacitive Loading Range for Stable Operation Force Amp Saturation Recovery Time HiZ True to FORCE Disable Time HiZ False to FORCE Enable Time I/V Monitor Enable Time Disable Time to e tz 500 500 ns ns ts e t t l e 4 300 ts e t t l e 4 300 ms µs ms µs ts e t t l e 2 300 ts e t t l e 4 300 CL O A D ts r tz to e 0 25 1 15 10 ms µs nF µs µs µs ms µs Symbol Min Typ Max Units CL O A D ts r tz to e 0 25 10 nF µs µs µs 1 15  2005 Semtech Corp. / Rev. 5, 10/14/05 20 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS AC Characteristics (continued) Parameter Sample and Hold Circuit Droop Rate Acquisition Time (to 0.025% of Sampled Value) Hold Mode Settling Time (Notes 1, 2) Measure Voltage Mode To 0.1% of 10V Step To 0.025% of 10V Step Measure Current Mode (Notes 1, 2) To 0.1% of 4V Step To 0.025% of 4V Step Comparators Propagation Delay tpd 25 µs ∆V/∆t tA Q tH S E T T L E 0.8 1.4 tHSETTLE 1.3 1.8 2 3 µs µsf 1.5 2 µs µs 1 40 10 mV/s µs Symbol Min Typ Max Units AC Test Conditions: COMP3 = 120 pF to Ground; COMP4 = 120 pF to FORCE; Capacitor between COMP1 and COMP2 = 120 pF; Load at FORCE/SENSE combined output = 100 pF. Note 1: Note 2: Guaranteed by design and characterization. Not production tested. Sample and Hold Circuit Acquisition Time (tAQ) and Settling Time (tHSETTLE) are described below: 1 SAMPLE 0 tAQ tHSETTLE VCC – 4.5 IVMON VEE + 4.5 VHS CONDITIONS: LTCH_MODE = 1 IVMON = 100 pF to GND  2005 Semtech Corp. / Rev. 5, 10/14/05 21 www.semtech.com Edge4717D TEST AND MEASUREMENT PRODUCTS Ordering Information Model Number E4717DBG Package 228 Pin 23 mm x 23 mm TBGA EVM4717DBG Edge4717D Evaluation Board This device is ESD sensitive. Care should be taken when handling and installing this device to avoid damaging it. Contact Information Semtech Corporation Test and Measurement Division 10021 Willow Creek Rd., San Diego, CA 92131 Phone: (858)695-1808 FAX (858)695-2633  2005 Semtech Corp. / Rev. 5, 10/14/05 22 www.semtech.com