EDGE749

Edge749 Octal Pin Electronics Driver/Receiver EDGE HIGH-PERFORMANCE PRODUCTS Description The Edge749 is an octal pin electronics driver and receiver combination fabricated in a high-performance CMOS process. It is designed for automatic test equipment and instrumentation where cost, functional density, and power are all at a premium. The Edge749 incorporates eight channels of programmable drivers and receivers into one package. Each channel has per pin driver levels, receiver threshold, and tristate control. The 18V driver output and receiver input range allows the Edge749 to interface directly between TTL, ECL, CMOS (3V, 5V, and 8V), very high voltage, and custom level circuitry. The Edge749 is pin and functionally compatible with the Edge648 and Edge649. Features • • • • • • • • 20 MHz Operation 18 V DUT I/O Range Programmable Output Levels Programmable Input Thresholds Per Pin Flexibility High Integration Levels Low Power Dissipation Edge 648 and 649 Compatible Applications • • • • • • • Burn-In ATE Functional Board Testers In-Circuit Board Testers Combinational Board Testers Low Cost Chip Testers ASIC Verifiers VXI-Based Test Equipment Functional Block Diagram VHIGH VLOW 8 8 8 DATA IN 8 DVR EN* 8 DUT 8 DATA OUT + – 8 THRESHOLD Revision 1/ June 23, 1998 1 www.semtech.com Edge749 EDGE HIGH-PERFORMANCE PRODUCTS PIN Description Pin Name DATA IN (0:7) Pin Number 64, 65, 66, 67, 3, 4, 5, 6 56, 57, 58, 59, 11, 12, 13, 14 46, 43, 40, 37, 33, 30, 27, 24 60, 61, 62, 63, 7, 8, 9, 10 45, 44, 39, 38, 32, 31, 26, 25 44, 42, 41, 36, 34, 29, 28, 23 50, 51, 52, 53, 17, 18, 19, 20 21, 49 Description TTL compatible inputs that determine the high/low status of the DUT drivers. CMOS level outputs that indicate the status of the DUT receivers. DATA OUT (0:7) DUT (0:7) Pin electronic inputs/outputs that receive/drive the device under test. DVR EN (0:7) TTl compatible inputs that control the high impedance state of the DUT drivers. Unbuffered analog inputs that set the voltage level of a logical 1 of the DUT drivers. Unbuffered analog inputs that set the voltage level of a logical 0 of the DUT drivers. Buffered analog input voltage that sets the threshold for the DUT comparators. Analog positive power supply. VHIGH (0:7) VLOW (0:7) THRESHOLD (0:7) VCC VEE 22, 48 Analog negative power supply. VDD 1, 15, 55 Digital power supply. GND 2, 16, 54, 68 Device ground. N/C 35 No connection.  2000 Semtech Corp. 2 www.semtech.com Edge749 EDGE HIGH-PERFORMANCE PRODUCTS PIN Description (continued) THRESHOLD3 THRESHOLD2 THRESHOLD1 THRESHOLD0 DATA OUT3 DATA OUT2 DATA OUT1 DATA OUT0 DVR EN*0 VHIGH0 45 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 DVR EN*1 DVR EN*2 DVR EN*3 DATA IN0 DATA IN1 DATA IN2 DATA IN3 GND VDD GND DATA IN4 DATA IN5 DATA IN6 DATA IN7 DVR EN*4 DVR EN*5 DVR EN*6 61 62 63 64 65 66 67 68 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 11 44 VHIGH1 VLOW0 DUT0 GND VDD VCC VEE 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 DUT1 VLOW1 VLOW2 DUT2 VHIGH2 VHIGH3 DUT3 VLOW3 NC VLOW4 DUT4 VHIGH4 VHIGH5 DUT5 VLOW5 VLOW6 DUT6 DATA OUT4 DATA OUT5 DATA OUT6 DATA OUT7 THRESHOLD4 THRESHOLD5 THRESHOLD6 THRESHOLD7 VHIGH7 DVR EN*7  2000 Semtech Corp. 3 VHIGH6 VLOW7 VEE DUT7 GND VDD VCC www.semtech.com Edge749 EDGE HIGH-PERFORMANCE PRODUCTS Circuit Description Driver Description VHIGH VLOW VHIGH and VLOW VHIGH and VLOW define the logical “1” and “0” levels of the DUT driver and can be adjusted anywhere over the range determined by VCC and VEE. Table 1 documents the relationship between the analog power to supplies (VCC and VEE), the driver range (VHIGH and VLOW), and the comparator threshold range (VTHRESHOLD). The VHIGH and VLOW inputs are unbuffered in that they also provide the driver output current (see Figure 3), so the source of VHIGH and VLOW must have ample current drive capability. VHIGH DATA IN DUT DVR EN* Figure 1. Driver Diagram As shown in Figure 1, Edge749 supports programmable high and low levels and tristate per channel. There are no shared lines between any drivers. The DVR EN* and DATA IN signals are TTL compatible inputs that control the driver (see Figure 2). With DVR EN* high, the DUT driver goes into a high impedance state. With DVR EN* low, DATA IN high forces the driver into a high state (DUT = VHIGH), and DATA IN low forces the driver low (DUT = VLOW). DVR EN* DUT VLOW DATA IN VHIGH VLOW DUT Figure 3. Simplified Model of the Unbuffered Output Stage Figure 2. Driver Functionality Drive Common Mode Range VEE