LCDA24.TBT

Low Capacitance TVS Diode Array For High-Speed Data Interfaces PROTECTION PRODUCTS Description The LCDA series of TVS arrays are designed to protect sensitive electronics from damage or latch-up due to ESD and other voltage-induced transient events. Each device will protect two high-speed lines. They are available with operating voltages of 5V, 12V, 15V and 24V. They are bidirectional devices and may be used on lines where the signal polarities are above and below ground. TVS diodes are solid-state devices designed specifically for transient suppression. They offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage and no device degradation. The LCDA series devices feature low capacitance compensation diodes in series with standard TVS diodes to provide an integrated, low capacitance solution for use on high-speed interfaces. The LCDA series devices may be used to meet the immunity requirements of IEC 61000-4-2, level 4. LCDA05 through LCDA24 Features Transient protection for high-speed data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (lightning) (8/20µs)* Protects two I/O lines Low capacitance for high-speed data lines Working voltages: 5V, 12V, 15V and 24V Low leakage current Low operating and clamping voltages Solid-state silicon avalanche technology Mechanical Characteristics JEDEC SO-8 package Molding compound flammability rating: UL 94V-0 Marking : Part Number, Date Code Packaging : Tape and Reel per EIA 481 Applications High-Speed Data Lines Microprocessor Based Equipment Universal Serial Bus (USB) Port Protection Notebooks, Desktops, and Servers Instrumentation LAN/WAN Equipment Peripherals *See Electrical Characteristics Tables for Ipp Circuit Diagram (Each Line Pair) Schematic & PIN Configuration Pin 1 and 2 1 8 2 7 3 6 4 5 Pin 7 and 8 SO-8 (Top View) Revision 08/15/2006 1 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Absolute Maximum Rating R ating Peak Pulse Power (tp = 8/20µs) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol Pp k TL TJ TSTG Value 300 260 (10 sec.) -55 to +125 -55 to +150 Units Watts °C °C °C Electrical Characteristics LCDA05 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 5V, T=25°C IPP = 1A, tp = 8/20µs IPP = 5A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 6 20 9.8 11 17 5 Conditions Minimum Typical Maximum 5 Units V V µA V V A pF LCDA12 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 12V, T=25°C IPP = 1A, tp = 8/20µs IPP = 5A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 13.3 1 19 24 12 5 Conditions Minimum Typical Maximum 12 Units V V µA V V A pF  2005 Semtech Corp. 2 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Electrical Characteristics (continued) LCDA15 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 15V, T=25°C IPP = 1A, tp = 8/20µs IPP = 5A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 16.7 1 24 30 10 5 Conditions Minimum Typical Maximum 15 Units V V µA V V A pF LCDA24 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Maximum Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 24V, T=25°C IPP = 1A, tp = 8/20µs IPP = 5A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 26.7 1 43 55 5 5 Conditions Minimum Typical Maximum 24 Units V V µA V V A pF  2005 Semtech Corp. 3 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time 10 Peak Pulse Power - Ppk (kW) Power Derating Curve 110 100 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10 1 0.1 0.01 0.1 1 10 Pulse Duration - tp (µs) 100 1000 0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC) Pulse Waveform 110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 Time (µs) 20 25 30 td = IPP/2 e -t Waveform Parameters: tr = 8µs td = 20µs ESD Pulse Waveform (Per IEC 61000-4-2) ESD Discharge Parameters Per IEC 61000-4-2 Level First Peak Current (A ) 7.5 15 22.5 30 Peak Current at 30ns (A ) 4 8 12 16 Peak Current at 60ns (A ) 8 4 6 8 Test Test Voltage Voltage (Contact (A ir Discharge) Discharge) ( kV ) (kV) 2 4 6 8 2 4 8 15 1 2 3 4  2005 Semtech Corp. 4 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Applications Information Device Connection for Protection of Two High-Speed Data Lines The LCDAxx is designed to protect up to two high-speed data lines. The LCDAxx utilizes a low capacitance compensation diode in series with, but in opposite polarity to a TVS diode in each line. The resulting capacitance is less than 5pF per line. Each line will only suppress transient events in one polarity. Therefore, to achieve protection in both positive and negative polarity, a second TVS/rectifier pair is connected in anti-parallel to the first. Pins 1, 2, 7, and 8 are used to protect one data line. Pins 3, 4, 5, and 6 are used to protect the second data line. The device is connected as follows: Pins 1 and 2 are tied together and pins 7 and 8 are tied together providing the protection circuit for one I/O line. Pins 3 and 4 are tied together and pins 5 and 6 are tied together providing the protection circuit for the second I/O line. Since the device is electrically symmetrical, either side of the connected pairs may be used to protect the lines. The other side of the pair is used to make the ground connection. The ground connections should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: Place the TVS near the input terminals or connectors to restrict transient coupling. Minimize the path length between the TVS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. 1 LCDA Connection Diagram 1 I/O 1 2 8 I/O 1 7 3 I/O 2 4 6 I/O 2 5 I/O Line Protection Connection Options To Protected Device 8 Line 1 In/Out 2 7 Line 1 Ground 3 6 Line 2 Ground 4 5 Line 2 In/Out From Connector To Protected Device Line 1 In/Out 1 8 2 7 Ground 3 6 4 Line 2 In/Out 5 From Connector  2005 Semtech Corp. 5 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Applications Information (continued) Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint.  2005 Semtech Corp. 6 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Outline Drawing - SO-8 A N 2X E/2 E1 E 1 ccc C 2X N/2 TIPS 2 e/2 B D aaa C SEATING PLANE A2 A C bxN bbb A1 C A-B D SIDE VIEW GAGE PLANE 0.25 e D h h H DIM c A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX .053 .069 .010 .004 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 8 8° 0° .004 .010 .008 1.35 1.75 0.10 0.25 1.25 1.65 0.31 0.51 0.17 0.25 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 8 0° 8° 0.10 0.25 0.20 L (L1) DETAIL 01 A SEE DETAIL A NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AA. Land Pattern - SO-8 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A.  2005 Semtech Corp. 7 www.semtech.com LCDA05 through LCDA24 PROTECTION PRODUCTS Ordering Information Part Number LCDA05.TB LCDA12.TB LCDA15.TB LCDA24.TB LCDA05.TBT LCDA12.TBT LCDA15.TBT LCDA24.TBT L C DA 0 5 L C DA 1 2 L C DA 1 5 LCDA24 LCDA05.T LCDA12.T LCDA15.T LCDA24.T Lead Finish SnPb SnPb SnPb SnPb Pb Free Pb Free Pb Free Pb Free SnPb SnPb SnPb SnPb Pb Free Pb Free Pb Free Pb Free Qty per Reel 500 500 500 500 500 500 500 500 95/Tube 95/Tube 95/Tube 95/Tube 95/Tube 95/Tube 95/Tube 95/Tube Reel Size 7 Inch 7 Inch 7 Inch 7 Inch 7 inch 7 inch 7 inch 7 inch N/A N/A N/A N/A N/A N/A N/A N/A Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804  2005 Semtech Corp. 8 www.semtech.com