HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
The SC1205 is a cost effective Dual MOSFET Driver designed for switching High and Low side Power MOSFETs. Each driver is capable of driving a 3000pF load in 20ns rise/fall time and has a 20ns max propagation delay from input transition to the gate of the power FET’s. An internal Overlap Protection Circuit prevents shoot-through from Vin to GND in the main switching and synchronous MOSFET’s. The Overlap Protection circuit ensures the Bottom FET does not turn on until the Top FET source has reached a voltage low enough to prevent cross-conduction. The high current drive capability (2A peak) allows fast switching, thus reducing switching losses at high (1MHz) PWM frequencies. The high voltage CMOS process allows operation from 5-25 Volts at top MOSFET drain, thus making SC1205 suitable for battery powered applications. Connecting Enable pin (EN) to logic low shuts down both drives and reduces operating current to less than 10uA. An Under-Voltage-Lock-Out circuit is included to guarantee that both driver outputs are low when the 5V logic level is less than or equal to 4.4V (typ) at supply ramp up (4.35V at supply ramp down). An Internal temperature sensor shuts down all drives in the event of overtemperature. SC1205 is fabricated utilizing CMOS technology for low quiescent current. The SC1205 is offered in a standard SO-8 package.
FEATURES • • • • • • • • • • • • • •
Fast rise and fall times (15ns typical with 3000pf load) 2Amp peak drive current 14ns max Propagation delay (BG going low) Adaptive Non-overlapping Gate Drives provide shoot-through protection Floating top drive switches up to 25V Under-Voltage lock-out Overtemperature protection Less than 10uA supply current when EN is low Low cost
APPLICATIONS
High Density sunchronous power supplies Motor Drives/Class-D amps/Half bridge drivers High frequency (to 1.2 MHz) operation allows use of small inductors and low cost caps in place of electrolytics Portable computers Battery powered applications
ORDERING INFORMATION
DEVICE
(1)
PACKAGE SO-8
TEMP. RANGE (T J) 0 - 125°C
SC1205CS
Note: (1) Add suffix ‘TR’ for tape and reel.
PIN CONFIGURATION
BLOCK DIAGRAM
Top View
(SO-8)
1 © 1999 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320
HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
ABSOLUTE MAXIMUM RATINGS
Parameter VCC Supply Voltage BST to PGND BST to DRN DRN to PGND OVP_S to PGND Input pin Continuous Power Dissipation Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 sec NOTE: (1) Specification refers to application circuit in Figure 1. Symbol VMAX5V VMAXBST-PGND VMAXBST-DRN VMAXDRN-PGN VMAXOVP_S-PGND CO Pd θϑΧ θJA TJ TSTG TLEAD Conditions Maximum 7 30 7 25 10 -0.3 to 7.3 0.66 2.56 40 150 0 to +125 -65 to +150 300 Units V V V V V V W °C/W °C/W °C °C °C
Tamb = 25°C, TJ = 125°C Tcase = 25°C, TJ = 125°C
ELECTRICAL CHARACTERISTICS (DC OPERATING SPECIFICATIONS)
Unless specified: -0 < θJ < 125°C; VCC = 5V; 4V < VBST < 26V PARAMETER POWER SUPPLY Supply Voltage Quiescent Current, operating Quiescent Current UNDER-VOLTAGE LOCKOUT Start Threshold Hysteresis Logic Active Threshold VSTART VhysUVLO VACT 4.2 4.4 0.05 1.5 4.6 V V V VCC Iq_op Iq_stby VCC VCC = 5V, CO = 0V EN = 0V 4.15 5 1 10 6.0 V ma µA SYMBOL CONDITIONS MIN TYP MAX UNITS
2 © 1999 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320
HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
ELECTRICAL CHARACTERISTICS (DC OPERATING SPECIFICATIONS) Cont.
PARAMETER CO High Level Input Voltage Low Level Input Voltage THERMAL SHUTDOWN Over Temperature Trip Point Hysteresis HIGH-SIDE DRIVER Peak Output Current Output Resistance IPKH RsrcTG RsinkTG LOW-SIDE DRIVER Peak Output Current Output Resistance IPKL RsrcBG RsinkBG duty cycle < 2%, tpw < 100µs, TJ = 125°C VV_5 = 4.6V, VBG = 4V (src), or VLOWDR = 0.5V (sink) 2 1.2 A Ω Ω duty cycle < 2%, tpw < 100µs, TJ = 125°C, VBST - VDRN = 4.5V, VTG = 4.0V (src)+VDRN or VTG = 0.5V (sink)+VDRN 2 1 A Ω Ω TOTP THYST 165 10 °C °C VIH VIL 2.0 0.8 V V SYMBOL CONDITIONS MIN TYP MAX UNITS
.7
1.0
3 © 1999 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320
HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
AC OPERATING SPECIFICATIONS
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
HIGH-SIDE DRIVER rise time trTG, CI = 3nF, VBST - VDRN = 4.6V, T J = 125°C CI = 3nF, VBST - VDRN = 4.6V, T J = 125°C CI = 3nF, VBST - VDRN = 4.6V, T J = 125°C CI = 3nF, VBST - VDRN = 4.6V, T J = 125°C 14 23 ns
fall time
tf TG
12
19
ns
propagation delay time, TG going high propagation delay time, TG going low LOW-SIDE DRIVER
tpdhTG
20
32
ns
tpdlTG
15
24
ns
rise time
trBG
CI = 3nF, VV_5 = 4.6V, T J = 125°C CI = 3nF, VV_5 = 4.6V, T J = 125°C CI = 3nF, VV_5 = 4.6V, T J = 125°C, DRN < 1V CI = 3nF, VV_5 = 4.6V, T J = 125°C
15
24
ns
fall time
trBG
13
21
ns
propagation delay time BG going high progagation delay time BG going low UNDER-VOLTAGE LOCKOUT
tpdhBGHI
12
19
ns
tpdlBG
7
12
ns
V_5 ramping up
tpdhUVLO
EN is High
10
us
V_5 ramping down
tpdlUVLO
EN is High
10
us
4 © 1999 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320
HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
PIN DESCRIPTION
Pin # 1 Pin Name DRN Pin Function This pin connects to the junction of the switching and synchronous MOSFET’s. This pin can be subjected to a -2V minimum relative to PGND without affecting operation. Output gate drive for the switching (high-side) MOSFET. Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap voltage for the high-side MOSFET. The capacitor value is typically between 0.1µF and 1µF (ceramic). TTL-level input signal to the MOSFET drivers. When high, this pin enables the internal circuitry of the device. When low, TG, BG and PRDY are forced low and the supply current (5V) is less than 10µA. +5V supply. A .22-1µF ceramic capacitor should be connected from 5V to PGND very close to this pin. Output drive for the synchronous MOSFET. Ground.
2 3
TG BST
4 5
CO EN
6 7 8 NOTE:
VS BG PGND
(1) All logic level inputs and outputs are open collector TTL compatible.
TIMING DIAGRAM
5 © 1999 SEMTECH CORP. 652 MITCHELL ROAD NEWBURY PARK CA 91320
HIGH SPEED SYNCHRONOUS POWER MOSFET DRIVER
PRELIMINARY - December 7, 1999
SC1205
Figure 1 - Timing characteristics while driving a 3nf load at Tamb = 125°C after CO low to high transition.
Ch1. CO input going high (start of cycle) Ch2. BG drive Ch3. TG drive Cload = 3 nf C_delay = 0
Ch1. DRN (phase node) voltage going low Ch2. BG going high Cload = 3 nf C_delay = 0
Figure 2-Timing characteristics while driving a 3nf load at Tamb = 125°C after DRN voltage transition to a low voltage (DRN
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