SC2446A

Dual-Phase, Single or Dual Output Synchronous Step-Down Controller POWER MANAGEMENT Description The SC2446A is a high-frequency dual synchronous stepdown switching power supply controller. It provides outof-phase output gate signals. The SC2446A operates in synchronous continuous-conduction mode. Both phases are capable of maintaining regulation with sourcing or sinking load currents, making the SC2446A suitable for generating both VDDQ and the tracking VTT for DDR applications. The SC2446A employs fixed frequency peak currentmode control for the ease of frequency compensation and fast transient response. The dual-phase step-down controllers of the SC2446A can be configured to provide two individually controlled and regulated outputs or a single output with shared current in each phase. The Step-down controllers operate from an input of at least 4.7V and are capable of regulating outputs as low as 0.5V The step-down controllers in the SC2446A have the provision to sense inductor RDC voltage drop for current-mode control. This sensing scheme eliminates the need of the current-sense resistor and is more noise-immune than direct sensing of the high-side or the low-side MOSFET voltage. Precise current-sensing with sense resistor is optional. Individual soft-start and overload shutdown timer is included in each step-down controller. The SC2446A implements hiccup overload protection. In two-phase singleoutput configuration, the master timer controls the softstart and overload shutdown functions of both controllers. SC2446A Features 2-Phase synchronous continuous conduction mode for high efficiency step-down converters Out of phase operation for low input current ripples Output source and sink currents Fixed frequency peak current-mode control 50mV/-75mV maximum current sense voltage Inductive current-sensing for low-cost applications Optional resistor current-sensing for precise current-limit Dual outputs or 2-phase single output operation Excellent current sharing between individual phases Wide input voltage range: 4.7V to 16V Individual soft-start, overload shutdown and enable Duty cycle up to 88% 0.5V feedback voltage for low-voltage outputs External reference input for DDR applications Programmable frequency up to 1MHz per phase External synchronization Industrial temperature range 28-lead TSSOP lead free package. This product is fully WEEE and RoHS compliant Applications Telecommunication power supplies DDR memory power supplies Graphic power supplies Servers and base stations Typical Application Circuit V IN (1 2 V ) V IN G N D C6 R 55 R 49 C7 VO1 1 VDDO L6 C 62 C 45 R 46 10 11 VO CB U 10 VDDC PVCC 13 C 68 26 25 R 53 0 24 22 27 BST1 GDH 1 BST2 GDH 2 23 19 20 C 67 13 VDDC U9 VDDO VO 1 10 11 L5 C 65 R 14 C 23 VO2 C 74 VI VSSC 16 9 R 52 21 0 16 9 VI VSSC CB C 75 28 VSSO R 13 GD L1 PGND VPN 1 CS1+ CS1IN1COMP1 REF AGND R osc AVCC R EFOU T GD L2 VSSO 28 R 50 R CS-5 In te gra te d M O S F E T /D rive r R CS-6 VPN 2 CS2+ CS2IN2COMP2 REFIN VIN 2 SYNC SS1/EN 1 SS2/EN 2 U3 18 14 13 12 11 10 17 6 28 15 C 71 C 70 TP11 REF OUT (0. 5V) C 63 R 48 1 2 4 5 In te gra te d M O S F E T /D rive r VO1GND R 28 R 29 C 29 R 47 C 40 VIN C 72 C 73 R 45 REF OUT (0. 5V) VO2GND 8 7 3 16 9 R 51 C 64 Figure 1 Revision: November 9, 2005 REF OUT (0. 5V) SC2446A 1 www.semtech.com SC2446A POWER MANAGEMENT Absolute Maximum Rating Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability. Parameter Supply Voltage Gate Outputs GDH1, GDH2, GDL1, GDL2 voltages IN1-, IN2- Voltages REFOUT Voltages REF, REFIN Voltage COMP1, COMP2 Voltages CS1+, CS1-, CS2+ and CS2- Voltages SYNC Voltage SS1/EN1 AND SS2/EN2 Voltages Ambient Temperature Range Thermal Resistance Junction to Case (TSSOP-28) Thermal Resistance Junction to Ambient (TSSOP-28) Storage Temperature Range Lead Temperature (Soldering) 10 sec Maximum Junction Temperature Symbol AVCC VGDH1, VGDH2,VGDL1, VGDL2 VIN1-,VIN2VREF ,VREFOUT VREFIN VCOMP1,VCOMP2 VCS1+,VCS1-,VCS2+,VCS2VSYNC VSS1,VSS2 TA θJ C θJ A TSTG TLEAD TJ Maximum Ratings -0.3 to 16 -0.3 to 6 -0.3 to AVCC+0.3 -0.3 to 6 -0.3 to AVCC+0.3 -0.3 to AVCC+0.3 -0.3 to AVCC+0.3 -0.3 to AVCC+0.3 -0.3 to 6 -40 to 125 13 84 -60 to 150 260 150 Units V V V V V V V V V °C °C/W °C/W °C °C °C Electrical Characteristics Unless specified: AVCC = 12V, SYNC = 0, ROSC = 51.1kΩ, -40°C < TA = TJ < 125°C Parameter Undervoltage Lockout AVCC Start Threshold AVCC Start Hysteresis AVCC Operating Current AVCC Quiescent Current in UVLO Channel 1 Error Amplifier Input Common-Mode Voltage Range Inverting Input Voltage Range Input Offset Voltage Non-Inverting Input Bias Current Inverting Input Bias Current Amplifier Transconductance Amplifier Open-Loop Gain Amplifier Unity Gain Bandwidth Minimum COMP1 Switching Threshold  2005 Semtech Corp. Symbol Conditions Min Typ Max Units AVCCTH AVCCHYST ICC AVCC Increasing 4.5 0.2 4.7 V V AVCC= 12V AVCC = AVCCTH - 0.2V (Note 1) (Note 1) 0 ~ 70° C 0 0 8 2.5 15 mA mA 3 AVCC 1 -100 -100 260 65 5 ±3 -250 -250 V V mV nA nA µΩ−1 dΒ MHz V IREF IIN1GM1 aOL1 V C S 1+ = V C S 1- = 0 VSS1 Increasing 2 2.2 www.semtech.com SC2446A POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: AVCC = 12V, SYNC = 0, ROSC = 51.1kΩ, -40°C < TA = TJ < 125°C Parameter Amplifier Output Sink Current Amplifier Output Source Current Channel 2 Error Amplifier Input Common-mode Voltage Range Inverting Input Voltage Range Input Offset Voltage Non-inverting Input Bias Current Inverting Input Bias Current Inverting Input Voltage for 2-Phase Single Output Operation Amplifier Transconductance Amplifier Open-Loop Gain Amplifier Unity Gain Bandwidth Minimum COMP2 Switching Threshold Amplifier Output Sink Current Amplifier Output Source Current Oscillator Channel Frequency Synchronizing Frequency SYNC Input High Voltage SYNC Input Low Voltage SYNC Input Current Channel Maximum Duty Cycle Channel Minimum Duty Cycle Current-limit Comparators Input Common-Mode Range Cycle-by-cycle Peak Current Limit Valley Current Overload Shutdown Threshold Positive Current-Sense Input Bias Current Negative Current-Sense Input Bias Current Symbol Conditions VIN1- = 1V, VCOMP1 = 2.5V VIN1- = 0, VCOMP1 = 2.5V (Note 1) (Note 1) 0 ~ 70° C Min Typ 16 12 Max Units µA µA 0 0 1.5 -150 -100 2.5 3 AVCC ±3 -380 -250 V V mV nA nA V IIN2+ IIN2- GM2 aOL2 V C S 2+ = V C S 2- = 0 VSS2 Increasing VCOMP2 = 2.5V VCOMP2 = 2.5V fCH1, fCH2 0 ~ 70° C (Note 1) 450 2.1fCH 1.5 260 65 5 2.2 16 12 500 550 µΩ−1 dΒ MHz V µA µA KHz KHz V 0.5 V µA % 0 % V mV mV µA µA 1 50 ISYNC DMAX1, DMAX2 DMIN1, DMIN2 VSYNC = 0.2V VSYNC = 2V 88 0 VILIM1+, VILIM2+ VILIM1-, VILIM2ICS1+, ICS2+ ICS1-, ICS2VCS1- = VCS2- = 0.5V, Sourcing Mode, 0 ~ 70° C VCS1- = VCS2- = 0.5V, Sinking Mode, 0 ~ 70° C V C S 1+ = V C S 1- = 0 V C S 2- = V C S 2- = 0 V C S 1+ = V C S 1- = 0 V C S 2+ = V C S 2- = 0 40 -60 50 -75 -0.7 -0.7 AVCC - 1 60 -90 -2 -2  2005 Semtech Corp. 3 www.semtech.com SC2446A POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: AVCC = 12V, SYNC = 0, ROSC = 51.1kΩ, -40°C < TA = TJ < 125°C Parameter PWM Outputs Peak Source Current Peak Sink Current Output High Voltage Output Low Voltage Minimum On-Time Symbol Conditions Min Typ Max Units GDL1, GDL2, GDH1, GDH2 GDL1, GDL2, GDH1, GDH2 AVCC = 12V AVCC = 12V Source IO = 1.2mA, 0 ~ 70° C Sink IO = 1mA TA = 25°C 3.95 0 4 3 5 0.4 120 mA mA V V ns Soft-Start, Overload Latchoff and Enable Soft-Start Charging Current Overload Latchoff Enabling Soft-Start Voltage Overload Latchoff IN1- Threshold Overload Latchoff IN2- Threshold Soft-Start Discharge Current Overload Latchoff Recovery Soft-Start Voltage PWM Output Disable SS/EN Voltage PWM Output Enable SS/EN Voltage Internal 0.5V Reference Buffer Output Voltage Load Regulation Line Regulation VREFOUT IREFOUT = -1mA, 0°C < TA = TJ < 70°C 0 < IREFOUT < -5mA AVCCTH < AVCC < 15V, IREFOUT = -1mA 495 500 0.05 0.02% 505 mV %/mA %V ISS1, ISS2 VSS1 = VSS2 = 1.5V VSS1 and VSS2 Increasing VSS1 = 3.8V, VIN1-Decreasing VSS2 = 3.8V, VIN2-Decreasing VIN1-= 0.5VREF, ISS1(DIS), ISS2(DIS) VIN2-= 0.5VREFIN , VSS1 = VSS2 = 3.8V VSSRCV1, VSSRCV2 VSS1 and VSS2 Decreasing 0.3 0.7 1.8 3.2 0.5VREF 0.5 X VREFIN 1.2 0.5 0.8 1.2 1.5 0.7 µA V V V µA V V V Notes: (1) Guaranteed by design not tested in production. (2) This device is ESD sensitive. Use of standard ESD handling precautions is required.  2005 Semtech Corp. 4 www.semtech.com SC2446A POWER MANAGEMENT Pin Configurations TOP VIEW CS1+ CS1ROSC IN1COMP1 SYNC AGND REF REFOUT REFIN COMP2 IN2CS2CS2+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 SS1/EN1 VPN1 BST1 GDH1 GDL1 PVCC PGND GDL2 GDH2 BST2 VPN2 VIN2 AVCC SS2/EN2 Ordering Information Device SC2446AITSTRT(1)(2) S C 2446A E V B P ackag e TSSOP-28 Evaluation Board Temp. Range( TA) -40 to 125°C Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices for TSSOP package. (2) Lead free product. This product is fully WEEE and RoHS compliant. (28 Pin TSSOP) Figure 2  2005 Semtech Corp. 5 www.semtech.com SC2446A POWER MANAGEMENT Pin Descriptions TSSOP Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 Pin Name C S 1+ C S 1ROSC IN1COMP1 SYNC AGND REF REFOUT REFIN COMP2 IN2Pin Function The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller 1. The Inverting Input of the Current-sense Amplifier/Comparator for the Controller 1. Normally tied to the output of the converter. An external resistor connected from this pin to GND sets the oscillator frequency. Inverting Input of the Error Amplifier for the Step-down Controller 1. Tie an external resistive divider between OUTPUT1 and the ground for output voltage sensing. The Error Amplifier Output for Step-down Controller 1. This pin is used for loop compensation. Edge-triggered Synchronization Input. When not synchronized, tie this pin to a voltage above 1.5V or the ground. An external clock (frequency > frequency set with ROSC) at this pin synchronizes the controllers. Analog Signal Ground. The non-inverting input of the error amplifier for the step down converter 1. Buffered output of the internal reference voltage 0.5V. An external Reference voltage is applied to this pin.The non-inverting input of the error amplifier for the step-down converter 2 is internally connected to this pin. The Error Amplifier Output for Step-down Controller 2. This pin is used for loop compensation. Inverting Input of the Error Amplifier for the Step-down Controller 2. Tie an external resistive divider between output2 and the ground for output voltage sensing. Tie to AVCC for two-phase single output applications The Inverting Input of the Current-sense Amplifier/Comparator for the Controller 2. Normally tied to the output of the converter. The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller 2 An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for step-down converter 2. Pulling this pin below 0.7V shuts off the gate drivers for the second controller. Leave open for two-phase single output applications. Power Supply Voltage for the Analog Portion of the Controllers. No connection. No connection. No connection. PWM Output for the High-side N-channel MOSFET of Output 2. 13 14 15 16 17 18 19 20 C S 2C S 2+ SS2/EN2 AVCC VIN2 VPN2 BST2 GDH2  2005 Semtech Corp. 6 www.semtech.com SC2446A POWER MANAGEMENT Pin Descriptions Pin 21 22 23 24 25 26 27 28 Pin Name GDL2 PGND PVC C GDL1 GDH1 BST1 VPN1 SS1/EN1 Pin Function Logic Enable gate drive signal for Output 2. No connection. No connection. Logic Enable gate drive signal for Output 1. PWM Output for the High-side N-channel MOSFET of Output 1. No connection. No connection. An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for buck converter 1. Pulling this pin below 0.7V shuts off the gate drivers for the first controller.  2005 Semtech Corp. 7 www.semtech.com SC2446A POWER MANAGEMENT Block Diagram SYNC 6 ROSC 3 COMP1 5 IN14 REF 8 OSCILLATOR CLK FREQUENCY DIVIDER SLOPE COMP CLK2 CLK1 1.25V REFERENCE AVCC 16 BST1 26 0.5V GDH1 25 R S Q VPN1 27 UV GDL1 24 + SLOPE2 EA1 SLOPE1 + PWM1 CS1+ 1 CS12 + - ISEN1 + + Σ + Soft-Start And Overload Hiccup Control 1 OL1 DSBL1 PGND 22 SS1/EN1 28 VIN2 17 50mV 75mV REFOUT 9 - ILIM1+ I OCN1 + + ILIM1 - 0.5 (REFOUT) 0.5V PVCC UVLO 4.3/4.5V 23 - AGND 7 B A Y 0.5 (REFIN) SEL BST2 19 GDH2 20 R S Q VPN2 18 UV GDL2 21 COMP2 11 + 1.8V + SEL ANALOG SWITCH EA2 CLK2 IN212 REFIN 10 + SLOPE2 + PWM2 CS2+ 14 CS213 + - ISEN2 + + Σ + Soft-Start And Overload Hiccup Control 2 0.5 (REFIN) OL2 DSBL2 SS2/EN2 15 50mV 75mV - ILIM2 I OCN2 + ILIM2 - Figure 3. SC2446A Block Diagram  2005 Semtech Corp. 8 www.semtech.com SC2446A POWER MANAGEMENT Block Diagram OCN IN0.5(VREFOUT) / 0.5(VREFIN ) SS/EN + 1.8µΑ S Q R 0.5V/3.2V OL DSBL UVLO 0.8V/1.2V 3µΑ Figure 4. Soft-Start and Overload Hiccup Control Circuit  2005 Semtech Corp. 9 www.semtech.com SC2446A POWER MANAGEMENT Application Information SC2446A consists of two current-mode synchronous buck controllers with many integrated functions. By proper application circuitry configuration, SC2446A can be used to generate 1) two independent outputs from a common input or two different inputs or 2) dual phase output with current sharing, 3) current sourcing/sinking from common or separate inputs as in DDR (I and II) memory application. The application information related to the converter design using SC2446A is described in the following. Step-down Converter Starting from the following step-down converter specifications, Input voltage range: Vin ∈ [ Vin,min , Vin,max ] Input voltage ripple (peak-to-peak): ∆Vin Output voltage: Vo Output voltage accuracy: ε Output voltage ripple (peak-to-peak): ∆Vo Nominal output (load) current: Io Maximum output current limit: Io,max Output (load) current transient slew rate: dIo (A/s) Circuit efficiency: η Selection criteria and design procedures for the following are described. 1) output inductor (L) type and value, 2) output capacitor (Co) type and value, 3) input capacitor (Cin) type and value, 4) power MOSFET’s, 5) current sensing and limiting circuit, 6) voltage sensing circuit, 7) loop compensation network. Operating Frequency (fs) The switching frequency in the SC2446A is userprogrammable. The advantages of using constant frequency operation are simple passive component selection and ease of feedback compensation. Before setting the operating frequency, the following trade-offs should be considered. 1) 2) 3) 4) 5) Passive component size Circuitry efficiency EMI condition Minimum switch on time and Maximum duty ratio 10 www.semtech.com For a given output power, the sizes of the passive components are inversely proportional to the switching frequency, whereas MOSFETs/Diodes switching losses are proportional to the operating frequency. Other issues such as heat dissipation, packaging and the cost issues are also to be considered. The frequency bands for signal transmission should be avoided because of EM interference. Minimum Switch On Time Consideration In the SC2446A the falling edge of the clock turns on the top MOSFET gate. The inductor current and the sensed voltage ramp up. After the sensed voltage crosses a threshold determined by the error amplifier output, the top MOSFET gate is turned off. The propagation delay time from the turn-on of the controlling FET to its turnoff is the minimum switch on time. The SC2446A has a minimum on time of about 120ns at room temperature. This is the shortest on interval of the controlling FET. The controller either does not turn on the top MOSFET at all or turns it on for at least 120ns. For a synchronous step-down converter, the operating duty cycle is VO/VIN. So the required on time for the top MOSFET is VO/(VINfs). If the frequency is set such that the required pulse width is less than 120ns, then the converter will start skipping cycles. Due to minimum on time limitation, simultaneously operating at very high switching frequency and very short duty cycle is not practical. If the voltage conversion ratio VO/VIN and hence the required duty cycle is higher, the switching frequency can be increased to reduce the sizes of passive components. There will not be enough modulation headroom if the on time is simply made equal to the minimum on time of the SC2446A. For ease of control, we recommend the required pulse width to be at least 1.5 times the minimum on time.  2005 Semtech Corp. SC2446A POWER MANAGEMENT Application Information (Cont.) Setting the Switching Frequency The switching frequency is set with an external resistor connected from Pin 3 to the ground. The set frequency is inversely proportional to the resistor value (Figure 5). The followings are to be considered when choosing inductors. a) Inductor core material: For high efficiency applications above 350KHz, ferrite, Kool-Mu and polypermalloy materials should be used. Low-cost powdered iron cores can be used for cost sensitive-applications below 350KHz but with attendant higher core losses. b) Select inductance value: Sometimes the calculated inductance value is not available off-the-shelf. The designer can choose the adjacent (larger) standard inductance value. The inductance varies with temperature and DC current. It is a good engineering practice to re-evaluate the resultant current ripple at the rated DC output current. c) Current rating: The saturation current of the inductor should be at least 1.5 times of the peak inductor current under all conditions. Output Capacitor (Co) and Vout Ripple Figure 5. Free running frequency vs. ROSC. Inductor (L) and Ripple Current Both step-down controllers in the SC2446A operate in synchronous continuous-conduction mode (CCM) regardless of the output load. The output inductor selection/design is based on the output DC and transient requirements. Both output current and voltage ripples are reduced with larger inductors but it takes longer to change the inductor current during load transients. Conversely smaller inductors results in lower DC copper losses but the AC core losses (flux swing) and the winding AC resistance losses are higher. A compromise is to choose the inductance such that peak-to-peak inductor ripple-current is 20% to 30% of the rated output load current. Assuming that the inductor current ripple (peak-to-peak) value is δ*Io, the inductance value will then be L= Vo (1 − D) . δIo fs 800 700 600 fs (kHz) 500 400 300 200 100 0 0 50 100 150 200 250 Rosc (k Ohm) The output capacitor provides output current filtering in steady state and serves as a reservoir during load transient. The output capacitor can be modeled as an ideal capacitor in series with its parasitic ESR (Resr) and ESL (Lesl) (Figure 6). Co Lesl Resr Figure 6. An equivalent circuit of Co. If the current through the branch is ib(t), the voltage across the terminals will then be di ( t ) 1 v o ( t ) = Vo + ib ( t )dt + L esl b + R esr ib ( t ). Co 0 dt The peak current in the inductor becomes (1+δ/2)*Io and the RMS current is IL,rms = Io 1 + δ2 . 12 ∫ t This basic equation illustrates the effect of ESR, ESL and Co on the output voltage. The first term is the DC voltage across Co at time t=0. The second term is the voltage variation caused by the 11 www.semtech.com  2005 Semtech Corp. SC2446A POWER MANAGEMENT Application Information (Cont.) charge balance between the load and the converter output. The third term is voltage ripple due to ESL and the fourth term is the voltage ripple due to ESR. The total output voltage ripple is then a vector sum of the last three terms. Since the inductor current is a triangular waveform with peak-to-peak value δ*Io, the ripple-voltage caused by inductor current ripples is ∆v C ≈ δIo , 8C o fs The voltage rating of aluminum capacitors should be at least 1.5Vo. The RMS current ripple rating should also be greater than δIo 23 . Usually it is necessary to have several capacitors of the same type in parallel to satisfy the ESR requirement. The voltage ripple cause by the capacitor charge/discharge should be an order of magnitude smaller than the voltage ripple caused by the ESR. To guarantee this, the capacitance should satisfy Co > 10 . 2πfsR esr the ripple-voltage due to ESL is ∆v ESL δI = L esl fs o , D and the ESR ripple-voltage is ∆v ESR = R esr δIo . Aluminum capacitors (e.g. electrolytic, solid OS-CON, POSCAP, tantalum) have high capacitances and low ESL’s. The ESR has the dominant effect on the output ripple voltage. It is therefore very important to minimize the ESR. When determining the ESR value, both the steady state ripple-voltage and the dynamic load transient need to be considered. To keep the steady state output ripple-voltage < ∆Vo, the ESR should satisfy R esr1 < ∆Vo . δIo In many applications, several low ESR ceramic capacitors are added in parallel with the aluminum capacitors in order to further reduce ESR and improve high frequency decoupling. Because the values of capacitance and ESR are usually different in ceramic and aluminum capacitors, the following remarks are made to clarify some practical issues. Remark 1: High frequency ceramic capacitors may not carry most of the ripple current. It also depends on the capacitor value. Only when the capacitor value is set properly, the effect of ceramic capacitor low ESR starts to be significant. For example, if a 10 µ F, 4m Ω c eramic capacitor is connected in parallel with 2x1500µF, 90mΩ electrolytic capacitors, the ripple current in the ceramic capacitor is only about 42% of the current in the electrolytic capacitors at the ripple frequency. If a 100 µF, 2m Ω ceramic capacitor is used, the ripple current in the ceramic capacitor will be about 4.2 times of that in the electrolytic capacitors. When two 100µF, 2mΩ ceramic capacitors are used, the current ratio increases to 8.3. In this case most of the ripple current flows in the ceramic decoupling capacitor. The ESR of the ceramic capacitors will then determine the output ripple-voltage. Remark 2: The total equivalent capacitance of the filter bank is not simply the sum of all the paralleled capacitors. The total equivalent ESR is not simply the parallel combination of all the individual ESR’s either. Instead they should be calculated using the following formulae. To limit the dynamic output voltage overshoot/ undershoot within α (say 3%) of the steady state output voltage) from no load to full load, the ESR value should satisfy R esr 2 < αVo . Io Then, the required ESR value of the output capacitors should be Resr = min{Resr1,Resr2 }.  2005 Semtech Corp. 12 www.semtech.com SC2446A POWER MANAGEMENT Application Information (Cont.) C eq (ω) := (R1a + R1b )2 ω2C1a C1b + (C1a + C1b )2 (R1a C1a + R1b C1b )ω2 C1a C1b + (C1a + C1b ) R1aR1b (R1a + R1b )ω2C1a C1b + (R1b C1b + R1a C1a ) (R1a + R1b )2 ω2 C1a C1b + (C1a + C1b )2 2 2 2 2 2 2 2 2 2 2 R eq (ω) := where R 1a a nd C 1a a re the ESR and capacitance of electrolytic capacitors, and R1b and C1b are the ESR and capacitance of the ceramic capacitors respectively. (Figure 7) Figure 8. A simple model for the converter input In Figure 8 the DC input voltage source has an internal impedance Rin and the input capacitor Cin has an ESR of Resr. MOSFET and input capacitor current waveforms, ESR voltage ripple and input voltage ripple are shown in Figure 9. C1a C1b Ceq R1a R1b Req Figure 7. Equivalent RC branch. Req and Ceq are both functions of frequency. For rigorous design, the equivalent ESR should be evaluated at the ripple frequency for voltage ripple calculation when both ceramic and electrolytic capacitors are used. If R1a = R1b = R1 and C1a = C1b = C1, then Req and Ceq will be frequencyindependent and Req = 1/2 R1 and Ceq = 2C1. Input Capacitor (Cin) The input supply to the converter usually comes from a pre-regulator. Since the input supply is not ideal, input capacitors are needed to filter the current pulses at the switching frequency. A simple buck converter is shown in Figure 8. Figure 9. Typical waveforms at converter input. It can be seen that the current in the input capacitor pulses with high di/dt. Capacitors with low ESL should be used. It is also important to place the input capacitor close to the MOSFETs on the PC board to reduce trace inductances around the pulse current loop. The RMS value of the capacitor current is approximately ICin = Io D[(1 + δ2 D D )(1 − )2 + 2 (1 − D) ]. η 12 η  2005 Semtech Corp. 13 www.semtech.com SC2446A POWER MANAGEMENT Application Information (Cont.) The power dissipated in the input capacitors is then PCin = ICin2Resr. For reliable operation, the maximum power dissipation in the capacitors should not result in more than 10oC of temperature rise. Many manufacturers specify the maximum allowable ripple current (ARMS) rating of the capacitor at a given ripple frequency and ambient temperature. The input capacitance should be high enough to handle the ripple current. For higher power applications, multiple capacitors are placed in parallel to increase the ripple current handling capability. Sometimes meeting tight input voltage ripple specifications may require the use of larger input capacitance. At full load, the peak-to-peak input voltage ripple due to the ESR is δ ∆v ESR = R esr (1 + )Io . 2 Let the duty ratio and output current of Channel 1 and Channel 2 be D1, D2 and Io1, Io2, respectively. If D1