SC658EVB

SC658 POWER MANAGEMENT Features               Backlight Driver for 4 LEDs with SemPulseTM Interface Description The SC658 is a high efficiency charge pump LED driver using Semtech’s proprietary charge pump technology. Performance is optimized for use in single-cell Li-ion battery applications. The charge pump provides backlight current utilizing four matched current sinks. The load and supply conditions determine whether the charge pump operates in x, .5x, or 2x mode. An optional fading feature that gradually a djusts the backlight current is provided to simplify control software. The SC658 uses the proprietary SemPulseTM single wire interface to control all functions of the device, including backlight currents. The single wire interface minimizes microcontroller and interface pin counts. The four LEDs can be grouped in up to three separate banks that can be independently controlled. The SC658 enters sleep mode when all the LED drivers are disabled. In this mode, the quiescent current is reduced while the device continues to monitor the SemPulse interface. With a 2 x 2 (mm) package and four small capacitors, the SC658 provides a complete LED driver solution with a minimal PCB footprint. Input supply voltage range — 2.9V to 5.5V Very high efficiency charge pump driver system with three modes — x, .5x and 2x Four programmable current sinks — 0mA to 25mA Up to three LED grouping options Fade-in/fade-out feature for main LED bank Charge pump frequency — 250kHz SemPulse single wire interface Backlight current accuracy — ±.5% typical Backlight current matching — ±0.5% typical LED float detection Automatic sleep mode (LEDs off ) — IQ = 60µA (typ.) Shutdown current — 0.µA (typical) Ultra-thin package — 2 x 2 x 0.6 (mm) Fully WEEE and RoHS compliant Applications       Cellular phones, smart phones, and PDAs LCD modules Portable media players Digital cameras Personal navigation devices Display/keypad backlighting and LED indicators Typical Application Circuit VBAT = 2.9 to 5.5V CIN 2.2µF From Microprocessor SPIF IN OUT COUT 2.2µF BL1 BL2 BL3 BL4 SC658 GND C1+ C1C1 2.2µF C2+ C2C2 2.2µF US Patents: 6,504,422; 6,794,926  April 3, 2009 © 2009 Semtech Corporation SC658 Pin Configuration IN OUT B L2 B L1 Ordering Information Device SC658ULTRT()(2) SC658EVB Package MLPQ-UT-4 2×2 Evaluation Board 14 13 12 11 BL3 BL4 NC 1 2 3 TOP VIEW 10 9 8 C2+ C 1+ C1- Notes: () Available in tape and reel only. A reel contains 3,000 devices. (2) Lead-free package only. Device is WEEE and RoHS compliant. 4 5 6 7 NC S P IF MLPQ-UT-14; 2x2, 14 LEAD θJA = 127°C/W Marking Information ...AG yw AG = Marking code for SC658 yw = Date Code GND C2- 2 SC658 Absolute Maximum Ratings IN, OUT (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 C+, C2+ (V) . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 to (V OUT + 0 .3) Pin Voltage — All Other Pins (V) . . . . . . . . - 0.3 to (V IN + 0 .3) OUT Short Circuit Duration . . . . . . . . . . . . . . . . Continuous ESD Protection Level() (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Recommended Operating Conditions Ambient Temperature Range (°C) . . . . . . . . -40 ≤ TA ≤ +85 Input Voltage (V) . . . . . . . . . . . . . . . . . . . . . . . 2.9 ≤ VIN ≤ 5.5 Output Voltage (V) . . . . . . . . . . . . . . . . . . . . . 2.5 ≤ VOUT ≤ 5.25 Voltage Difference between any two LEDs (V). . ∆VF < .0(2) Thermal Information Thermal Resistance, Junction to Ambient(3) (°C/W) . . 27 Maximum Junction Temperature (°C) . . . . . . . . . . . . . . . +50 Storage Temperature Range (°C) . . . . . . . . . . . -65 to +50 Peak IR Reflow Temperature (0s to 30s) (°C) . . . . . . +260 Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: () Tested according to JEDEC standard JESD22-A4 (2) ∆VF(max) = .0V when VIN = 2.9V, higher VIN supports higher ∆VF(max) (3) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB per JESD5 standards. Electrical Characteristics Unless otherwise noted, TA = +25°C for Typ, -40°C to +85°C for Min and Max, TJ(MAX) = 25°C, VIN = 3.7 V, CIN= C= C2= COUT = 2.2µF (ESR = 0.03Ω)() Parameter Shutdown Current Symbol IQ(OFF) Conditions Min Typ 0. Max 2 00 Units µA µA All outputs disabled, SPIF = VIN(2) Charge pump enabled, x Mode, all LEDs on, IBLn = 0.5mA Charge pump in x mode, 2.9V 2.5V Increasing VIN, lock-out released Hysteresis OUT pin open circuit, VOUT = VOVP, rising threshold Rising temperature Min Typ 3.24 250 3.07 0. 250 60 Max Units V mV V  µA kHz mA 300 2.7 800 5.7 60 20 6.0 V mV V °C °C Under Voltage Lockout Over-Voltage Protection Over-Temperature OT Hysteresis VOVP TOT TOT-HYS 4 SC658 Electrical Characteristics (continued) Parameter SemPulse Interface Input High Threshold Input Low Threshold Input High Current Input Low Current Start up Time(5) Bit Pulse Duration(6) Duration Between Pulses(6) Hold Time - Address(6) Hold Time - Data(6) Bus Reset Time (6) Shutdown Time (7) VIH VIL IIH IIL tSU tHI tLO tHOLDA tHOLDD tBR tSD Software limit — SPIF must be held high for this amount of time to latch the data Software limit — SPIF must be held high for this amount of time to latch the address Software Limit — SPIF must be held high for this amount of time to force a bus system reset Software Limit — SPIF must be held low for this amount of time to disable device VIN = 5.5V VIN = 2.9V VIN = 5.5V VIN = 5.5V Only required when leaving shutdown mode - -  0.75 0.75 550 550 2 0 250 250 5000 .6 0.4 + + V V µA µA ms µs µs µs µs ms ms Symbol Conditions Min Typ Max Units Notes: () Capacitors are MLCC of X5R type. Production tested with higher value capacitors than the application requires (2) SPIF is high for more than 0ms to place serial bus in standby mode (3) Current matching is defined as ± [IBL(MAX) - IBL(MIN] / [IBL(MAX) + IBL(MIN)]. (4) Test voltage is VOUT = 4.2V — a relatively extreme LED voltage — to force a transition during test. Typically VF = 3.2V for white LEDs. (5) The SemPulse start-up time is the minimum time that the SPIF pin must be held high to enable the part before starting communication. (6) The source driver used to provide the SemPulse Output must meet these limits. (7) The SemPulse shutdown time is the minimum time that the SPIF pin must be pulled low to shut the part down. 5 SC658 Typical Characteristics All data taken with TA = +25 °C, VIN = 3.7V, CIN = C = C2 = COUT = 2.2µF (ESR = 0.03Ω) unless otherwise noted. 100 CIN = COUT = 4.7µF, VOUT = 3.61V Backlight Efficiency (4 LEDs) — 25mA Each 3 2 1 0 -1 -2 -3 4 .2 Backlight Matching (4 LEDs) — 25mA Each CIN = COUT = 4.7µF 90 Efficiency (%) 80 70 60 50 4 .2 3.9 3 .6 VIN (V) 3 .3 3 2 .7 Matching (%) 3 .9 3.6 VIN (V) 3.3 3 2 .7 Backlight Efficiency (4 LEDs) — 12mA Each 100 VOUT = 3.44V 3 Backlight Matching (4 LEDs) — 12mA Each 90 2 1 Efficiency (%) 80 Matching (%) 0 -1 70 60 -2 -3 4.2 50 4.2 3.9 3 .6 VIN (V) 3 .3 3 2.7 3.9 3 .6 VIN (V) 3.3 3 2.7 Backlight Efficiency (4 LEDs) — 4.5mA Each 100 VOUT = 3.27V 3 2 Backlight Matching (4 LEDs) — 4.5mA Each 90 Efficiency (%) Matching (%) 80 1 0 -1 70 60 -2 -3 4 .2 50 4 .2 3 .9 3 .6 VIN (V) 3 .3 3 2 .7 3.9 3 .6 VIN(V) 3 .3 3 2 .7 6 SC658 Typical Characteristics (continued) Backlight Accuracy (4 LEDs) — 12mA Each 8 6 4 Output Short Circuit Current Limit VOUT (V/div) Accuracy (%) 2 0 -2 ACC Max % 0 ACC Min % -4 -6 -8 4.2 2 .7 IOUT (50mA/div) 0 1ms�div s�div �div 3 .9 3 .6 VIN (V) 3.3 3 Ripple — 1x Mode CIN = COUT = 4.7µF, 4 LEDs, — 5mA each VIN (00mV/div) CIN = COUT = 4.7µF, VIN = 2.9V, 4 LEDs, — 5mA each VIN (00mV/div) Ripple — 1.5x Mode VOUT (00mV/div) IBL (0mA/div) VOUT (00mV/div) IBL (0mA/div) 20µs�div s�div �div 20µs�div s�div �div CIN = COUT = 4.7µF, VIN = 2.9V, 4 LEDs — 5mA each VIN (00mV/div) VBL (500mV/div) Ripple — 2x Mode Output Open Circuit Protection VOUT (00mV/div) VOUT (V/div) IBL (0mA/div) IBL (0mA/div) 0 20µs�div s�div �div 20µs�div s�div �div 7 SC658 Pin Descriptions Pin #  2 3 4 5 6 7 8 9 0  2 3 4 Pin Name BL3 BL4 NC NC SPIF GND C2CC+ C2+ OUT IN BL BL2 Pin Function Current sink output for main backlight LED 3 — leave this pin open if unused Current sink output for main backlight LED 4 — leave this pin open if unused No connection No connection SemPulse single wire interface pin — used to enable/disable the device and to configure all registers (refer to Register Map and SemPulse Interface sections) Ground pin Negative connection to bucket capacitor 2 Negative connection to bucket capacitor  Positive connection to bucket capacitor  Positive connection to bucket capacitor 2 Charge pump output — all LED anode pins should be connected to this pin Battery voltage input Current sink output for main backlight LED  — leave this pin open if unused Current sink output for main backlight LED 2 — leave this pin open if unused 8 SC658 Block Diagram C1+ 9 C18 C2+ 10 C27 IN 12 Fractional Charge Pump (1x, 1.5x, 2x) 11 OUT SPIF 5 SemPulse Digital Interface and Logic Control Oscillator 13 14 1 BL1 BL2 BL3 BL4 NC NC GND 6 Current Setting DAC 2 3 4 9 SC658 Applications Information General Description This design is optimized for handheld applications sup plied from a single Li-ion cell and includes the following key features: pin to minimize noise and support the output current requirements of up to 90mA. For output currents higher than 90mA, a nominal value of 4.7µF is recommended for COUT and CIN. Capacitors with X7R or X5R ceramic dielectric are strongly recommended for their low ESR and superior temperature and voltage characteristics. Y5V capacitors should not be used as their temperature coefficients make them unsuitable for this application. It is important to ensure the minimum capacitance value of each capacitor does not drop below µF. This may require the use of 2.2µF capacitors to be sure that the degradation of capacitance due to DC voltage does not cause the capacitance to go below µF. • • • A high efficiency fractional charge pump that supplies power to all LEDs Four matched current sinks that control LED backlighting current, providing 0mA to 25mA per LED LEDs can be grouped in up to three independently controlled banks High Current Fractional Charge Pump The backlight outputs are supported by a high efficiency, high current fractional charge pump output. The charge pump multiplies the input voltage by x, .5x, or 2x. The charge pump switches at a fixed frequency of 250kHz in .5x and 2x modes and is disabled in x mode to save power and improve efficiency. The mode selection circuit automatically selects the mode as x, .5x, or 2x based on circuit conditions such as LED voltage, input voltage, and load current. The x mode is the most efficient of the three modes, followed by .5x and 2x modes. Circuit conditions such as low input voltage, high output current, or high LED voltage place a higher demand on the charge pump output. A higher numerical mode (.5x or 2x) may be needed momentarily to maintain regulation at the OUT pin during intervals of high demand. The charge pump responds to momentary high demands, setting the charge pump to the optimum mode to deliver the output voltage and load current while optimizing efficiency. Hysteresis is provided to prevent mode toggling. The charge pump requires two bucket capacitors for proper operation. One capacitor must be connected between the C+ and C- pins and the other must be connected between the C2+ and C2- pins as shown in the Typical Application Circuit diagram. These capacitors should be equal in value, with a minimum capacitance of µF to support the charge pump current requirements. The device also requires at least µF of capacitance on the IN pin and at least µF of capacitance on the OUT LED Backlight Current Sinks The backlight current is set via the SemPulse interface. The current is regulated to one of 29 values between 0mA and 25mA. The step size varies depending upon the current setting. Between 0mA and 5mA, the step size is 0.5mA. The step size increases to mA for settings between 5mA and 2mA. Steps are 2mA between 2mA and 25mA. The variation in step size allows finer adjustment for dimming functions in the low current setting range and coarse adjustment at higher current settings where small current changes are not visibly noticeable in LED brightness. A zero setting is also included to allow the current sink to be disabled by writing to either the enable bit or the current setting register for maximum flexibility. All backlight current sinks have matched currents, even when there is a variation in the forward voltages (∆VF ) of the LEDs. A ∆VF difference of .0V is supported when the input voltage is at 2.9V. Higher ∆VF LED mis-match is supported when VIN is higher than 2.9V. All current sink outputs are compared and the lowest output is used for setting the voltage regulation at the OUT pin. This is done to ensure that sufficient bias exists for all LEDs. The backlight LEDs default to the off state upon power-up. For backlight applications using less than four LEDs, any unused output must be left open and the unused LED must remain disabled. When writing to the backlight enable register, a zero (0) must be written to the corresponding bit of any unused output. 0 SC658 Applications Information (continued) Backlight Quiescent Current The quiescent current required to operate all backlights is reduced when the backlight current is set to 4.0mA or less. This feature results in higher efficiency under light-load conditions. Further reduction in quiescent current will result from using fewer than the maximum number of LEDs. ister. When a new backlight level is written during an ongoing fade operation, the fade will be redirected to the new value from the present state. An ongoing fade operation may be cancelled by disabling fade which will result in the backlight current changing immediately to the final value. If fade is disabled, the current level will change immediately without the fade delay. The state diagram in Figure  describes the fade operation. More details can be found in the Register Map section. Immediate change to new bright level Write new bright level FADE=0 Write FADE=1 LED Banks The LEDs can be grouped in up to three independently controlled LED banks. Using the SemPulse interface, the four LED drivers can be grouped as described in the Backlight Grouping Configuration subsection. The banks can be used to provide up to three different current options. This can be useful for controlling keypad, display, and auxiliary backlight operation from one SC658 device. The LED banks provide versatility by allowing backlights to be controlled independently. For example, applications that have a main and sub display may also need to supply an indicator LED. The three bank option allows the SC658 to control each function with different current settings. Another application involves backlighting two displays and a keypad, each requiring different brightness settings. A third scenario requires supplying different brightness levels to different types of LEDs (such as RGB) to create display effects. In all applications, the brightness level for each LED can be set independently. No change FADE=0 Write FADE=0 Immediate change to new bright level Write FADE=0 FADE=1 FADE=1 No change Write FADE=1 Fade=0 Write new bright level Fade ends Fade begins Fade is redirected toward the new value from current state Backlight Fade-in / Fade-out Function The SC658 contains bits that control the fade state of the main bank. When enabled, the fade function causes the backlight settings to step from their current state to the next programmed state as soon as the new state is stored in its register. For example, if the backlight is set at 25mA and the next setting is the off state, the backlight will step from 25mA down to 0mA using all settings at the fade rate specified by the bits in register 04h. The same is true when turning on or increasing the backlight current — the backlight current will step from the present level to the new level at the step rate defined in register 04h. This process applies to the main display only. The fade rate may be changed dynamically when a fade operation is active by writing new values to the fade reg- No change Write Fade=1 Fade processing(1) Write new bright level Write new fade rate Note: (1) When the data in backlight enable register 00h is not 00h Continue fade using new rate Figure 1 — State Diagram for Fade Function Fade-In from Off State When the initial state of the main backlight current register is 00h (the data value for 0mA), fading to an on state is accomplished by following the steps listed in Table . Following these steps explicitly will ensure that the fadein operation will proceed with no interruption at the rate specified in the Main Fade register (04h). This procedure  SC658 Applications Information (continued) must be followed regardless of which backlight grouping configuration is being used. Note that it is only necessary to set the BLEN bits for the main display. Table 1 — Fade-In from Off State Command Sequence . Disable fade 2. Set Main backlights to 0.5mA 3. Enable fade Table 3 — Fading between Different On States Command Sequence . Enable fade 2. Set new value of backlight current Action Write to register 04h Write to register 0h Data 0h, 02h, or 03h Any value from 05h through Fh Action Write to register 04h Write to register 0h Write to register 04h Data 00h 04h 0h, 02h, or 03h Any value from 0h through 3Fh Any value from 05h through Fh 4. Set BLEN bits 5. Set new value of backlight current Write to register 00h Additional Information For more details about the Fade-in/Fade-out function, refer to the SC658 Backlight Driver Software User’s Guide and SemPulse Interface Specification document and to the a ssociated software drivers available for this device (contact your sales office for more details). Shutdown Mode The device is disabled when the SPIF pin is held low for the shutdown time specified in the electrical characteristics section. All registers are reset to default condition at shutdown. Write to register 0h Fade-Out from any On State to Off State Fading the backlight LEDs from any active state to the off state follows a simple procedure. The sequence of commands for this action is shown in Table 2. Following these steps explicitly will ensure that the fade-out operation will proceed with no interruption at the rate specified in the Main Fade register (04h). This procedure must be followed regardless of the backlight grouping configuration. Table 2 — Fade-Out from any On State to Off State Command Sequence . Enable fade 2. Set Main backlights to 0mA Sleep Mode When all LEDs are disabled, sleep mode is activated. This is a reduced current mode that helps minimize overall c urrent consumption by disabling the clock and the charge pump while continuing to monitor the serial interface for commands. An additional current savings can be obtained by putting the serial interface in standby mode (see SemPulse Interface, Standby Mode). Action Write to register 04h Write to register 0h Data 0h, 02h, or 03h (but not 00h) 00h Protection Features The SC658 provides several protection features to safe guard the device from catastrophic failures. These features include: Fading Between Different On States Fading from one backlight level to another (up or down) also follows a simple procedure. The sequence of commands for this action is shown in Table 3. Following these steps explicitly will ensure that the fade-in/fade-out operation will proceed with no interruption at the rate specified in the Main Fade register (04h). This procedure must be f ollowed regardless of the backlight grouping configuration. • • • • Output Open Circuit Protection Over-Temperature Protection Charge Pump Output Current Limit LED Float Detection Output Open Circuit Protection Over-Voltage Protection (OVP) at the OUT pin prevents the charge pump from producing an excessively high output voltage. In the event of an open circuit between the OUT pin and all current sinks (no loads connected), the charge 2 SC658 Applications Information (continued) pump runs in open loop and the voltage rises up to the OVP limit. OVP operation is hysteretic, meaning the charge pump will momentarily turn off until VOUT is sufficiently reduced. The maximum OVP threshold is 6.0V, allowing the use of a ceramic output capacitor rated at 6.3V. Over-Temperature Protection The Over-Temperature (OT) protection circuit prevents the device from overheating and experiencing a catastrophic failure. When the junction temperature exceeds 60°C, the device goes into thermal shutdown with all outputs disabled until the junction temperature is reduced. All register information is retained during thermal shutdown. Hysteresis of 20°C is provided to ensure that the device cools sufficiently before re-enabling. Charge Pump Output Current Limit The device limits the charge pump current at the OUT pin. If the OUT pin is shorted to ground, or VOUT is lower than VUVLO, the typical output current limit is 60mA. The output current is limited to 300mA when over loaded resistively with VOUT greater than 2.5V. LED Float Detection Float detect is a fault detection feature of the LED backlight outputs. If an output is programmed to be enabled and an open circuit fault occurs at any backlight output, that output will be disabled to prevent a sustained output OVP condition from occurring due to the resulting open loop. Float detect ensures device protection but does not ensure optimum performance. Unused LED outputs must b e disabled to prevent an open circuit fault from occurring. PCB Layout Considerations Following fundamental layout rules is critical for achieving the performance specified in the Electrical Characteristics table. The following guidelines are recommended when developing a PCB layout: • • • Place all capacitors (C, C2, CIN, and COUT) as close to the device as possible. All charge pump current passes through the IN/ OUT and the bucket capacitor connection pins. Ensure that all connections to these pins make the of wide traces so that the resistive drop on each connection is minimized. Make all ground connections to a solid ground plane as shown in the example layout . Figure 2 — Suggested Layout Thermal Management Although the SC658 can provide up to 00mA output c urrent, the maximum thermal temperature and the thermal resistance (θJA) of the package and layout may l imit the output current. Thermal resistance can be lowered by following the recommended layout guidelines in PCB Layout Considerations, as illustrated in Figure 2. 3 SC658 SemPulseTM Interface Introduction SemPulse is a write-only single wire interface. It provides the capability to access up to 32 registers that control device functionality. Two sets of pulse trains are transmitted via the SPIF pin. The first pulse set is used to set the desired address. After the bus is held high for the address hold period, the next pulse set is used to write the data value. After the data pulses are transmitted, the bus is held high again for the data hold period to signify the data write is complete. At this point the device latches the data into the address that was selected by the first set of pulses. See the SemPulse Timing Diagrams for descriptions of all timing parameters. register bits per register. Just like with the address write, the data write is only accepted if the bus is held high for tHOLDD when the pulse train is completed. If the proper hold time is not received, the interface will keep counting pulses until the hold time is detected. If the total exceeds 63 pulses, the write will be ignored and the bus will reset after the next valid hold time is detected. After the bus has been held high for tHOLDD, the bus will expect the next pulse set to be an address write. Note that this is the same effect as the bus reset that occurs when tHOLDA exceeds its m aximum specification. For this reason, there is no maximum limit on tHOLDD — the bus simply waits for the next valid address to be transmitted. Chip Enable/Disable The device is enabled when the SemPulse interface pin (SPIF) is pulled high for greater than tSU. If the SPIF pin is pulled low again for more than tSD, the device will be disabled. Multiple Writes It is important to note that this single-wire interface requires the address to be paired with its corresponding data. If it is desired to write multiple times to the same address, the address must always be re-transmitted prior to the corresponding data. If it is only transmitted one time and followed by multiple data transmissions, every other block of data will be treated like a new address. The result will be invalid data writes to incorrect addresses. Note that multiple writes only need to be separated by the minimum tHOLDD for the slave to interpret them correctly. As long as tHOLDA between the address pulse set and the data pulse set is less than its maximum specification but greater than its minimum, multiple pairs of address and data pulse counts can be made with no detrimental effects. Address Writes The first set of pulses can range between 0 and 3 (or  to 32 rising edges) to set the desired address. After the pulses are transmitted, the SPIF pin must be held high for tHOLDA to signal to the slave device that the address write is finished. If the pulse count is between 0 and 3 and the line is held high for tHOLDA, the address is latched as the destination for the next data write. If the SPIF pin is not held high for tHOLDA, the slave device will continue to count pulses. Note that if tHOLDA exceeds its maximum specification, the bus will reset. This means that the communication i s ignored and the bus resumes monitoring the pin, expecting the next pulse set to be an address. If the total exceeds 3 pulses, SPIF must be held high until the bus r eset time t BR i s exceeded before commencing communication. Standby Mode Once data transfer is completed, the SPIF line must be returned to the high state for at least 0ms to return to the standby mode. In this mode, the SPIF line remains idle while monitoring for the next command. This mode a llows the device to minimize current consumption between commands. Once the device has returned to standby mode, the bus is automatically reset to expect the address pulses as the next data block. This safeguard is intended to reset the bus to a known state (waiting for the beginning of a write sequence) if the delay exceeds the reset threshold. Data Writes After the bus has been held high for the minimum address hold period, the next set of pulses are used to write the data value. The total number of pulses can range from 0 to 63 (or  to 64 rising edges) since there are a total of 6 4 SC658 SemPulseTM Interface (continued) SemPulse Timing Diagrams The SemPulse single wire interface is used to enable or disable the device and configure all registers (see Figure 3). The timing parameters refer to the digital I/O electrical specifications. Address is set Up to 32 rising edges (0 to 31 pulses) Up to 64 rising edges (0 to 63 pulses) Data is written SPIF t = tSU t = tHOLDA tHI tLO t = tHOLDD Figure 3 — Uniform Timing Diagram for SemPulse Communication Timing Example 1 In this example (see Figure 4), the slave chip receives two sets of pulses to set the address and data, and the pulses experience interrupts that cause the pulse width to be nonuniform. Note that as long as the maximum high and low times are satisfied and the hold times are within specification, the data transfer is completed regardless of the number of interrupts that delay the transmission. Address is set to register 02h SPIF Data written is 000011 t = tSU tHI t < tHImax t = tHOLDA t < tLOmax tLO t = tHOLDD Figure 4 — SemPulse Data Write with Non-Uniform Pulse Widths Timing Example 2 In this example (see Figure 5), the slave chip receives two sets of pulses to set the address and data, but an interrupt occurs during a pulse that causes it to exceed the minimum address hold time. The write is meant to be the value 03h in register 05h, but instead it is interpreted as the value 02h written to register 02h. The extended pulse that is delayed by the interrupt triggers a false address detection, causing the next pulse set to be interpreted as the data set. To avoid any problems with timing, make sure that all pulse widths comply with their timing requirements as outlined in this datasheet. Address is set to register 02h Data written is 000010 Address is set to register 03h (address and data are now out of order) SPIF Interrupt duration t > tHImax t = tHOLDA t = tHOLDD Figure 5 — Faulty SemPulse Data Write Due to Extended Interrupt Duration 5 SC658 Register Map(1) Address 00h 0h 02h 03h 04h 05h D5 0(2) 0(2) 0(2) 0(2) 0(2) 0(2) D4 0(2) MBL4 SBL4 TBL4 0(2) 0(2) D3 BLEN4 MBL3 SBL3 TBL3 0(2) 0(2) D2 BLEN3 MBL2 SBL2 TBL2 0(2) 0(2) D1 BLEN2 MBL SBL TBL MFADE MB D0 BLEN MBL0 SBL0 TBL0 MFADE0 MB0 Reset Value 00h 00h 00h 00h 00h 00h Description Backlight Enable Main Backlight Current Sub Backlight Current Third Backlight Current Main Fade Backlight Grouping Configuration Notes: () all registers are write-only. (2) 0 = always write a 0 to these bits Definition of Registers and Bits BL Enable Control Register (00h) This register enables each individual LED. BLEN4 — BLEN1 [D3:D0] These active high bits enable the four backlight drivers. Each LED can be controlled independently. 6 SC658 Register and Bit Definitions (continued) Main Backlight Current Control Register (01h) This register is used to set the currents for the backlight current sinks assigned to the Main Backlight Group. This group can also be used to control red LEDs for limited RGB control. These current sinks need to be enabled in the Backlight Enable Control register to be active. Bit D5 This bit is unused and is always a zero, so the maximum pulse count for this register is 3. MBL4 — MBL0 [D4:D0] These bits are used to set the current for the main backlight current sinks. All enabled main backlight current sinks will sink the same current, as shown in Table 4. MBL4 0 Table 4 — Main Backlight Current Settings MBL3 0 MBL2 0 MBL1 0 MBL0 0 Backlight Current (mA) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0                 0 0 0 0 0 0 0         0 0 0 0 0 0 0 0         0 0 0     0 0 0 0     0 0 0 0     0 0 0 0     0   0 0   0 0   0 0   0 0   0 0   0 0   0 0    0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  See note  See note  See note  0.5 .0 .5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.0 7.0 8.0 9.0 0  2 3 4 5 6 7 8 9 20 2 23 25 () Reserved for future use 7 SC658 Register and Bit Definitions (continued) Sub Backlight Current Control Register (02h) This register is used to set the currents for the backlight current sinks assigned to the Sub Backlight Group. This group can also be used to control green LEDs for limited RGB control. These current sinks need to be enabled in the Backlight Enable Control register to be active. Bit D5 This bit is unused and is always a zero, so the maximum pulse count for this register is 3. SBL4 — SBL0 [D4:D0] These bits are used to set the current for the sub backlight current sinks. All enabled sub backlight current sinks will sink the same current, as shown in Table 5. SBL4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0                 Table 5 — Sub Backlight Current Settings SBL3 0 0 0 0 0 0 0 0         0 0 0 0 0 0 0 0         SBL2 0 0 0 0     0 0 0 0     0 0 0 0     0 0 0 0     SBL1 0 0   0 0   0 0   0 0   0 0   0 0   0 0   0 0   SBL0 0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  Backlight Current (mA) 0 See note  See note  See note  0.5 .0 .5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.0 7.0 8.0 9.0 0  2 3 4 5 6 7 8 9 20 2 23 25 () Reserved for future use 8 SC658 Register and Bit Definitions (continued) Third Backlight Current Control Register (03h) This register is used to set the currents for the backlight current sinks assigned to the Third Backlight Group. This group can also be used to control blue LEDs for limited RGB control. These current sinks need to be enabled in the Backlight Enable Control register to be active. Bit D5 This bit is unused and is always a zero, so the maximum pulse count for this register is 3. TBL4 — TBL0 [D4:D0] These bits are used to set the current for the third backlight current sinks. All enabled third backlight current sinks will sink the same current, as shown in Table 6. Table 6 — Third Backlight Current Control Bits TBL4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0                 TBL3 0 0 0 0 0 0 0 0         0 0 0 0 0 0 0 0         TBL2 0 0 0 0     0 0 0 0     0 0 0 0     0 0 0 0     TBL1 0 0   0 0   0 0   0 0   0 0   0 0   0 0   0 0   TBL0 0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  Backlight Current (mA) 0 See note  See note  See note  0.5 .0 .5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.0 7.0 8.0 9.0 0  2 3 4 5 6 7 8 9 20 2 23 25 () Reserved for future use 9 SC658 Register and Bit Definitions (continued) Main Fade Control (04h) This register sets the fade status and rate for the main backlight group. Bits [D5:D2] T hese bits are unused and are always zeros, so the maximum pulse count for this register is 3. MFADE1, MFADE0[D1:D0] These bits are used to enable and set the rise/fall rate between two backlight currents as follows in Table 7. Table 7 — Main Display Fade Control Bits MFADE1 0 0   MB1 and MB0 [D1:D0] These bits are used to set the number of LED drivers dedicated to each backlight group. This allows the device to drive up to three different sets of LEDs with different current settings. Note that any driver assigned to any LED group can still be disabled independently if not needed. The code set by these bits determines how the LED drivers are assigned among the three LED groups according to the assignments listed in Table 8. Default state for each of these three bits is “0” (all LEDs assigned to main display). Table 8 — Backlight Grouping Configuration MB1 MB0 Main Display LED Drivers BL-BL4 BL-BL3 BL-BL2 BL-BL2 BL4 BL3-BL4 BL3 BL4 MFADE0 0  0  Fade Feature Rise�Fall Rate (ms�step) OFF 8 6 32 Sub Display LED Drivers Third Display LED Drivers 0 0   0  0  The number of steps used to change the backlight current w ill be equal to the change in binary count of bits MBL[4:0]. When a new backlight current is set, the backlight current will change from its current value to a new value set by bits MBL[4:0] at the rate determined by MFADE and MFADE0 bits. The total fade time is determined by the number of steps between old and new backlight values, in Table 4, multiplied by the rate of fade in ms/step. Backlight Grouping Configuration (05h) This register assigns the LEDs to the back light bank configurations. Bits [D5:D2] T hese bits are unused and are always zeros, so the maximum pulse count for this register is 3. 20 SC658 Outline Drawing — MLPQ-UT-14 2x2 A D B DIMENSIONS DIM A A1 A2 b D E e L L1 N aaa bbb INCHES MIN .020 .000 .006 .077 .077 .010 .014 NOM (.006) .008 .079 .079 .016 BSC .012 .016 14 .003 .004 MAX .024 .002 .010 .081 .081 .014 .018 MILLIMETERS MIN 0.50 0.00 0.15 1.95 1.95 NOM MAX 0.60 0.05 0.25 2.05 2.05 0.35 0.45 PIN 1 INDICATOR (LASER MARK) E A2 A aaa C A1 LxN e/2 bxN bbb CA B C (0.152) 0.20 2.00 2.00 0.40 BSC 0.25 0.30 0.35 0.40 14 0.08 0.10 SEATING PLANE E/2 e 0.20 0.15 1 N L1 D/2 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2 SC658 Land Pattern — MLPQ-UT-14 2x2 R X DIMENSIONS DIM C (C) G Z G P R X Y Z P Y INCHES (.079) .055 .016 .004 .008 .024 .102 MILLIMETERS (2.00) 1.40 0.40 0.10 0.20 0.60 2.60 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 3. SQUARE PACKAGE - DIMENSIONS APPLY IN BOTH " X " AND " Y " DIRECTIONS. 4. PIN 1 PAD CAN BE SHORTER THAN THE ACTUAL PACKAGE LEAD TO AVOID SOLDER BRIDGING BETWEEN PINS 1 & 14. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 9302 Phone: (805) 498-2 Fax: (805) 498-3804 www.semtech.com 22