0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
SDMA15C-8.TBT

SDMA15C-8.TBT

  • 厂商:

    SEMTECH

  • 封装:

  • 描述:

    SDMA15C-8.TBT - Bidirectional TVS Array for Protection of Eight Lines - Semtech Corporation

  • 数据手册
  • 价格&库存
SDMA15C-8.TBT 数据手册
SMDA05C-8 through SMDA24C-8 PROTECTION PROTECTION PRODUCTS Description The SMDAxxC-8 series of transient voltage suppressors are designed to protect components which are connected to data and transmission lines from voltage surges caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. TVS diodes are characterized by their high surge capability, low operating and clamping voltages, and fast response time. This makes them ideal for use as board level protection of sensitive semiconductor components. The SMDAxxC-8 is designed to provide transient suppression on multiple data lines and I/O ports. The low profile SO-14 design allows the user to protect up to eight data and I/O lines with one package. They are bidirectional device and may be used on lines where the normal operating voltage is above and below ground (i.e. -12V to +12V). The SMDAxxC-8 TVS diode array will meet the surge requirements of IEC 61000-4-2 (Formerly IEC 801-2), Level 4, “Human Body Model” for air and contact discharge. Bidirectional TVS Array for Protection of Eight Lines Features Transient protection for data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 12A (8/20µs) Small SO-14 surface mount package Protects eight I/O lines Working voltages: 5V, 12V, 15V and 24V Low leakage current Low operating and clamping voltages Solid-state silicon avalanche technology Mechanical Characteristics JEDEC SO-14 package Molding compound flammability rating: UL 94V-0 Marking : Part Number, Logo, Date Code Packaging : Tape and Reel per EIA 481 RoHS/WEEE Compliant Applications RS-232 and RS-422 Data Lines Microprocessor Based Equipment LAN/WAN Equipment Set-Top Box Notebooks, Desktops, and Servers Portable Instrumentation Peripherals Serial and Parallel Ports Circuit Diagram Schematic & PIN Configuration 1 14 1 & 14 7&8 2 3 4 5 6 13 12 11 10 9 8 2 3 12 13 56 9 10 7 SO-14 (Top View) Revision 04/12/05 1 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Absolute Maximum Rating R ating Peak Pulse Power (tp = 8/20µs) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol Pp k TL TJ TSTG Value 300 260 (10 sec.) -55 to +125 -55 to +150 Units Watts °C °C °C Electrical Characteristics SMDA05C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage Peak Pulse Current Junction Capacitance Symbol VRWM V BR IR VC IP P Cj It = 1mA VRWM = 5V, T=25°C IPP = 1A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 6 20 9.8 17 350 Conditions Minimum Typical Maximum 5 Units V V µA V A pF SMDA12C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC IP P Cj It = 1mA VRWM = 12V, T=25°C IPP = 1A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 13.3 1 19 12 120 Conditions Minimum Typical Maximum 12 Units V V µA V A pF  2005 Semtech Corp. 2 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Electrical Characteristics (Continued) SMDA15C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC IP P Cj It = 1mA VRWM = 15V, T=25°C IPP = 1A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 16.7 1 24 10 75 Conditions Minimum Typical Maximum 15 Units V V µA V A pF SMDA24C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage Peak Pulse Current Junction Capacitance Symbol VRWM V BR IR VC IP P Cj It = 1mA VRWM = 24V, T=25°C IPP = 1A, tp = 8/20µs tp = 8/20µs Between I/O Pins and Ground VR = 0V, f = 1MHz 26.7 1 43 5 50 Conditions Minimum Typical Maximum 24 Units V V µA V A pF  2005 Semtech Corp. 3 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time 10 Peak Pulse Power - Ppk (kW) Power Derating Curve 110 100 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10 1 0.1 0.01 0.1 1 10 Pulse Duration - tp (µs) 100 1000 0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC) Pulse Waveform 110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 Time (µs) 20 25 30 td = IPP/2 e -t Waveform Parameters: tr = 8µs td = 20µs ESD Pulse Waveform (IEC 61000-4-2) Level IEC 61000-4-2 Discharge Parameters First Peak Current (A ) 1 2 3 4 7.5 15 22.5 30 Peak Current at 30 ns (A ) 4 8 12 16 Peak Current at 60 ns (A ) 8 4 6 8 Test Test Voltage Voltage (Contact (A ir Discharge) Discharge) (kV) ( kV ) 2 4 6 8 2 4 8 15  2005 Semtech Corp. 4 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Applications Information Device Connection for Protection of Eight Data Lines The SMDAxxC-8 is designed to protect up to 8 data or I/O lines. They are bidirectional devices and may be used on lines where the signal polarities are above and below ground. The SMDAxxC-8 TVS arrays employ a monolithic structure. Therefore, the working voltage (VRWM) and breakdown voltage (VBR) specifications apply to the differential voltage between any two data line pins. For example, the SMDA24C-8 is designed for a maximum voltage excursion of ±12V between any two data lines. The device is connected as follows: Connection Diagram Pins 2, 3, 5, 6, 9, 10, 12 and 13 are connected to the lines that are to be protected. Pins 1, 7, 8, and 14 are connected to ground. The ground connections should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Pins 4 and 11 are not connected. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: Place the TVS near the input terminals or connectors to restrict transient coupling. Minimize the path length between the TVS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. Circuit Diagram GND 1 I/O 1 I/O 2 N.C. I/O 3 I/O 4 2 14 GND I/O 8 I/O 7 N.C. I/O 6 I/O 5 GND 13 3 12 4 11 5 10 6 9 GND 7 8  2005 Semtech Corp. 5 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Outline Drawing - SO-14 A N 2X e D DIM SEE DETAIL DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX .069 .053 .010 .004 .065 .049 .012 .020 .010 .007 .337 .341 .344 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 14 0° 8° .004 .010 .008 1.75 1.35 0.25 0.10 1.65 1.25 0.31 0.51 0.25 0.17 8.55 8.65 8.75 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 14 8° 0° 0.10 0.25 0.20 E/2 E1 E SIDE VIEW A ccc C 1 2X N/2 TIPS 2 3 B H D GAGE PLANE A2 A 0.25 h h c aaa C SEATING PLANE A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc L (L1) DETAIL 01 C bxN bbb A1 C A-B D A NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AB. Land Pattern - SO-14 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. REFERENCE IPC-SM-782A, RLP NO. 302A. 2.  2005 Semtech Corp. 6 www.semtech.com SMDA05C-8 through SMDA24C-8 PROTECTION PRODUCTS Ordering Information Part Number SMDA05C-8.TB SMDA12C-8.TB SDMA15C-8.TB SMDA24C-8.TB SMDA05C-8.TBT SMDA12C-8.TBT SDMA15C-8.TBT SMDA24C-8.TBT SMDA05C-8 SMDA12C-8 SDMA15C-8 SMDA24C-8 SMDA05C-8.T SMDA12C-8.T SDMA15C-8.T SMDA24C-8.T Lead Finish SnPb SnPb SnPb SnPb Pb Free Pb Free Pb Free Pb Free SnPb SnPb SnPb SnPb Pb Free Pb Free Pb Free Pb Free Qty per Reel 500 500 500 500 500 500 500 500 56/Tube 56/Tube 56/Tube 56/Tube 56/Tube 56/Tube 56/Tube 56/Tube Reel Size 7 Inch 7 Inch 7 Inch 7 Inch 7 inch 7 inch 7 inch 7 inch N /A N /A N /A N /A N /A N /A N /A N /A Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804  2005 Semtech Corp. 7 www.semtech.com
SDMA15C-8.TBT 价格&库存

很抱歉,暂时无法提供与“SDMA15C-8.TBT”相匹配的价格&库存,您可以联系我们找货

免费人工找货