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SMF05CTG

SMF05CTG

  • 厂商:

    SEMTECH

  • 封装:

  • 描述:

    SMF05CTG - TVS Diode Array For ESD and Latch-Up Protection   - Semtech Corporation

  • 数据手册
  • 价格&库存
SMF05CTG 数据手册
TVS Diode Array For ESD and Latch-Up Protection PROTECTION PRODUCTS Description The SMF series TVS arrays are designed to protect sensitive electronics from damage or latch-up due to ESD and other voltage-induced transient events. They are designed for use in applications where board space is at a premium. Each device will protect up to five lines. They are unidirectional devices and may be used on lines where the signal polarities are above ground. TVS diodes are solid-state devices designed specifically for transient suppression. They feature large cross-sectional area junctions for conducting high transient currents. They offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation. The SMF series devices may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small SC70 package makes them ideal for use in portable electronics such as cell phones, PDA’s, notebook computers, and digital cameras. SMF05C PRELIMINARY Features u ESD protection for data lines to u u u u u u u u u u u u u u u u u u IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) Small package for use in portable electronics Protects five I/O lines Working voltage: 5V Low leakage current Low operating and clamping voltages Solid-state silicon-avalanche technology Mechanical Characteristics EIAJ SC70-6L package Molding compound flammability rating: UL 94V-0 Marking : Marking Code Packaging : Tape and Reel per EIA 481 Applications Cellular Handsets & Accessories Cordless Phones Personal Digital Assistants (PDA’s) Notebooks & Handhelds Portable Instrumentation Digital Cameras Peripherals MP3 Players Circuit Diagram Schematic & PIN Configuration 1 3 4 5 6 1 2 3 6 5 4 2 Revision 9/2000 1 SC70-6L (Top View) www.semtech.com SMF05C PROTECTION PRODUCTS Absolute Maximum Rating R ating Peak Pulse Pow er (tp = 8/20ms) Peak Pulse Current (tp = 8/20ms) ESD p er IEC 61000-4-2 (Air) ESD p er IEC 61000-4-2 (Contact) Lead Soldering Temp erature Op erating Temp erature Storage Temp erature Symbo l Pp k I PP V ESD TL TJ TSTG Value 100 8 20 15 260 (10 seconds) -55 to +125 -55 to +150 PRELIMINARY Units Watts A kV o C C C o o Electrical Characteristics SMF05C Par ame te r Reverse Stand-Off Voltage Reverse Breakdow n Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Junction Cap acitance Symbo l VRWM V BR IR VC VC Cj It = 1mA VRWM = 5V, T=25°C IPP = 5A, tp = 8/20µs IPP = 8A, tp = 8/20µs VR = 0V, f = 1MHz 6 5 9.8 12.5 130 Co nd itio ns Minimum Typ ical Maximum 5 Units V V µA V V pF ã 2000 Semtech Corp. 2 www.semtech.com SMF05C PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time 10 PRELIMINARY Power Derating Curve 110 100 Peak Pulse Power - PPP (kW) 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10 0.01 0.1 1 10 Pulse Duration - tp (µs) 100 1000 1 0.1 0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC) Clamping Voltage vs. Peak Pulse Current 9 8 7 6 Vclamp (V) 5 4 3 2 1 0 0 2 4 Ipp(A) 6 8 10 Waveform Parameters: tr = 8µs td = 20µs Capacitance (pF) 100 80 60 40 20 0 140 120 Junction Capacitance vs. Reverse Voltage 0 1 2 3 Reverse Voltage (V) 4 5 6 ESD Clamping Characteristics (8kV Contact Discharge per IEC 61000-4-2) ã 2000 Semtech Corp. 3 www.semtech.com SMF05C PROTECTION PRODUCTS Applications Information Device Connection for Protection of Five Data Lines The SMF05C is designed to protect up to five unidirectional data lines. The device is connected as follows: 1. Unidirectional protection of five I/O lines is achieved by connecting pins 1, 3, 4, 5 and 6 to the data lines. Pin 2 is connected to ground. The ground connection should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. 2 1 PRELIMINARY SMF05C Circuit Diagram 3 4 5 6 Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: l Place the SMF05C near the input terminals or connectors to restrict transient coupling. l Minimize the path length between the SMSxxC and the protected line. l Minimize all conductive loops including power and ground loops. l The ESD transient return path to ground should be kept as short as possible. l Never run critical signals near board edges. l Use ground planes whenever possible. Protection of Five Unidirectional Lines ã 2000 Semtech Corp. 4 www.semtech.com SMF05C PROTECTION PRODUCTS Typical Applications PRELIMINARY ã 2000 Semtech Corp. 5 www.semtech.com SMF05C PROTECTION PRODUCTS Outline Drawing - SC70-6L PRELIMINARY Land Pattern - SC70-6L ã 2000 Semtech Corp. 6 www.semtech.com SMF05C PROTECTION PRODUCTS Marking Codes Par t Numbe r SMF05C Mar king Co d e F5C PRELIMINARY Note: (1) Pin 1 Identified with a dot Ordering Information Par t Numbe r SMF05C.TC SMF05C.TG Wo r king Vo ltage 5V 5V Qty p e r R e e l 3,000 10,000 R e e l Size 7 Inch 13 Inch Contact Information Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804 ã 2000 Semtech Corp. 7 www.semtech.com
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