SGM800
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
GENERAL DESCRIPTION
FEATURES
The SGM800 low-power micro-processor supervisor
● Monitor System Voltages from 1.6V to 5V
circuit monitors system voltages from 1.6V to 5V. This
● Capacitor-Adjustable Reset Timeout Period
device performs a single function: it asserts a reset
● Low Quiescent Current: 3µA (TYP)
signal whenever the VCC supply voltage falls below its
● Open-Drain RESET Output Option
reset threshold. The reset output remains asserted for
● Guaranteed RESET Valid to VCC = 1V
the reset timeout period after VCC rises above the reset
● Immune to Short VCC Transients
threshold. The reset timeout is externally set by a
● Available in Green SOT-23-5 Package
capacitor to provide more flexibility.
The SGM800 has an active-low, open-drain reset
output. It is available in Green SOT-23-5 package and
operates over a temperature range of -40℃ to +85℃.
APPLICATIONS
Portable Equipment
Battery-Powered Computers/Controllers
Automotive
Medical Equipment
Intelligent Instruments
Embedded Controllers
Critical µP Monitoring
Set-Top Boxes
Computers
TYPICAL APPLICATION
VCC
VCC
SGM800
SRT
CSRT
SG Micro Corp
www.sg-micro.com
GND
RESET
Microprocessor
System
RESET
GND
JANUARY 2013 – REV. A. 1
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
SGM800
PACKAGE/ORDERING INFORMATION
MODEL
SGM800
PACKAGE
DESCRIPTION
RESET
THRESHOLD (V)
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
1.63
SGM800-1.63YN5G/TR
S69XX
Tape and Reel, 3000
2.32
SGM800-2.32YN5G/TR
S6AXX
Tape and Reel, 3000
2.63
SGM800-2.63YN5G/TR
S6BXX
Tape and Reel, 3000
2.93
SGM800-2.93YN5G/TR
S6CXX
Tape and Reel, 3000
SOT-23-5
MARKING INFORMATION
NOTE: XX = Date Code.
YYY X X
Date Code - Month
Date Code - Year
Serial Number
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND
VCC ....................................................................... -0.3V to 6V
RESET (Open-Drain) .......................................... -0.3V to 6V
Input Current (All Pins) ................................................. 20mA
Output Current ( RESET ) ............................................... 20mA
Junction Temperature .................................................+150℃
Storage Temperature Range ....................... -65℃ to +150℃
Lead Temperature (Soldering, 10s) ............................+260℃
ESD Susceptibility
HBM ............................................................................. 3000V
MM ................................................................................. 300V
RECOMMENDED OPERATING CONDITIONS
Operating Temperature Range ....................... -40℃ to +85℃
OVERSTRESS CAUTION
Stresses beyond those listed may cause permanent damage
to the device. Functional operation of the device at these or
any other conditions beyond those indicated in the operational
section of the specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged by ESD if you don’t
pay attention to ESD protection. SGMICRO recommends that
all integrated circuits be handled with appropriate precautions.
Failure to observe proper handling and installation procedures
can cause damage. ESD damage can range from subtle
performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage
because very small parametric changes could cause the
device not to meet its published specifications.
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, specification or other related things if necessary
without notice at any time.
SG Micro Corp
www.sg-micro.com
JANUARY 2013
2
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
SGM800
PIN CONFIGURATION
SGM800 (TOP VIEW)
SRT
1
GND
2
NC
3
5
RESET
4
VCC
SOT-23-5
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
SRT
Set Reset Timeout Input. Connect a capacitor between SRT and ground to set the timeout period.
Determine the period as follows:
6
-6
tRP = 2.6 × 10 × CSRT + 340 × 10
with tRP in seconds and CSRT in farads.
2
GND
Ground.
3
NC
Not Internally Connected. Can be connected to GND.
4
VCC
Supply Voltage and Reset Threshold Monitor Input.
5
RESET
SG Micro Corp
www.sg-micro.com
RESET changes from high to low whenever VCC drops below the selected reset threshold
voltage. RESET remains low for the reset timeout period after VCC exceeds the reset threshold.
JANUARY 2013
3
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
SGM800
ELECTRICAL CHARACTERISTICS
(VCC = 1V to 5.5V, TA = -40℃ to +85℃, typical values are at VCC = 5V and TA = +25℃, unless otherwise specified.)
PARAMETER
Supply Voltage Range
Supply Current
SYMBOL
CONDITIONS
VCC
ICC
MIN
1.0
Hysteresis
VTH
tRD
Reset Timeout Period
tRP
VSRT Ramp Current
VSRT Ramp Threshold
RESET Output Voltage Low
RESET Output Leakage Current,
Open-Drain
SG Micro Corp
www.sg-micro.com
IRAMP
VTH-RAMP
VOL
ILKG
UNITS
5.5
V
3.9
7.0
VCC ≤ 3.3V
3.4
5.5
3.0
VTH - 2.5%
VTH + 2.5%
TA = -40℃ to +85℃
VTH - 3.5%
VTH + 3.5%
VCC falling at 1mV/µs
CSRT = 1500pF
3.00
μA
4.8
TA = +25℃
VHYST
VCC to Reset Delay
MAX
VCC ≤ 5.0V
VCC ≤ 2.0V
VCC Reset Threshold Accuracy
TYP
V
4 × VTH
mV
80
µs
4.25
5.75
ms
CSRT = 0
0.34
VSRT = 0 to 0.65V, VCC = 1.6V to 5V
210
nA
VCC = 1.6V to 5V (VRAMP rising)
0.6
V
VCC ≥ 1.0V, ISINK = 50µA
0.3
VCC ≥ 2.7V, ISINK = 1.2mA
0.3
VCC ≥ 4.5V, ISINK = 3.2mA
0.4
VCC > VTH, reset not asserted
1
V
µA
JANUARY 2013
4
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
SGM800
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 5V, CSRT = 1500pF, TA = +25℃, unless otherwise noted.
Supply Current vs. Supply Voltage
Reset Timeout Period vs. CSRT
5
10000
Reset Timeout Period (ms)
+85℃
Supply Current (μA)
4
3
+25℃
2
-40℃
1
V T H = 1.63V
0
0
1
2
3
4
5
1000
100
10
1
0.1
0.01
6
0.1
1
460
420
380
340
1.006
1000
5.0
CSRT = 1500pF
4.8
4.6
4.4
4.2
4.0
-25
0
25
50
75
-50
100
-25
0
25
50
75
100
Temperature (℃)
Temperature (℃)
Normalized Reset Threshold vs. Temperature
Maximum Transient Duration vs. Reset
Threshold Overdrive
60
1.004
Transient Duration (µs)
Normalized Reset Threshold
Reset Timeout Period (ms)
Reset Timeout Period (μs)
CSRT = 0
300
-50
100
Reset Timeout Period vs. Temperature
Reset Timeout Period vs. Temperature
500
10
CSRT (nF)
Supply Voltage (V)
1.002
1.000
0.998
0.996
0.994
-50
-25
0
25
50
Temperature (℃)
SG Micro Corp
www.sg-micro.com
75
100
V T H = 2.93V
50
40
30
20
10
0
0
200
400
600
800
1000
Reset Threshold Overdrive (mV)
JANUARY 2013
5
SGM800
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VCC = 5V, CSRT = 1500pF, TA = +25℃, unless otherwise noted.
SG Micro Corp
www.sg-micro.com
JANUARY 2013
6
SGM800
Low-Power, SOT µP Reset Circuit with
Capacitor-Adjustable Reset Timeout Delay
DETAILED DESCRIPTION
Reset Output
The reset output is typically connected to the reset
input of a µP. A µP’s reset input starts or restarts the µP
in a known state. The SGM800 µP supervisory circuit
provides the reset logic to prevent code-execution
errors during power-up, power-down, and brownout
conditions.
RESET changes from high to low whenever VCC drops
below the threshold voltage. Once VCC exceeds the
threshold voltage, RESET remains low for the
capacitor- adjustable reset timeout period.
This device output is guaranteed valid for VCC > 1V.
The SGM800 is open-drain RESET output. Connect
an external pull-up resistor to any supply from 0 to 5.5V.
Select a resistor value large enough to register a logic
low when RESET is asserted and small enough to
register a logic high while supplying all input current
and leakage paths connected to the RESET line. A
10kΩ to 100kΩ pull up is sufficient in most applications.
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (tRP) by connecting a capacitor (CSRT) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
-6
6
CSRT = (tRP - 340 × 10 ) / (2.6 × 10 )
where tRP is in seconds and CSRT is in farads.
The reset delay time is set by a current/capacitorcontrolled ramp compared to an internal 0.6V reference.
An internal 210nA ramp current source charges the
external capacitor. The charge to the capacitor is
cleared when a reset condition is detected. Once the
reset condition is removed, the voltage on the capacitor
ramps according to the formula: dV/dt = I/C. The CSRT
capacitor must ramp to 0.6V to deassert the reset. CSRT
must be a low-leakage (
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