LH531000B-S

LH531000B-S FEATURES • 131,072 words × 8 bit organization • Access time: 500 ns (MAX.) • Power consumption: Operating: 64.8 mW (MAX.) Standby: 108 µW (MAX.) • Mask-programmable control pin: Pin 20 = CE/OE/OE • Static operation • Three-state outputs • Low power supply: 2.6 V to 3.6 V • Package: 28-pin, 450-mil SOP CMOS 1M (128K × 8) 3 V-Drive MROM DESCRIPTION The LH531000B-S is a mask-programmable ROM organized as 131,072 × 8 b its. It is fabricated using silicon-gate CMOS process technology. PIN CONNECTIONS 28-PIN SOP TOP VIEW A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 A16 A10 CE/OE/OE D7 D6 D5 D4 D3 531000BS-1 Figure 1. Pin Connections for DIP Package 1 LH531000B-S CMOS 1M MROM A16 22 A15 1 A14 27 A13 26 A10 21 A9 24 A8 25 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 ADDRESS DECODER ADDRESS BUFFER A12 2 A11 23 MEMORY MATRIX (131,072 x 8) COLUMN SELECTOR SENSE AMPLIFIER CE BUFFER TIMING GENERATOR CE/OE/OE 20 OE BUFFER OUTPUT BUFFER 28 14 VCC GND 11 D0 12 D1 13 D2 15 D3 16 D4 17 D5 18 D6 19 D7 531000BS-2 Figure 2. LH531000B-S Block Diagram PIN DESCRIPTION SIGNAL PIN NAME NOTE SIGNAL PIN NAME NOTE A0 – A16 D0 – D7 CE/OE/OE Address input Data output Chip Enable input or Output Enable input VCC GND 1 Power supply (2.6 V to 3.6 V) Ground NOTE: 1. Active level of CE/OE/ OE is mask-programmable. 2 CMOS 1M MROM LH531000B-S TRUTH TABLE CE OE/OE MODE SUPPLY CURRENT H L – – – – L/H H/L High-Z Output High-Z Output Standby Operating Operating ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT Supply voltage Input voltage Output voltage Operating temperature Storage temperature VCC VIN VOUT Topr Tstg –0.3 to +7.0 –0.3 to VCC + 0.3 –0.3 to VCC + 0.3 0 to +70 – 65 to +150 V V V °C °C RECOMMENDED OPERATING CONDITIONS (TA = 0°C to +70°C) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Supply voltage VCC 2.6 3.6 V DC CHARACTERISTICS (VCC = 2 .6 V to 3.6 V, TA = 0 °C to +70°C) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT NOTE Input ‘Low’ voltage Input ‘High’ voltage Output ‘Low’ voltage Output ‘High’ voltage Input leakage current Output leakage current Operating current Standby current Input capacitance Output capacitance NOTE: 1. CE/OE = VIH, OE = VIL 2. Outputs open VIL V IH VOL VOH | ILI | | ILO | ICC ISB CIN COUT I OL = 4 00 µA I OH = –100 µ A V IN = 0 V to VCC V OUT = 0 V to VCC t RC = 500 ns CE = VCC – 0.2 V f = 1 MHz T A = 25° C –0.3 0.8 × VCC 0.8 × VCC 0.4 VCC + 0.3 0.4 10 10 18 30 10 10 V V V V µA µA mA µA pF pF 1 2 AC CHARACTERISTICS (VCC = 2.6 V to 3.6 V, TA = 0°C to +70°C) PARAMETER SYMBOL MIN. MAX. UNIT NOTE Read cycle time Address access time Chip enable access time Output enable delay time Output hold time CE to output in High-Z OE to output in High-Z tRC tAA tACE tOE tOH tCHZ tOHZ 500 500 500 200 10 150 ns ns ns ns ns ns ns 1 NOTE: 1. This is the time required for the output to become high-impedance. 3 LH531000B-S CMOS 1M MROM AC TEST CONDITIONS PARAMETER RATING Input voltage amplitude Input rise/fall time Input/output reference level Output load condition 0.4 V to (0.8 × VCC) V 10 ns 1.5 V 1TTL + 100 pF CAUTION To stabilize the power supply, it is recommended that a high-frequency bypass capacitor be connected between the VCC pin and the GND pin. tRC A0 - A16 tAA (NOTE) CE tACE (NOTE) OE OE tOE (NOTE) tOHZ tOH tCHZ D0 - D 7 NOTE: The output data becomes valid when the last intervals, tAA, tACE, or tOE, have concluded. DATA VALID 531000BS-3 Figure 3. Timing Diagram 4 CMOS 1M MROM LH531000B-S PACKAGE DIAGRAM 28SOP (SOP028-P-0450) 1.27 [0.050] TYP. 1.70 [0.067] 15 8.80 [0.346] 8.40 [0.331] 12.40 [0.488] 11.60 [0.457] 0.50 [0.020] 0.30 [0.012] 28 10.60 [0.417] 1 18.20 [0.717] 17.80 [0.701] 14 1.70 [0.067] 0.20 [0.008] 0.10 [0.004] 0.15 [0.006] 1.025 [0.040] 2.40 [0.094] 2.00 [0.079] 0.20 [0.008] 0.00 [0.000] 1.025 [0.040] DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT MINIMUM LIMIT 28SOP 28-pin, 450-mil SOP ORDERING INFORMATION LH531000B Device Type N Package -S Low-Voltage Operation 28-pin, 450-mil SOP (SOP028-P-0450) CMOS 1M (128K x 8) Mask-Programmable ROM Example: LH531000BN-S (CMOS 1M (128K x 8) Mask-Programmable ROM, Low-Voltage Operation, 28-pin, 450-mil SOP) 531000BS-4 5