LH534B00
FEATURES • 524,288 words × 8 bit organization • Access time: 120 ns (MAX.) • Power consumption: Operating: 330 mW (MAX.) Standby: 550 µW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Package: 40-pin, 10 × 20 mm2 TSOP (Type I) DESCRIPTION
The LH534B00 is a 4M-bit mask-programmable ROM organized as 524,288 × 8 bits. It is fabricated using silicon-gate CMOS process technology.
A16 A15 A14 A13 A12 A11 A9 A8 NC NC NC NC A18 A7 A6 A5 A4 A3 A2 A1
CMOS 4M (512K × 8) MROM
PIN CONNECTIONS
40-PIN TSOP (Type I) TOP VIEW
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
A17 GND NC NC A10 D7 D6 D5 D4 VCC VCC NC D3 D2 D1 D0 OE GND CE A0
534B00-1
Figure 1. Pin Connections for TSOP Package
1
LH534B00
CMOS 4M MROM
A18 13 A17 40 A16 A15 A14 A13 1 2 3 4
A11 6 A10 36 A9 A8 A7 A6 7 8 14 15
A5 16 A4 17 A3 18 A2 19 A1 20 A0 21
ADDRESS BUFFER
A12 5
ADDRESS DECODER
MEMORY MATRIX (524,288 x 8)
COLUMN SELECTOR
SENSE AMPLIFIER
CE 22
CE BUFFER
TIMING GENERATOR
OUTPUT BUFFER OE 24 OE BUFFER
30 31 VCC
23 39 GND
25 D0
26 D1
27 D2
28 D3
32 D4
33 D5
34 D6
35 D7
534B00-2
Figure 2. LH534B00 Block Diagram
PIN DESCRIPTION
SIGNAL PIN NAME SIGNAL PIN NAME
A0 – A18 D0 – D7 CE OE
Address input Data output Chip enable input Output enable input
VCC GND NC
Power supply (+5 V) Ground No connection
2
CMOS 4M MROM
LH534B00
TRUTH TABLE
CE OE DATA OUTPUT SUPPLY CURRENT
H L
X H L
High-Z High-Z Output
Standby Operating Operating
NOTE: X = H or L, High-Z = High-impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Supply voltage Input voltage Output voltage Operating temperature Storage temperature
VCC VIN VOUT Topr Tstg
– 0.3 to +7.0 – 0.3 to V CC + 0.3 – 0.3 to V CC + 0.3 –20 to +70 –65 to +150
V V V °C °C
RECOMMENDED OPERATING CONDITIONS (TA = –20 °C to +70°C)
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Supply voltage
VCC
4.5
5.0
5.5
V
DC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PARAMETER SYMBOL CONDITIONS MIN. MAX. UNIT NOTE
Input ‘High’ voltage Input ‘Low’ voltage Output ‘High’ voltage Output ‘Low’ voltage Input leakage current Output leakage current
VIH VIL VOH VOL | ILl | | ILO | ICC1 ICC2 ICC3 ICC4 IOH = – 400 µA IOL = 2.0 mA V IN = 0 V to VCC V OUT = 0 V to VCC tRC = 120 ns tRC = 1 µ s tRC = 120 ns tRC = 1 µ s CE = V IH CE = V CC – 0 .2 V f = 1 MHz TA = 2 5° C
2.2 – 0.3 2.4
VCC + 0.3 0.8
V V V
0.4 10 10 60 50 55 45 3 100 10 10
V µA µA mA mA mA mA mA µA pF pF 1 2 2 3 3
Operating current
Standby current Input capacitance Output capacitance
ISB1 ISB2 CIN COUT
NOTES: 1. CE/OE = VIH 2. VIN = VIH or VIL, C E = VIL, outputs open 3. VIN = (VCC – 0.2 V) or 0.2 V, C E = 0.2 V, outputs open
3
LH534B00
CMOS 4M MROM
AC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PARAMETER SYMBOL MIN. MAX. UNIT NOTE
Read cycle time Address access time Chip enable access time Output enable delay time Output hold time CE to output in High-Z OE to output in High-Z
tRC tAA tACE tOE tOH tCHZ tOHZ
120 120 120 60 0 60
ns ns ns ns ns ns 1
NOTE: 1. This is the time required for the outputs to become high-impedance.
AC TEST CONDITIONS
PARAMETER RATING
Input voltage amplitude Input rise/fall time Input/output reference level Output load condition
0.4 to 2.6 V 10 ns 1.5 V 1 TTL + 100 pF
CAUTION
To stabilize the power supply, it is recommended that a high-frequency bypass capacitor be connected between the VCC pin and the GND pin.
tRC
A0 - A18 tAA (NOTE) CE tACE (NOTE) OE tOE (NOTE) tOHZ tOH tCHZ
D 0 - D7 NOTE: The output data becomes valid when the last intervals, tAA, tACE, or tOE, have concluded.
DATA VALID
534B00-3
Figure 3. Timing Diagram
4
CMOS 4M MROM
LH534B00
PACKAGE DIAGRAM
40TSOP (TSOP040-P-1020)
1 40
0.50 [0.020] TYP. 0.25 [0.010] 0.15 [0.006]
10.20 [0.402] 9.80 [0.386]
20
21
1.10 [0.043] 0.90 [0.035] SEE DETAIL 1.19 [0.047] MAX. 0.49 [0.019] 0.39 [0.015]
DETAIL
0.125 [0.005] 18.60 [0.732] 18.20 [0.717] 19.30 [0.760] 18.70 [0.736] 20.30 [0.799] 19.70 [0.776] MAXIMUM LIMIT MINIMUM LIMIT 0.49 [0.019] 0.39 [0.015] 0.22 [0.009] 0.02 [0.001]
0 - 10° 0.18 [0.007] 0.08 [0.003]
40TSOP
DIMENSIONS IN MM [INCHES]
40-pin, 10 × 20 mm2 TSOP (Type I)
ORDERING INFORMATION
LH534B00 Device Type T Package
40-pin, 10 x 12 mm2 TSOP (Type I) (TSOP040-P-1020)
CMOS 4M (512K x 8) Mask-Programmable ROM Example: LH534B00T (CMOS 4M (512K x 8) Mask-Programmable ROM, 40-pin, 10 x 12 mm2 TSOP (Type I))
534B00-4
5
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