BACK
LZ34B1B
LZ34B1B
DESCRIPTION
The LZ34B1B is a 1/4-type (4.5 mm) solid-state color image sensor that consists of PN photodiodes and CMOS (Complementary Metal Oxide Semiconductor) devices. The sensor further includes a timing generator (TG), a correlated double sampling (CDS) circuit, an auto gain control (AGC) circuit and an analog-to-digital converter (ADC) circuit. With approximately 350 000 pixels (703 horizontal x 499 vertical), the sensor provides a stable digital color image with extremely low power consumption.
1/4-type Color CMOS Image Sensor with 350 k Pixels
PIN CONNECTIONS
36-PIN LCC
32 SIGOUT 35 REFIN
TOP VIEW
33 SIGIN
29 LOAD
34 BIAS2
Y
CKI 14 CKO 15 D0 16 D1 17 D2 18
28 SCLK
31 CLP1
30 CLP2
36 NC
BIAS1 AGCOUT AGND AVDD OFS ADL ADH NC STBY
1 2 3 4 5 6 7 8 9
27 SDI 26 VD 25 HD 24 CLK 23 D7 22 D6 21 D5 20 D4 19 D3
FEATURES
• • • • • Progressive scan Square pixel Compatible with VGA standard Number of image pixels : 655 (H) x 493 (V) Number of optical black pixels – Horizontal : 24 front and 24 rear – Vertical : 3 front and 3 rear Pixel pitch : 5.6 µm (H) x 5.6 µm (V) R, G, and B primary color mosaic filters Image inversion function (horizontally and/or vertically) Available for two types of power save mode – AGC and AD circuits become power-off with serial data – All circuits become power-off with STBY pin Monitoring mode Analog output and 8-bit digital output Variable gain control (3 to 30 dB) Variable electronic focal plane shutter (1/15 to 1/7 875 s) Single +2.8 V power supply Package : 36-pin LCC* (N-LCC036-S425B)
IN
1
AGND 10
AVDD 11
DGND 12
A
(N-LCC036-S425B)
DVDD 13
•
• •
P
• • • •
R
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
E
L
• • •
IM
PRECAUTIONS
• Refer to "PRECAUTIONS FOR CMOS IMAGE SENSORS".
* Leadless Chip Carrier
R
LZ34B1B
BLOCK DIAGRAM
HD, VD CLK DATA TG AGC CONTROL 8-BIT D/A
P
R
E
L
IM
ANALOG VIDEO OUT
IN
2
AGC OUT
A
CMOS IMAGE SENSOR
AGC
R
8-BIT A/D
Y
DIGITAL VIDEO OUT
LZ34B1B
PIN DESCRIPTION
PIN NO. SYMBOL 1 BIAS1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 AGCOUT AGND AVDD OFS ADL ADH NC STBY AGND AVDD DGND DVDD CKI CKO D0 D1 D2 D3 D4 D5 D6 D7 CLK HD VD SDI SCLK LOAD CLP2 CLP1 I/O – O – – – – – – I – – – – I O O O O O O O O O O I I I I A/D Analog Analog Analog Analog Analog Analog Analog – Digital Analog Analog Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital DESCRIPTION Analog bias voltage 1 for image sensor AGC output Analog ground Analog power supply Offset bias voltage for AGC output Bottom ADC reference voltage Top ADC reference voltage Standby control mode* Analog ground Analog power supply Digital ground Digital power supply Clock input for oscillator (12.27 MHz) Clock output for oscillator
ADC signal output
ADC signal output ADC signal output ADC signal output ADC signal output
ADC signal output (MSB) Clock output (6.135 MHz) Horizontal drive pulse input Vertical drive pulse input Control data input (AGC gain, offset, shutter control,
Digital Digital Digital
E
R
I
Digital Analog Analog Analog Analog Analog Analog –
– –
P
SIGOUT SIGIN
O I – I –
BIAS2
REFIN NC
* Standby mode functions High level : Standby mode (all circuits power-off), Low level or open : Normal mode (all circuits active)
L
image inversion, etc.) Shift clock for data Load pulse for data input Analog bias voltage 2 for clamp circuit Analog bias voltage 1 for clamp circuit Analog image signal output Analog image signal input Analog bias voltage 2 for image sensor Reference voltage for analog input No connection
IM
3
IN
ADC signal output (LSB) ADC signal output
A
R
Y
No connection
LZ34B1B
ABSOLUTE MAXIMUM RATINGS
PARAMETER Power supply voltage Input signal voltage Storage temperature SYMBOL VDD VØ TSTG RATING –0.3 to +4.6
(TA = +25 ˚C)
UNIT V V ˚C
–0.3 to VDD + 0.3 –40 to +80
RECOMMENDED OPERATING CONDITIONS
PARAMETER Power supply voltage Operating temperature Oscillation frequency Digital input voltage Analog input voltage Analog bias voltage Normal mode Monitoring mode LOW level HIGH level SYMBOL VDD TOPR FCK VØL VØH 0 0.8VDD (Connect to pin through a capacitor) (Connect to GND MIN. 2.6 –20 TYP. 2.8 +25 12.27 0.2VDD VDD MAX. 3.0 +50 UNIT V ˚C MHz V V 1 2 3 NOTE
NOTES :
P
R
E
L
IM
4
1. Applied to input pins STBY, HD, VD, SDI, SCLK and LOAD. 2. Applied to input pins SIGIN and REFIN. Do not connect to DC directly. 3. Applied to pins BIAS1, BIAS2, OFS, ADL, ADH, CLP1 and CLP2. Do not connect to GND directly.
IN
through a capacitor)
A
R
Y
LZ34B1B
CHARACTERISTICS (1/15 s progressive scan readout mode)
(TA = +25˚C, Operating conditions : The typical values specified in "RECOMMENDED OPERATING CONDITIONS". Color temperature of light source : 3 200 K, IR cut-off filter (CM-500, 1mmt) is used.) • Measurement point : Analog image signal output (pin No.32), before AGC circuit and AD converter.
PARAMETER Standard output voltage Photo response non-uniformity Saturation output voltage Dark output voltage Sensitivity (Green channel) Supply current Standby current Vertical line fixed pattern noise SYMBOL VO PRNU VSAT VDARK R (G) IVDD ISTBY VFPN MIN. TYP. 150 700 2 250 13 1 0.5 10 1.1 MAX. 14 400 150 3 UNIT mV % mV mV NOTE 1 2 3 4 5 6 7 8
NOTES :
1. The average output voltage of G signal under uniform illumination. The standard exposure conditions are defined as when VO is 150 mV. 2. The image area is divided into 10 x 10 segments under the standard exposure conditions. Each segment's voltage is the average output voltage of all pixels within the segment. PRNU is defined by (Vmax – Vmin)/VO, where Vmax and Vmin are the maximum and minimum values of each segment's voltage respectively. 3. The image area is divided into 10 x 10 segments. Each segment's voltage is the average output voltage of all pixels within the segment. VSAT is the minimum segment's voltage under 10 times exposure of the standard exposure conditions. 4. The difference between average output voltage of the image area and that of the OB area, under nonexposure conditions.
P
R
E
L
IM
5
5. The average output voltage of G signal when a 500 lux light source with a 90% reflector is imaged by a lens of F4, F50 mm. 6. Total current of analog and digital power supplies, in the dark and at the standard load conditions. 7. Total current of power supply in standby mode. (Pin No.9 (STBY) is fixed to "H" level and other input pins are fixed to "H" level or "L" level.) 8. One mean horizontal line signal is obtained by adding all the horizontal line signals vertically and dividing them by the line number. is the deviation of the center pixel from the average of successive 5 pixels in . VFPN is the maximum absolute value of .
IN
A
R
Y
mA µA mVp-p
mV
LZ34B1B
PIXEL STRUCTURE
OPTICAL BLACK (3 PIXELS)
OPTICAL BLACK (24 PIXELS) 655 (H) x 493 (V)
OPTICAL BLACK (24 PIXELS)
1 pin
OPTICAL BLACK (3 PIXELS)
(1, 493)
IN
R G B G B G B R G R G R G G R G R G G R G R G R B G B G B G G R G R G R
COLOR FILTER ARRAY
R G R G R G G B G B G B R G R G B R G R
A
(655, 493)
G B G B G B
IM
G B G R G R G G B G G R G R G R B G B G B G G R G R G R
L
E
R
G R G R G R
B
B G B G B G
G B G B G
P
(1, 1)
6
R
R G R G R G G R G R G R
(655, 1)
Y
LZ34B1B
TIMING CHART
[Normal Mode]
HORIZONTAL PULSE TIMING
HD 776 780 012 4 CLK ADOUT (D0-D7)
Normal
8
12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92
645 650 655OBπππππππππππππππOB
Mirror
10 HD CLK ADOUT (D0-D7)
Normal
5
1 OBπππππππππππππππOB
74 78 82 86 90 94 98 102 106 110 114 118 122 126 130 134 138 142 146 150 154 158 162 166 170
OB ππππππππππππππ OB 1
Mirror
5
10
15
R
20 25 30
OB ππππππππππππππ OB 655 650 645 640 635 630 625
• The rising edge of the HD pulse must be between two rising edges of CLK (0) and CLK (1). • The falling edge of the HD pulse must be between two rising edges of CLK (78) and CLK (79).
PHASE RELATIONS BETWEEN DIGITAL OUTPUT (ADOUT) AND CLOCK (CLK)
CLK ∆t ADOUT (D0-D7)
IN
SYMBOL ∆t MIN.
Shutter D20
A
45
TYP. MAX. UNIT ns
IM
Offset D10
VERTICAL PULSE TIMING
SDI, SCLK, LOAD Forbidden Period
VD HD ADOUT (D0-D7)
Normal
523 524 525 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
492 493 OB OB OB
Mirror
L
OB OB OB 1 2 3 4 5 6 7 OB OB OB 493 492 491 490 489 488 487
2 1 OB OB OB
• The rising edge and falling edge of the VD pulse must be in high period of the HD pulses.
R
P
D0
E
SERIAL DATA TIMING (SDI, SCLK, LOAD)
Fixed Gain
AGC
D30
SDI
SCLK LOAD
• Data in SDI are taken at the rising edge of SCLK. • Clock frequency of SCLK should be less than 1/2 of that of CLK. • Do not insert the SDI, SCLK and LOAD pulses between 28H* and 29H*. Refer to "VERTICAL PULSE TIMING". • Refer to "SERIAL DATA INPUTS" for the contents of serial data from D0 to D37. * It means ordinal number of the HD pulse.
7
Y
35 40 620 615 D37
LZ34B1B
[Monitoring Mode]
HORIZONTAL PULSE TIMING
HD 776 780 012 4 CLK ADOUT (D0-D7)
Normal
8
12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92
645 650 655OB ππππππππππππππ OB
Mirror
10 HD CLK ADOUT (D0-D7)
Normal
5
1 OB ππππππππππππππ OB
74 78 82 86 90 94 98 102 106 110 114 118 122 126 130 134 138 142 146 150 154 158 162 166 170
OB ππππππππππππππ OB 1
Mirror
5
10
15
R
20 25 30
OB ππππππππππππππ OB 655 650 645 640 635 630 625
• The rising edge of the HD pulse must be between two rising edges of CLK (0) and CLK (1). • The falling edge of the HD pulse must be between two rising edges of CLK (78) and CLK (79).
PHASE RELATIONS BETWEEN DIGITAL OUTPUT (ADOUT) AND CLOCK (CLK)
CLK ∆t ADOUT (D0-D7)
IN
SYMBOL ∆t MIN.
Shutter D20
A
45
TYP. MAX. UNIT ns
IM
Offset D10
VERTICAL PULSE TIMING
SDI, SCLK, LOAD Forbidden Period
VD HD ADOUT (D0-D7)
Normal
260 261 262 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
486 489 490 493 OB
Mirror
L
OB 1 2 5 6 9 10 13 14 17 18 21 22 25 26 29 30 33 34 37 38 41 42 OB 493 492 489 488 485 484 481 480 477 476 473 472 469 468 465 464 461 460 457 456 453 452
8 5 4 1 OB
• The rising edge and falling edge of the VD pulse must be in high period of the HD pulses.
R
P
D0
E
SERIAL DATA TIMING (SDI, SCLK, LOAD)
Fixed Gain
AGC
D30
SDI
SCLK LOAD
• Data in SDI are taken at the rising edge of SCLK. • Clock frequency of SCLK should be less than 1/2 of that of CLK. • Do not insert the SDI, SCLK and LOAD pulses between 15H* and 16H*. Refer to "VERTICAL PULSE TIMING". • Refer to "SERIAL DATA INPUTS" for the contents of serial data from D0 to D37. * It means ordinal number of the HD pulse.
8
Y
35 40 620 615 D37
LZ34B1B
SERIAL DATA INPUTS
DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D35 D36 D37 MAX2 (MSB) MAX1 MAX0 (LSB) OFS7 (MSB) OFS6 OFS5 OFS4 OFS3 OFS2 OFS1 OFS0 (LSB) SHT9 (MSB) SHT8 SHT7 SHT6 SHT5 SHT4 SHT3 SHT2 SHT1 SHT0 (LSB) MIRH MIRV MON NAME AGC6 (MSB) AGC5 AGC4 AGC3 AGC2 AGC1 AGC0 (LSB) Selection of fixed gain (3 to 10 dB) Offset level control of ADC (0.9 to 1.5 V) Auto gain control (0 to 20 dB) FUNCTION
Shutter speed control
E
L
R
P
SAD2 (MSB) SAD1 SAD0 (LSB) LPMD1 LPMD0 USB
IM
9
(Normal mode : Exposure time is 1 to 1/525 frame period.) (Monitoring mode : Exposure time is 1 to 1/262 frame period.)
H : Horizontal mirror inversion image, L : Normal image H : Vertical mirror inversion image, L : Normal image H : Monitoring mode, L : Normal mode Phase selection of AD clock D32/D33/D34 = L/L/L : –30˚ D32/D33/D34 = L/H/L : 0˚ Power save mode D35/D36 = L/L : Normal mode D32/D33/D34 = L/L/H : –15˚ D32/D33/D34 = L/H/H : +15˚ D35/D36 = L/H : AD and AGC off
D34
D35/D36 = H/L : AD off D35/D36 = H/H : Inhibited mode H : Inhibited mode, L : Normal mode
IN
A
R
Y
Not used. (Fix to low level.)
LZ34B1B
Setting of Auto Gain Control
• One LSB of the gain code represents approximately 0.156 dB. • Nominal gain values at typical codes are shown below.
AUTO GAIN CONTROL (dB) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 D0 L L L L L L L L L L H H H H H H H H H D1 L L L L L H H H H H L L L L L D2 L L L H H L L L H H L L L H D3 L L H L H L L H L H L L D4 L H H L L L H H L L D5 L H L H L L H L H L L H L H L H H L H L H D6 L L H H H L L
R
L H H L L H H H L L H
A
H L H H L H L H H
IN
H H L L H H H L H H H H H D10 L H L H L H L H
IM
H H
Setting of Fixed Gain
FIXED GAIN (dB) 3 4 5 6 7 8
• One LSB of the gain code represents 1 dB.
E
R
P
9 10
L
D8 L L L L H H H H
D9 L L H H L L H H
10
Y
L H H L L L H H H L L H H H
LZ34B1B
Setting of Offset Level
• One LSB of the offset code represents approximately 0.002 V. • Nominal offset values at typical codes are shown below.
OFFSET LEVEL (V) 0.9 1.0 1.1 1.2 1.3 1.4 1.5 D11 L L L H H H H D12 L L H L L H H D13 L H L L H L H D14 L L H L L H H D15 L H L L H L H D16 L L H L L H H D17 L H L L H L H D18 L H H L L H H
Setting of Shutter Speed
• One LSB of the shutter speed code represents 1H, where 1H is the HD pulse period. • Shutter speed values at typical codes are shown below in normal mode, monitoring mode and USB mode.
D19 L D20 L D21 L D22 L D23 L
A
D24 L L L L L L L H H H H H H L L L L L L H H
SHUTTER SPEED (Exposure Time Unit : H) Normal 525 • • 265 264 263 • • 27 26 25 • • 2 1 525 • • 525 Monitoring 262 • • 2 1 262 • • 262 262 262 • • 262 262 262 • • 262
R
D25 L L L L L L L H H H H
Y
D26 L D27 L H H H L L H L L H H H L L H H H L L H H
D28 L
L
L L L
IM
L L L
H H H
L L L
IN
L L L H H H L L L H
L H L
H H H
H H H
L H L
R
E
H H H
L L L
L L L
H L H
H
H
H
H
Setting of Driving Modes
FUNCTION Normal mode Monitoring mode D31 L H D37 L L
P
11
• Insert capacitors more than 10 µF between AVDD and AGND and between DVDD and DGND. • Capacitors whose values are not shown must be 0.1 µF.
(6.135 MHz)
P
CLK HD D7 D6 D5 D4 D3 VD SDI 27 18 D2 D1 D0 CKO Oscillator (12.27 MHz) 14 CKI DVDD DGNG AVDD 10 9 AGND Digital Power Supply 13 17 16 15 26 25 24 23 22 21 20 19
R E
28 29 30 31 32 33 34 12 35 36 1 ADL OFS ADH AVDD BIAS1 AGND AGCOUT 2 3 4 5 6 7 8 11
SCLK LOAD CLP2 CLP1 SIGOUT SIGIN BIAS2 REFIN NC +
EXAMPLE OF OPERATION CIRCUIT
L
LZ34B1B
(TOP VIEW)
IM
STBY
12
NC + 10 µF
10 µF
IN
A
R
Analog Power Supply
Y
LZ34B1B
LZ34B1B
PACKAGE OUTLINES 36 LCC (N-LCC036-S425B)
Center of effective imaging area 9.8±0.1(◊2) 27 28 10.8±0.1 ¬ 6.05±0.075 A 0.65 A' Index mark 36 0.5±0.35 1 Center of die. 9 Center of die 1.9±0.2 10 1.2±0.12 10 R0.4TYP. 9 0.6TYP. 1 36 1.27TYP. 19 18 0.7TYP. 0.4TYP. 18 19 R0.15TYP. 27 28
(Unit : mm)
0.5±0.35 5.4±0.075
P-1.0TYP.
0.1TYP.
Refractive Refractiva index : nd = 1.5 1.05±0.1
0.7±0.1 (◊2)
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0.04 (◊1) A
A'
Rotation error of die : ¬ 1.5˚MAX. (◊1 : Effective imaging area) (◊2 : Lid' size)
Glass Lid
0.85±0.1
Package
0.04 (◊1)
CMOS
13
LZ34B1B
PRECAUTIONS FOR CMOS IMAGE SENSORS 1. Package Breakage
In order to prevent the package from being broken, observe the following instructions : 1) The CMOS image sensor is a precise optical component and the package material is ceramic. Therefore, ø Take care not to drop the device when mounting, handling, or transporting. ø Avoid giving a shock to the package. Especially when pins are fixed to the socket or the circuit board, small shock could break the package more easily than when the package isn’t fixed. 2) When mounting the package on the housing, be sure that the package is not bent. – If a bent package is forced into place between a hard plate or the like, the package may be broken. 3) If any damage or breakage occurs on the surface of the glass cap, its characteristics could deteriorate. Therefore, ø Do not hit the glass cap. ø Do not give a shock large enough to cause distortion. ø Do not scrub or scratch the glass surface. – Even a soft cloth or applicator, if dry, could cause flaws to scratch the glass.
2) When directly handling the device with the fingers, hold the part without pins and do not touch any pin. 3) To avoid generating static electricity, a. do not scrub the glass surface with cloth or plastic. b. do not attach any tape or labels. c. do not clean the glass surface with dustcleaning tape. 4) When storing or transporting the device, put it in a container of conductive material.
3. Dust and Contamination
Dust or contamination on the glass surface could deteriorate the output characteristics or cause a scar. In order to minimize dust or contamination on the glass surface, take the following precautions : 1) Handle the CMOS image sensor in a clean environment such as a cleaned booth. (The cleanliness level should be, if possible, class 1 000 at least.) 2) Do not touch the glass surface with the fingers. If dust or contamination gets on the glass surface, the following cleaning method is recommended : ø Dust from static electricity should be blown off with an ionized air blower. For antielectrostatic measures, however, ground all the pins on the device before blowing off the dust. ø The contamination on the glass surface should be wiped off with a clean applicator soaked in isopropyl alcohol. Wipe slowly and gently in one direction only. – Frequently replace the applicator and do not use the same applicator to clean more than one device. ◊ Note : In most cases, dust and contamination are unavoidable, even before the device is first used. It is, therefore, recommended that the above procedures should be taken to wipe out dust and contamination before using the device.
2. Electrostatic Damage
As compared with general MOS-LSI, CMOS image sensor has lower ESD. Therefore, take the following antistatic measures when handling the CMOS image sensor : 1) Always discharge static electricity by grounding the human body and the instrument to be used. To ground the human body, provide resistance of about 1 M$ between the human body and the ground to be on the safe side.
14
LZ34B1B
4. Other
1) Soldering should be manually performed within 2 seconds per pin at 400°C maximum at the tip of soldering iron. 2) Avoid using or storing the CMOS image sensor at high temperature or high humidity as it is a precise optical component. Do not give a mechanical shock to the CMOS image sensor. 3) Do not expose the device to strong light. For the color device, long exposure to strong light will fade the color of the color filters.
15