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Q67000-A5112

Q67000-A5112

  • 厂商:

    SIEMENS

  • 封装:

  • 描述:

    Q67000-A5112 - Video and Sound IF with FM-PLL Demodulator, AFC and V & S SCART - Siemens Semiconduct...

  • 数据手册
  • 价格&库存
Q67000-A5112 数据手册
Video and Sound IF with FM-PLL Demodulator, AFC and V & S SCART TDA 5950X Bipolar IC Features q q q q Features video and sound IF Video and sound SCART AFC NTSC option P-DSO-24-1 Type TDA 5950X TDA 5950X Functional Description Video IF Section Ordering Code Q67000-A5112 Q67007-A5112 Package P-DSO-24-1 (SMD) P-DSO-24-1 Tape and Reel dry Video IF-broadband amplifier followed by a quasi-synchronous demodulator for negative modulated IF signals. A video switch interface is included in the video section. A separate video output after the demodulator permits the installation of one or more sound traps at the input of the video switch. The tuner AGC threshold is set by means of a potentiometer, all other functions can switched with open collector transistors. Sound IF Section FM-IF limiter with FM-PLL demodulator for the frequency range of 5.5 MHz to 6.5 MHz. The AF section includes an audio switch followed by an audio buffer output. Application The TDA 5950X is suitable for application in television receivers or video tape recorders with A/V switches. Semiconductor Group 1 12.94 TDA 5950X Circuit Description Video IF Section The video IF section incorporates a four-stage, capacitively coupled, symmetrical and controlled amplifier, a limiter with selection and a mixer for quasi-synchronous demodulation of negative modulated IF signals followed by a video output amplifier. The video demodulator output and the video switch input are connected by means of a sound trap. The video switch has two inputs (for signals from video demodulator and from external source) and two outputs. Parallel to the video output amplifier the video signal is used for generating the AGC voltage. The control circuit is designed on the integralaction AGC principle, employing a noise-free peak value detector. A delayed tuner AGC voltage with positive control direction is derived from the AGC voltage via a threshold amplifier that is set by means of an external potentiometer. An AFC push pull output current is generated from picture carrier tank circuit. Sound IF Section The sound IF section incorporates a five-stage, symmetrical limiter amplifier followed by a PLL demodulator. The AF section contains an audio switch followed by an output buffer. Switch Matrix AUX/RF-Control (Pin 4) 0 0 1 1 AV-OFF (Pin 17) 0 1 0 1 Output (Pin 8 / Pin 19) muted IF muted SCART Semiconductor Group 2 TDA 5950X Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Function Delayed tuner AGC output Delayed tuner AGC threshold AGC-time constant Aux / RF control Ground + VS supply voltage Auxiliary video output Video output Auxiliary video input AFC output Demodulator tank circuit Demodulator tank circuit Video input at sound trap output Video demodulator output Sound IF ground Sound IF input A / V OFF Auxiliary audio input Audio output Auxiliary audio output De-emphasis capacitor Low-pass capacitor Video IF input Video IF input Semiconductor Group 3 TDA 5950X Block Diagram Semiconductor Group 4 TDA 5950X Absolute Maximum Ratings TA = 0 to 70 ˚C Parameter Supply voltage Junction temperature Storage temperature Thermal resistance Operating Range Supply voltage Supply voltage delayed tuner AGC Ambient temperature during operation Input frequency range Symbol min. Limit Values max. 8 150 125 70 V ˚C ˚C K/W 0 0 – 40 Unit V6 Tj Tstg Rth JA V6 V1 TA fIF 4.5 1 0 12 8 13.2 70 80 V V ˚C MHz Semiconductor Group 5 TDA 5950X DC Characteristics TA = 0 to 70 ˚C; VS = 5.0 V Parameter Total current DC voltage; pin 1 Aux/RF switch; pin 4 H/open = Aux L = RF Sync tip level; pin 7 Sync tip level; pin 8 Sync tip level; pin 9 DC voltage; pin 10 DC voltage; pin 11 DC voltage; pin 12 Sync tip level; pin 13 Sync tip level; pin 14 DC voltage; pin 16 DC voltage; pin 18 DC voltage; pin 19 DC voltage; pin 20 DC voltage; pin 21 DC voltage; pin 22 DC voltage; pin 23 DC voltage; pin 24 Symbol min. Limit Values typ. 55 max. 63 12 2.4 0 1.35 1.35 1.35 0.4 1.5 1.5 1.5 5.5 1.5 1.65 1.65 1.65 mA V V V V V V V V 1.65 1.45 2.4 2.4 2.4 2.4 V V V V V V V V V V 47 Unit Test Condition I6 V1 V4 V4 V7 V8 V9 V10 V11 V12 V13 V14 V16 V18 V19 V20 V21 V22 V23 V24 RL ≥ 2.7 kΩ|| 10 pF RL ≥ 2.7 kΩ|| 10 pF V6 – 0.4 V V6 – 1.3 V6 – 1.3 1.35 1.15 1.6 1.6 1.6 1.6 1.5 1.3 0 2 2 2 2 2.2 3.6 3.6 Semiconductor Group 6 TDA 5950X AC Characteristics TA = 0 to 70 ˚C; VS = 5.0 V Parameter Symbol Limit Values min. typ. Video IF Section IF-input sensitivity Max. IF-input voltage IF-control range Video demodulator output voltage max. Unit Test Condition V23/24 V23/24 ∆VIF 100 60 1.35 70 140 66 1.5 3.6 3.0 1.1 1.3 100 72 1.65 µV mV dB V V V V V MHz VVideo – 3 dB VVideo + 3 dB VIF IN = 10 mV upper video clipping zero carrier level lower video clipping sync tip level V14pp – 3 dB video bandwidth Output impedance Output sink current Output source current Sound IF Section Min. sound IF-input voltage (min. control) AF-output voltage B14 R14 I14 I14 8 10 10 2 –3 CL < 20 pF, RL > 1 kΩ DC and AC DC and AC Ω mA mA V16 V19 175 70 250 100 350 µV mV ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz Aux. AF-output voltage V20 350 500 700 mV Total harmonic distortion THDAFo 0.2 0.3 % Max. aux. input voltage Gain audio switch AM-Suppression V18rms G18-19 αAM19/20 50 55 55 65 1 1 V dB dB dB fmod = 1 kHz m = 30 % V16 = 1 mV…100 mV V16 = 500 µV…1 mV V16 = 1 mV…100 mV Signal to noise ratio (weighted) S/N19/20 50 60 Semiconductor Group 7 TDA 5950X AC Characteristics (cont’d) TA = 0 to 70 ˚C; VS = 5.0 V Parameter Ripple rejection Input impedance SCART-SWITCH Input impedance Gain of Video switch Aux. VIN-video output VideoIN-aux. output VideoIN-video output fmod = 5 MHz – 3 dB video bandwidth – 3 dB video bandwidth Cross talk attenuation fmod = 5 MHz Intermodulation Suppression of video signal harmonics Signal to noise ratio (weighted) Ripple rejection on pin 7 and 8 Max. input current AFC AFC-control steepness Tuner AGC Sink current Threshold range for del. Tuner-AGC *) Design hints Symbol Limit Values min. typ. max. 35 40 50 Unit dB kΩ Test Condition RR19/20 Z18*) Z13 G9-8 G13-7 G13-8 B7 B8 a9-8 α7/8 0.9 0.9 0.9 8 8 50 54 35 1 || 2 1 1 1 10 10 1.1 1.1 1.1 kΩ || pF MHz MHz dB CL < 20 pF, RL > 1 kΩ CL < 50 pF, RL > 1 kΩ V4 = 0 V f1.07 MHz = fSC – fCC 60 40 60 40 0.5 1 dB dB dB dB µA S/N7/8 RR7/8 I9 56 35 CCIR – 567 fVs = 0…100 kHz ∆I10/∆f 0.6 0.8 1.0 µA/kHz I1 VIF 0 2.5 50 10 3.5 5 µA mA mV mV no tuner gain reduction max. tuner gain reduction R2 = 4.7 kΩ R2 = 0 Ω Semiconductor Group 8 TDA 5950X Alignment Instructions At a video carrier input level of V23/24 = 4 mVrms, fP/C = 38.9 MHz, and a superimposed AGC voltage of V3 = 1.5 V, the demodulator tank circuit is preliminarily aligned until a max. video signal 14 Vpp is obtained at the video output. Any suitable video test signal can be used for modulation. The AGC voltage V3 is reduced until the signal is approx. 1 Vpp and the max. video signal is obtained when fine-aligning the demodulator tank circuit. The alignment is not critical due to relatively large bandwidth of the demodulator tank circuit. Fine-tuning to intercarrier S/N, differential phase or 2T-pulse characteristics is possible. Test Circuit Semiconductor Group 9 TDA 5950X Application Circuit Semiconductor Group 10 TDA 5950X Package Outlines Plastic-Package, P-DSO-24-1 (SMD) (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” SMD = Surface Mounted Device Semiconductor Group 11 Dimensions in mm GPS05144
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