Q67000-A9277

5-V Low-Drop Voltage Regulator TLE 4265 Bipolar IC Features q q q q q q q q q Output voltage tolerance ≤ ± 2 % Low-drop voltage Very low standby current consumption Overtemperature protection Reverse polarity protection Short-circuit proof Setable reset threshold Wide temperature range Suitable for use in automotive electronics P-TO220-5-1 Type TLE 4265 TLE 4265S Ordering Code Q67000-A9138 Q67000-A9277 Package P-TO220-5-1 P-TO220-5-2 P-TO220-5-2 Functional Description TLE 4265 is a 5-V low-drop voltage regulator in a TO220-5 package. Maximum input voltage is 45 V. It can produce an output current of > 200 mA. The IC is shortcircuit-proof and thermal protected. Application The IC regulates an input voltage VI in the range 6 V < VI < 45 V to VQrated = 5.0 V. A reset signal is generated for an output voltage VQ of < 4.5 V. The reset delay can be set with an external capacitor. This voltage regulator is especially suitable for microprocessor applications in automobiles. Semiconductor Group 1 1998-11-01 TLE 4265 Pin Configuration (top view) P-TO220-5-1 P-TO220-5-2 1 2 3 4 5 VΙ GND VQ QRES DRES AEP01492 Pin Definitions and Functions Pin 1 2 3 4 5 Symbol Function Input voltage; block direct on IC with ceramic capacitor to GND Reset output; open-collector output connected to output across resistor of 30 kΩ Ground Reset delay; wire with capacitor to GND for setting delay 5-V output voltage; block to GND with 22-µF capacitor VI QRES GND DRES VQ Semiconductor Group 2 1998-11-01 TLE 4265 Circuit Description The control amplifier compares a highly precise reference voltage, produced by resistor alignment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. A saturation control, a function of the load current, prevents any over-saturating of the power element. If the output voltage drops below 4.5 V, the external reset-delay capacitor is discharged by the reset generator. If the voltage on the capacitor reaches the lower threshold VST, a signal is triggered on the reset output and not canceled again until the upper threshold VdT is exceeded. The IC is protected against overload, overtemperature and reverse polarity. Temperature Sensor In- 1 put Control Amplifier Adjustment Bandgap Reference + Buffer Saturation Control and Protection 5 Output Reset Generator 4 Reset Delay 2 Reset Output 3 GND AEB01493 Semiconductor Group 3 1998-11-01 TLE 4265 Block Diagram Absolute Maximum Ratings TJ = – 40 to 150 °C Parameter Symbol Limit Values min. Input Input voltage Reset Output Voltage Reset Delay Voltage Output Output voltage Output current GND Current Temperatures Junction temperature Storage temperature Operating Range Input voltage Junction temperature max. Unit Notes VI – 42 45 V – VR – 0.3 42 V – Vd – 0.3 42 V – VQ IQ – 0.3 – 7 – V – – Limited internally IGND – 0.1 – A – TJ Tstg – – 50 150 150 °C °C – – VI TJ – – 40 45 150 V °C – – Semiconductor Group 4 1998-11-01 TLE 4265 Absolute Maximum Ratings (cont’d) TJ = – 40 to 150 °C Parameter Symbol Limit Values min. Thermal Resistance Junction ambient Junction-case max. Unit Notes Rthja Rthjc – – 70 10 K/W – K/W – Optimum reliability and lifetime can be ensured in integrated circuits by not exceeding a junction temperature of 125 °C during operation. Although operation up to the maximum permissible junction temperature of 150 °C is possible, such boundary conditions, if sustained, may affect device reliability. Characteristics VI = 13.5 V; TJ = 25 °C (unless specified otherwise) Parameter Symbol Limit Values min. Output voltage typ. 5 max. 5.1 V 5 mA ≤ IQ ≤ 150 mA 6 V ≤ VI ≤ 28 V – 40 °C ≤ TJ ≤ 125 °C – Unit Test Condition VQ 4.9 Output-current limiting Current consumption Iq = II – IQ Current consumption Iq = II – IQ Current consumption Iq = II – IQ Drop voltage Load regulation IQ Iq Iq Iq VDr ∆VQ 200 – – – – – 250 750 10 15 0.35 – – 1000 15 20 0.5 25 mA µA mA mA V mV IQ = 0 mA IQ = 150 mA IQ = 150 mA VI = 4.5 V IQ = 150 mA1) IQ = 5 to 150 mA Semiconductor Group 5 1998-11-01 TLE 4265 Characteristics (cont’d) VI = 13.5 V; TJ = 25 °C (unless specified otherwise) Parameter Symbol Limit Values min. Line regulation ∆VQ – – typ. 15 54 max. 25 – mV dB Unit Test Condition VI = 6 to 28 V IQ = 150 mA fr = 100 Hz Vr = 0.5 Vpp Supply-voltage rejection SVR Reset Generator Switching threshold Saturation voltage Saturation voltage Charge current Delay switching threshold Delay Delay VRT VR VC Ich Vdt td tt 4.2 – – 7 1.5 – – 4.5 0.1 50 10 1.8 18 2 4.8 0.4 100 14 2.1 – – V V mV µA V ms µs – IR = 1 mA VQ < VRT – – Cd = 100 nF Cd = 100 nF 1) Drop voltage = VI – VQ (measured at point where VQ is 100 mV smaller than at VI = 13.5 V) Semiconductor Group 6 1998-11-01 TLE 4265 ΙΙ 1000 µF 470 nF 1 5 ΙQ 22 µF TLE 4265 2 4 Ι ch 3 Ι GND 5.6 k Ω ΙR VQ VR VΙ VC CD AES01494 Test Circuit Input 6V to 45 V 470 nF Reset To MC 1 5 Output 2 TLE 4265 4 100 nF 22 µF 3 AES01495 Application Circuit Semiconductor Group 7 1998-11-01 TLE 4265 Drop Voltage versus Output Current 700 AED01496 Current Consumption versus Output Current 28 AED01497 VDr mV 500 400 300 Ιq mA 20 16 12 T j = 25 C 200 100 0 V Ι = 13.5 V 8 4 0 0 50 100 150 200 mA 300 ΙQ 0 50 100 150 200 mA 300 ΙQ Current Consumption versus Input Voltage 30 AED01498 Output Voltage versus Input Voltage 12 AED01499 Ιq mA RL = 25 Ω VQ V RL = 25 Ω 20 8 15 6 10 4 5 2 0 0 0 10 20 30 V 50 0 2 4 6 V 10 VΙ VΙ Semiconductor Group 8 1998-11-01 TLE 4265 Charge Current versus Temperature 14 AED01500 Switching Voltage VdT and VST versus Temperature 3.2 AED01501 Ι ch µA VdT V Ι ch 10 8 6 V Ι = 13.5 V 2.4 V Ι = 13.5 V VC = 1.5 V 2.0 VdT 1.6 1.2 4 2 0.8 0.4 0 -40 -40 0 40 80 C 160 0 40 80 C 160 Tj Tj Output Voltage versus Temperature AED01502 Output Voltage versus Input Voltage 300 AED01503 5.10 VQ V 5.00 V Ι = 13.5 V Ι Q mA 250 T j = 25 C 200 4.90 150 100 4.80 50 4.70 -40 0 40 80 C 160 0 0 10 20 30 40 50 Tj Vj Semiconductor Group 9 1998-11-01 TLE 4265 Package Outlines P-TO220-5-1 (Plastic Transistor Single Outline) 10 +0.4 10.2 -0.2 3.75 +0.1 4.6 -0.2 1x45˚ 1.27 +0.1 2.8 19.5 max 16 ±0.4 8.8 -0.2 2.6 4.5 ±0.4 8.4 ±0.4 1 1.7 5 0.8 +0.1 1) 0.4 +0.1 0.6 M 5x Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mm Semiconductor Group 10 1998-11-01 GPT05107 1) 1-0.15 at dam bar (max 1.8 from body) 1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper) 8.6 ±0.3 10.2 ±0.3 15.4 ±0.3 TLE 4265 P-TO220-5-2 (Plastic Transistor Single Outline) 10 +0.4 10.2 -0.2 3.75 +0.1 1.27 +0.1 4.6 -0.2 1x45˚ 2.8 10.9 ±0.2 1 1.7 5 12.9 ±0.2 0.4 +0.1 0.8 +0.1 1) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Dimensions in mm Semiconductor Group 11 1998-11-01 GPT05256 2.6 ±0.15 0.6 M 5x 1) 1-0.15 at dam bar (max 1.8 from body) 1) 1-0.15 im Dichtstegbereich (max 1.8 vom Körper) 8.8 -0.2 15.4 ±0.3