TLE4208

1-A Quad-HBD (Quad-Half-Bridge Driver) TLE 4208 Overview Features • • • • • • • • • • • • • • Driver for up to 3 motors Delivers up to 0.8 A continuous Optimized for DC motor management applications Very low current consumption in stand-by (Inhibit) mode P-DSO-28-6 Low saturation voltage; typ.1.2 V total @ 25 °C; 0.4 A Output protected against short circuit Error flag diagnosis Overvoltage lockout and diagnosis Undervoltage lockout CMOS/TTL compatible inputs with hysteresis No crossover current Internal clamp diodes Overtemperature protection with hysteresis and diagnosis Enhanced power P-DSO-Package Ordering Code Q67007-A9335 Package P-DSO-28-6 Type TLE 4208 G Description The TLE 4208 is a fully protected Quad-Half-Bridge-Driver designed specially for automotive and industrial motion control applications. The part is built using the Siemens bipolar high voltage power technology DOPL. In a cascade configuration up to three actuators (DC motors) can be connected between the four half-bridges. These four half-bridges are configured as 2 dual-half-bridges, which are supplied and controlled separately. Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked from a standard interface. The standard enhanced power P-DSO-28 package meets the application requirements and saves PCB-board space and costs. Furthermore the built-in features like diagnosis, over- and undervoltage-lockout, shortcircuit protection, over-temperature protection and the very low quiescent current in stand-by mode will open a wide range of automotive and industrial applications. Semiconductor Group 1 1998-06-03 TLE 4208 GND EF12 IN1 N.C. OUT1 GND GND GND GND OUT3 N.C. IN3 INH 34 GND 1 2 3 4 5 6 7 TLE 4208 G 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 N.C. INH12 IN2 V S12 OUT2 GND GND GND GND OUT4 V S34 IN4 EF 34 N.C. AEP02349 Figure 1 Pin Configuration (top view) Semiconductor Group 2 1998-06-03 TLE 4208 Pin Definitions and Functions Pin No. Symbol Function Ground; negative reference potential for blocking capacitor Error Flag output of half-bridges 1and 2; open collector; low = error Input channel of half-bridge 1; controls OUT1 Not connected Power output of half-bridge 1; full short circuit protected; with integrated clamp diodes Power output of half-bridge 3; full short-circuit protected; with integrated clamp diodes Input channel of half-bridge 3; controls OUT3 Inhibit input of half-bridges 3 and 4; low = half-bridges 3 and 4 in stand-by Error Flag output of half-bridges 3 and 4; open collector; low = error Input channel of half-bridge 4; controls OUT4 Power supply voltage of half-bridges 3 and 4; positive reference potential for blocking capacitor Power output of half-bridge 4; full short circuit protected; with integrated clamp diodes Power-output of half-bridge 2; full short circuit protected; with integrated clamp diodes Power supply voltage of half-bridges 1 and 2; positive reference potential for blocking capacitor Input channel of half-bridge 2; controls OUT2 Inhibit input of half-bridges 1and 2; low = half-bridges 1 and 2 in stand-by 1, 6, 7, 8, 9, GND 14, 20, 21, 22, 23 2 3 EF12 IN1 4, 11, 15, 28 N.C. 5 10 12 13 16 17 18 19 24 25 26 27 OUT1 OUT3 IN3 INH34 EF34 IN4 VS34 OUT4 OUT2 VS12 IN2 INH12 Semiconductor Group 3 1998-06-03 TLE 4208 TLE 4208 G INH 12 27 Inhibit 1,2 DRV1 EF 12 2 Fault-Detection 1,2 DRV2 25 V S12 5 OUT1 IN1 3 IN2 26 INH 12 0 1 1 1 1 IN1 IN2 OUT1 OUT2 X 0 0 1 1 X 0 1 0 1 Inhibit 3,4 Z L L H H Z L H L H 24 OUT2 1,6,7,8, 9,14, GND 20,21, 22,23 10 OUT3 INH 34 13 DRV3 EF 34 16 Fault-Detection 3,4 DRV4 IN3 12 IN4 17 INH 34 0 1 1 1 1 IN3 IN4 OUT3 OUT4 X 0 0 1 1 X 0 1 0 1 Z L L H H Z L H L H 19 OUT4 18 V S34 AEB02350 Figure 2 Block Diagram Semiconductor Group 4 1998-06-03 TLE 4208 Input Logic Functional Truth Table of Halfbridge 1 and 2 INH12 0 1 1 1 1 IN1 X 0 0 1 1 IN2 X 0 1 0 1 OUT1 Z L L H H OUT2 Z L H L H Mode Stand-By Brake LL CW CCW Brake HH Note: Half-Bridge 1 and 2 connected to a full-bridge Functional Truth Table of Half-Bridge 3 and 4 INH34 0 1 1 1 1 IN3 X 0 0 1 1 IN4 X 0 1 0 1 OUT3 Z L L H H OUT4 Z L H L H Mode Stand-By Brake LL CW CCW Brake HH IN: 0 = Logic LOW 1 = Logic HIGH X = don’t care Diagnosis EF12 1 0 0 1 1 0 0 EF34 1 1 1 0 0 0 0 Error OUT: Z = Output in tristate condition L = Output in sink condition H = Output in source condition Note: Half-Bridge 3 and 4 connected to a full-bridge no error over temperature of half-bridge 1 and 2 or over voltage of half-bridge 1 and 2 over temperature of half-bridge 3 and 4 or over voltage of half-bridge 3 and 4 over temperature of all half-bridges or over voltage of all half-bridges Semiconductor Group 5 1998-06-03 TLE 4208 Electrical Characteristics Absolute Maximum Ratings Parameter Symbol Limit Values min. Voltages Supply voltage Supply voltage Logic input voltages (IN1; IN2; INH12; IN3; IN4; INH34) Logic output voltage (EF12; EF34) Currents Output current (cont.) Output current (peak) Output current (diode) Output current (EF) Temperatures Junction temperature Storage temperature Thermal Resistances Junction pin Junction ambient max. Unit Remarks VS12, VS34 VS12, VS34 VI – 0.3 –1 –5 45 – 20 V V V – t < 0.5 s; IS12, IS34 > – 2 A 0V < VS12, VS34 < 45 V VEF12, VEF34 – 0.3 20 V 0 V < VS12, VS34 < 45 V IOUT1-4 IOUT1-4 IOUT1-4 IEF12-34 – – –1 –2 – – 1 5 A A A mA internally limited internally limited – – Tj Tstg – 40 – 50 150 150 °C °C – – Rthj-pin RthjA – – 25 65 K/W K/W measured to pin 7 – Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 6 1998-06-03 TLE 4208 Operating Range Parameter Supply voltage Symbol Limit Values min. max. V V After VS12, VS34 rising above VUV ON Outputs in tristate Outputs in tristate – Unit Remarks VS12, VS34 Supply voltage increasing VS12, VS34 Supply voltage decreasing VS12, VS34 Logic input voltages VI (IN1; IN2; INH12; IN3; IN4; INH34) Junction temperature VUV OFF 18 – 0.3 – 0.3 –2 VUV ON VUV OFF V 18 V Tj – 40 150 °C – Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 7 1998-06-03 TLE 4208 Electrical Characteristics 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Current Consumption INH12 = INH34 = LOW Quiescent current Quiescent current typ. max. Unit Test Condition IS IS – – – 20 100 40 µA µA IS = IS12 + IS34 IS = IS12 + IS34; VS12 = VS34 = 13.2 V; Tj = 25 °C INH12 = HIGH and INH34 = LOW or INH12 = LOW and INH34 = HIGH Supply current Supply current Supply current IS12, IS34 – IS12, IS34 – IS12, IS34 – 10 – – 20 30 50 mA mA mA – IOUT1/3 = 0.4 A IOUT2/4 = – 0.4 A IOUT1/3 = 0.8 A IOUT2/4 = – 0.8 A Over- and Under Voltage Lockout UV Switch ON voltage UV Switch OFF voltage UV ON/OFF hysteresis OV Switch OFF voltage OV Switch ON voltage OV ON/OFF hysteresis VUV ON VUV OFF VUV HY VOV OFF VOV ON VOV HY – 5 – – 18 – 6.5 6 0.5 20 7.5 – – 24 V V V V V V VS12, VS34 increasing VS12, VS34 decreasing VUV ON – VUV OFF VS12, VS34 increasing 19.5 – 0.5 – VS12, VS34 decreasing VOV OFF – VOV ON Semiconductor Group 8 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Outputs OUT1; OUT2; OUT 3; OUT 4 Saturation Voltages Source (upper) IOUT12, IOUT34 = – 0.2 A Source (upper) IOUT12, IOUT34 = – 0.4 A Sink (upper) IOUT12, IOUT34 = – 0.8 A Sink (lower) IOUT12, IOUT34 = 0.2 A Sink (lower) IOUT12, IOUT34 = 0.4 A Sink (lower) IOUT12, IOUT34 = 0.8 A Total Drop IOUT12, IOUT34 = 0.2 A Total Drop IOUT12, IOUT34 = 0.4 A Total Drop IOUT12, IOUT34 = 0.8 A Clamp Diodes Forward voltage; upper Upper leakage current Forward voltage; lower Notes see page 11. Unit Test Condition typ. max. VSAT U VSAT U VSAT U VSAT L VSAT L VSAT L – – – – – – 0.85 1.15 0.90 1.20 1.10 1.50 0.15 0.23 0.25 0.40 0.45 0.75 V V V V V V Tj = 25 °C Tj = 25 °C Tj = 25 °C Tj = 25 °C Tj = 25 °C Tj = 25 °C VSAT VSAT VSAT – – – 1 1.2 1.6 1.4 1.7 2.5 V V V VSAT = VSAT U + VSAT L VSAT = VSAT U + VSAT L VSAT = VSAT U + VSAT L VFU ILKU VFL – – – 1 – 0.9 1.5 5 1.4 V mA V IF = 0.4 A IF = 0.4 A1) IF = 0.4 A Semiconductor Group 9 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Input Interface Logic Inputs IN1; IN2; IN3; IN4 H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Logic Inputs INH12; INH34 H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Error-Flags EF12; EF34 L-output voltage level Leakage current typ. max. Unit Test Condition VIH VIL VIHY IIH IIL – 1.0 – –2 2.0 1.5 0.5 – 3.0 – – 10 V V V µA µA – – – – 100 – 20 – 5 VI = 5 V VI = 0 V VIH VIL VIHY IIH IIL – 1.0 – – – 10 2.7 2.0 0.7 – 3.5 – – 10 V V V µA µA – – – 100 250 VINH = 5 V VINH = 0 V VEFL IEFLK – – 0.2 – 0.4 10 V µA IEF = 2 mA 0 V < VEF < 7 V Semiconductor Group 10 1998-06-03 TLE 4208 Electrical Characteristics (cont’d) 8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Thermal Shutdown Thermal shutdown junction temperature Thermal switch-on junction temperature Temperature hysteresis 1) Unit Test Condition typ. max. TjSD TjSO ∆T 150 120 – 175 200 – 30 170 – °C °C K – – – Guaranteed by design. Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Semiconductor Group 11 1998-06-03 TLE 4208 Watchdog In Watchdog Out Reset Out Q 8 1 14 9 6 3,4,5,10,11,12 7 D GND TLE 4278 G 13 Input Watchdog Adjust VS = 12 V D1 1N4001 2 R QA 10 k Ω WDO WDI R V CC R QB 10 k Ω Reset Adjust CQ 22 µF CD 100 nF R WA 100 k Ω CΙ CS 100 nF 22 µF 28 V S12 TLE 4208 G INH12 4 Inhibit 1,2 DRV1 EF12 25 Fault-Detection 1,2 DRV2 27 OUT1 IN1 24 INH12 IN1 IN2 OUT1 OUT2 M1 1 OUT2 IN2 5 0 1 1 1 1 X 0 0 1 1 X 0 1 0 1 Inhibit 3,4 Z L L H H Z L H L H 6,7,8,9, µC GND INH34 18 DRV3 EF34 11 Fault-Detection 3,4 DRV4 20,21, 22,23 13 OUT3 IN3 10 INH34 IN3 IN4 OUT3 OUT4 M2 15 OUT4 14 V S34 AES02351 IN4 19 0 1 1 1 1 X 0 0 1 1 X 0 1 0 1 Z L L H H Z L H L H Figure 3 Application Circuit 1 (Device is used as Dual-Full-Bridge-Driver) Semiconductor Group 12 1998-06-03 TLE 4208 Diagrams Quiescent current IS over Temperature 50 µA AED02352 Saturation Voltage of Source VSAT U over Temperature 1500 AED02308 V SAT U 1250 mV 1000 VS = 14 V Ι S 40 Ι OUT = 800 mA Ι OUT = 400 mA 30 VS = 18 V 750 Ι OUT = 200 mA 20 VS = 13.2 V 500 VS = 8 V 10 250 0 -50 0 50 100 C 150 Tj 0 -50 0 50 100 ˚C 150 Tj Saturation Voltage of Sink VSAT L over Temperature 1000 AED02309 Total Drop at outputs VSAT over Temperature 2000 AED02310 V SAT L mV 750 VS = 14 V V SAT mV 1500 VS = 14 V Ι OUT = 800 mA Ι OUT = 400 mA 500 Ι OUT = 800 mA 1000 Ι OUT = 200 mA Ι OUT = 400 mA 250 500 Ι OUT = 200 mA 0 -50 0 50 100 ˚C 150 0 -50 0 50 100 ˚C 150 Tj Tj Semiconductor Group 13 1998-06-03 TLE 4208 Package Outlines P-DSO-28-6 (Plastic Dual Small Outline Package) 0.35 x 45˚ 2.65 max 2.45 -0.2 0.2 -0.1 1.27 0.35 +0.15 2) 0.2 28x 28 15 0.1 0.4 +0.8 10.3 ±0.3 1 Index Marking 18.1 -0.4 1) 14 1) Does not include plastic or metal protrusions of 0.15 max rer side 2) Does not include dambar protrusion of 0.05 max per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 14 0.23 +0.0 9 8˚ ma x GPS05123 7.6 -0.2 1) Dimensions in mm 1998-06-03