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S-2100R

S-2100R

  • 厂商:

    SII(精工半导体)

  • 封装:

  • 描述:

    S-2100R - 64-bit FUSE ROM - Seiko Instruments Inc

  • 数据手册
  • 价格&库存
S-2100R 数据手册
Contents Features........................................................... 1 Applications...................................................... 1 Pin Assignment ................................................ 1 Block Diagram.................................................. 1 Terminal Description ........................................ 2 Mode Table ...................................................... 2 Absolute Maximum Ratings ............................. 2 Recommended Operating Conditions.............. 2 DC Electrical Characteristics ........................... 3 AC Electrical Characteristics............................ 3 Read Mode Operation...................................... 4 Counter Hold Mode Operation ......................... 4 Program Mode Operation ................................ 5 Input Priority ..................................................... 6 Notes................................................................ 6 Dimensions ...................................................... 7 Characteristics ................................................. 8 64-bit FUSE ROM S-2100R The S-2100R is a CMOS 64-bit serial FUSE ROM. It has a low standby current (0.3 mA max., VDD=1.5 V) and has a wide operating voltage range. Data can be read serially by clock pulses from address 1 to address 64. All the addresses are initialized at “H” so writing into “L” can be done only once. n Features · · Low standby current (0.3 mA max., Wide operating voltage range VDD=1.5 V) n Applications · · · Pager ID ROM Cordless telephone Security equipment n Pin Assignment 8-pin DIP Top view DATA CE/PE COUNTER OUT VSS 1 8 VDD DATA RST CE/PE CLK PD/VPP COUNTER OUT VSS 1 2 3 4 8-pin SOP Top view 8 7 6 5 VDD RS CL PD/VPP 2 7 3 6 4 5 Figure 1 n Block Diagram COUNTER OUT ƒ † COUT CLK CL 6-BIT COUNTER RS READ / WRITE CONTROL VP DIN DOUT A1 A0 A2 A3 A4 A5 ROW DECODER RST ‡ 64-BIT FUSE ROM MEMORY CELL MATRIX CE/PE ‚ DE DATA CONTROL SENSE AMP. COLUMN DECODER VPP VPP CONTROL ˆVDD „VSS … PD/VPP DATA • VPI Figure 2 Seiko Instruments Inc. 1 64-bit FUSE ROM S-2100R n Terminal Description Table 1 Pin No. 1 2 3 4 5 Symbol DATA CE/PE Pin Name Data input/output terminal Mode select terminal Description Tri-state data input/output terminal Mode select terminal (Refer to operation mode table) 6-bit counter; 64th bit detection output terminal Normally, connected to GND. Input terminal of writing voltage to FUSE memory at 21 V. (Refer to operation mode table.) Pull-down resistor built in. Clock input terminal of 6-bit counter. falling edge. Reset input terminal of 6-bit counter. Normally, connected to +1.1 to +5.5 V. Operates at the Operates at “L”. COUNTER Counter output terminal OUT VSS PD/VPP Negative power supply terminal Program voltage input terminal 6 7 8 CLK RST VDD Clock input terminal Reset input terminal Positive power supply terminal n Mode Table Table 2 Terminal Read CE/PE VSS VDD VDD PD/VPP VSS VSS VPP CLK Input possible Input impossible Input impossible RST Input possible Input impossible Input impossible DATA Data output High impedance Data input Read Counter hold Program n Absolute Maximum Ratings Parameter Power supply voltage PD/VPP input voltage Input voltage Output voltage Storage temperature under bias Storage temperature Table 3 Symbol VDD VPP VIN VOUT Vbias Vstg Ratings -0.3 to +6.5 -0.3 to 26 VSS -0.3 to VDD+0.3 VSS -0.3 to VDD+0.3 -30 to +85 -40 to +125 Unit V V V V °C °C n Recommended Operating Conditions Table 4 Parameter Power supply voltage High level input voltage Low level input voltage Operating temperature Symbol VDD VIH VIL Vopr Conditions Ta=25°C, Ta=25°C, Ta=25°C, Ta=25°C, Ta=25°C, Ta=25°C, Read, Write Read Write Read Write tCH=15ms Min. 1.1 4.5 VDD-0.3 VDD-0.3 -0.3 -0.3 -20 Typ. 1.5 5.0 ¾ ¾ ¾ ¾ ¾ Max. 5.5 5.5 VDD VDD 0.3 0.5 70 Unit V V V V V V °C 2 Seiko Instruments Inc. 64-bit FUSE ROM S-2100R n DC Electrical Characteristics Table 5 Parameter Operating current consumption Standby current consumption PD/VPP input voltage PD/VPP input current Output current Pull-down resistance Symbol IDDO IDDS VPP IPP IOH IOL RD VDD=1.1 to 5.5 V, VOH=VDD-0.3 V VDD=1.1 to 5.5 V, VOH=0.3 V VDD=1.5 V VDD=1.5 V, Conditions fCLK=50 kHz Min. ¾ ¾ 20 ¾ -300 300 0.1 Typ. ¾ ¾ 21 ¾ ¾ ¾ 0.2 Max. 20 0.3 22 150 ¾ ¾ 0.4 Unit mA mA V mA mA mA MW VDD=1.5 V, RST=VDD CLK=VDD, CE/PE=VSS n AC Electrical Characteristics 1. Read mode Table 6 (Ta=25°C, VDD=1.5 V) Parameter RST hold time Read cycle time CLK hold time Access time CE/PE setup time RST setup time CLK setup time CE access time Output disable time CLK and RST inhibit time Symbol tRH tRC tCH tACC tCES tRS tCS tCE tWZ tCRI Min. 5.0 2.0 5.0 ¾ 2.0 5.0 5.0 ¾ ¾ ¾ Typ. ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Max. ¾ ¾ ¾ 5.0 ¾ ¾ ¾ 5.0 500 500 Unit ms ms ms ms ms ms ms ms ns ns Load : 60 pF 2. Write mode Parameter CE-data setup time Data setup time Data hold time CE-data hold time VPP rise time Program pulse width VPP rise slope Table 7 (Ta=25°C, VDD=5.0 V, VPP=21 V) Symbol tCDS tDS tDH tCDH tr tPW DVPP Min. 0.5 0.5 0 2.0 20 8.0 ¾ Typ. ¾ ¾ ¾ ¾ ¾ ¾ ¾ Max. ¾ ¾ ¾ ¾ ¾ ¾ 4 Unit ms ms ms ms ms ms V/ms Seiko Instruments Inc. 3 64-bit FUSE ROM S-2100R  Read Mode Operation By setting the CE/PE terminal to “ L” level, the S-2100R enters the read mode. * Next, adding an RST pulse causes the contents of the memory bit of address 1 to be output at the DATA terminal; the rising of the RST pulse latches the data and 2 3 stabilizes it. * Reading of addresses from 2 to 64 can be done by adding a CLK pulse sequentially after reading address 1. * As soon as address 64 has been read, the COUNTER OUT terminal outputs “ H” level. When it finishes reading address 64, it does not accept any more CLK pulses and the counter does not operate. The data of address 64 is maintained till address 1 is read by the RST pulse. 1 CE/PE tCES tRH tRC tCH tACC tCE tACC Address 1 output Address 2 output Address 3 output Address 1 output RST tRC tRC tRS CLK DATA Figure 3 Read mode timing *1 *2 *3 When both the CLK and RST terminals are at “ H” level. When the RST terminal is at “ L” level, the latch is transparent and the data is recognized by the rising of the RST pulse. Data read by the CLK pulse is latched at its rising.  Counter Hold Mode Operation By setting the CE/PE terminal to “ H” level, the S-2100R enters the counter hold mode and the DATA terminal becomes high 4 impedance. * In counter hold mode, the CLK and RST pulses which fall while the CE/PE terminal is at “ H” level are recognized to be invalid and there is no change in counter and data output. When the CE/PE terminal is set to “ L” level again, it returns to the condition in which it was before the counter hold mode. tCES CE/PE RST tCRI tCS CLK Address M output tWZ DATA Address M+1 output Address M+1 output Figure 4 Counter hold mode timing 4 * When both the CLK and RST terminals are at “ H” level. 4 Seiko Instruments Inc. 64-bit FUSE ROM S-2100R n Program Mode Operation By setting the CE/PE terminal to “H” level, the S-2100R enters the counter hold mode and at the same time enters the program mode. *5 Writing is done in program mode after selecting the address in read mode. *6 Select the address, and supply “H” level to the CE/PE terminal and “L” level to the DATA terminal, with the writing pulse VPP being supplied to the PD/VPP terminal. “L” level can be written into the selected address only once. *7 *8 If you coutinue writing from address 1 to 64, the output of the COUNTER OUT terminal goes to “H” level, just like in the read mode, and no more CLK pulses or writing pulses in program mode can be accepted. CE/P RS CL DATA Address 1 output tCDS tCDH Data input tDS tDH Address 1 output Address 2 output Data input PD/VPP tPW Figure 5 Program mode timing *5 *6 *7 *8 In program mode, operate at VDD=5.0 V to assure reliability of the data writing. The selection of addresses is possible only in read mode. Address 1 is selected by RST pulses and writing proceeds sequentially from address 1 by CLK pulse. All the memories are initially at “H” level, so writing into “L” can be done. When data is at “H” level, writing voltage cannot be supplied to the memory. Address 1 is selected again by the RST pulse. The addresses which are not written to “L” level are at “H” level, so writing “L” level in these addresses is possible. Seiko Instruments Inc. 5 64-bit FUSE ROM S-2100R n Input Priority In read mode, priority is given to either the CLK or RST terminal, whichever is entered first. Whichever pulse is input earlier is recognized to be valid from the rising till the end of the operation. If the pulse input later is at “L” level, the signal is ignored, even though the effective pulse input earlier rises. *9 If the CLK and RST pulses are input, the mode shifts from read mode to counter hold mode when both the CLK and the RST terminals go to “H” level. *10 If the CLK and RST pulses which are input in the counter hold mode are still at “L” level after setting the CE/PE terminal to “L” level, these CLK and RST terminals are ignored. The mode shifts to read mode and data which is held before the shift is output at the DATA terminal. *11 In program mode, inputting the DATA terminal before the CE/PE terminal goes to “H” level is prohibited. Also, charging the writing voltage from the PD/VPP terminal is prohibited when the CE/PE terminal is at “L” level. In program mode, input to the DATA terminal muse be decided before charging the writing voltage. *12 *9 Input of the CLK and RST pulses is not recognized as valid unless both pulses are input at “H” level. *10 The counter hold mode is entered when reading of the CLK and RST pulses has been finished and DATA output has been stabilized . *11 No more CLK or RST pulses are accepted unless both the CLK and RST terminals are at “H” level. *12 If data input is changed while writing voltage is supplied, the S-2100R does not accept the changed data. n Notes Memory should not be accessed for at least 10 ms after voltage is supplied and goes to VDD. 6 Seiko Instruments Inc. 64-bit FUSE ROM S-2100R n Dimensions 1. 8-pin DIP 8.8 (9.2 max.) 8 5 6.4 1 1.0 4 1.5 3.4±0.25 4.5 max. 7.62 0.51 min. 2.54 0.46±0.15 2.69 min. 0.25±0.15 0°~15° Unit:mm Figure 6 2. 8-pin SOP 8 5.0 (5.15 max.) 5 0.55 5.0 6.8±0.4 1 4 1.6±0.15 0 min. 1.27 0.35 +0.1 -0.05 Figure 7 2.15 max. 0.15 +0.1 -0.05 Unit: mm Seiko Instruments Inc. 7 64-bit FUSE ROM S-2100R n Characteristics 1. Standby current consumption IDDSAmbient temperature Ta 104 VDD= 6.0V 4.0V 2.0V 1.0V 103 IDDS (nA) 102 101 100 -40 -10 20 Ta (°C) 50 80 2. Access time tACCPower supply voltage VDD 3. Access time tACCPower supply voltage VDD 8 0.7 -40°C -10°C 20°C 50°C 80°C 0.6 tACC (ms) 0.5 0.4 0.3 0.2 0.1 80°C 50°C 20°C -10°C -40°C 6 tACC (ms) 4 2 0 1.0 1.5 VDD (V) 2.0 0 2 3 4 VDD (V) 5 6 8 Seiko Instruments Inc.
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