S-35399A03-J8T2G

S-35399A03 www.ablic.com 2-WIRE REAL-TIME CLOCK © ABLIC Inc., 2007-2018 Rev.3.2_00 The S-35399A03 is a CMOS 2-wire real-time clock IC which operates with the very low current consumption in the wide range of operation voltage. The operation voltage is 1.3 V to 5.5 V so that the S-35399A03 can be used for various power supplies from main supply to backup battery. Due to the 0.34 μA current consumption and wide range of power supply voltage at time keeping, The S-35399A03 makes the battery life longer. In the system which operates with a backup battery, the included free registers can be used as the function for user's backup memory. Users always can take back the information in the registers which is stored before power-off the main power supply, after the voltage is restored. The S-35399A03 has the function to correct advance / delay of the clock data speed, in the wide range, which is caused by the crystal oscillation circuit's frequency deviation. Correcting according to the temperature change by combining this function and a temperature sensor, it is possible to make a high precise clock function which is not affected by the ambient temperature. Moreover, the S-35399A03 has a 24-bit binary up counter. This counter counts up every 60 seconds from power-on so that users are able to grasp the elapsed time from power-on up to 30 years.  Features • • • • • • • • • • • • Low current consumption: 0.34 μA typ. (VDD = 3.0 V, Ta = +25°C) Wide range of operating voltage: 1.3 V to 5.5 V Built-in clock correction function Built-in 24-bit binary up counter Built-in free user register 2-wire (I2C-bus) CPU interface Built-in alarm interrupter Built-in flag generator during detection of low power voltage or at power-on Auto calendar up to the year 2099, automatic leap year calculation function Built-in constant voltage circuit Built-in 32.768 kHz crystal oscillation circuit (built-in Cd, external Cg) Lead-free (Sn 100%), halogen-free  Applications • • • • • • • • Mobile game device Mobile AV device Digital still camera Digital video camera Electronic power meter DVD recorder TV, VCR Mobile phone, PHS  Package • 8-Pin SOP (JEDEC) 1 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Block Diagram XIN XOUT Oscillation circuit Divider, timing generator INT1 controller Alarm expansion INT1 register register 1 Clock correction register Status register 1 Status register 2 INT1 Comparator 1 Day of Day the week Real-time data register Second Minute Hour Free register 1 Month Year Comparator 2 INT2 Free register 2 Alarm INT2 register expansion Free register 3 INT2 controller 24-bit Shift register binary Serial SDA interface SCL up counter VDD Low power supply voltage detector Power-on detection circuit VSS Constantvoltage circuit Figure 1 2 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Product Name Structure 1. Product name S-35399A03 - J8T1 U Environmental code U: Lead-free (Sn 100%), halogen-free Package name (abbreviation) and IC packing specification*1 J8T1: 8-Pin SOP (JEDEC), Tape Product name *1. Refer to the tape drawing. 2. Package Table 1 Package Name 8-Pin SOP (JEDEC) Package Drawing Codes Dimension Tape Reel FJ008-A-P-SD FJ008-D-C-SD FJ008-D-R-S1 3 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Pin Configuration Table 2 1. 8-Pin SOP (JEDEC) Pin No Top view 4 1 INT 1 6 2 3 4 XOUT XIN VSS 5 5 INT2 6 SCL 7 SDA 8 VDD 1 8 2 7 3 4 Figure 2 Symbol S-35399A03-J8T1U Description Output pin for interrupt signal 1 Connection pins for quartz crystal GND pin Output pin for interrupt signal 2 List of Pins I/O Output − − Configuration Nch open-drain output (no protective diode at VDD) − − Nch open-drain output Output (no protective diode at VDD) CMOS input Input pin for serial clock Input (no protective diode at VDD) Nch open-drain output I/O pin for serial data Bi-directional (no protective diode at VDD) CMOS input Pin for positive power − − supply 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Pin Functions 1. SDA (I/O for serial data) pin This pin is a data input / output pin of I2C-bus interface. This pin inputs / outputs data by synchronizing with a clock pulse from the SCL pin. This pin has CMOS input and Nch open-drain output. Generally in use, pull up this pin to the VDD potential via a resistor, and connect it to any other device having open drain or open collector output with wired-OR connection. 2. SCL (input for serial clock) pin This pin is to input a clock pulse for I2C-bus interface. The SDA pin inputs / outputs data by synchronizing with the clock pulse. 3. XIN, XOUT (quartz crystal connect) pins Connect a quartz crystal between XIN and XOUT. 4. INT1 (output for interrupt signal 1) pin This pin outputs a signal of interrupt, or a clock pulse. By using the status register 2, users can select either of; alarm 1 interrupt, output of user-set frequency, per-minute edge interrupt, minute-periodical interrupt 1, minute-periodical interrupt 2, or 32.768 kHz output. This pin has Nch open-drain output. 5. INT2 (output for interrupt signal 2) pin This pin outputs a signal of interrupt, or a clock pulse. By using the status register 2, users can select either of; alarm 2 interrupt, output of user-set frequency, per-minute edge interrupt or minute-periodical interrupt 1. This pin has Nch open-drain output. 6. VDD (positive power supply) pin Connect this VDD pin with a positive power supply. Regarding the values of voltage to be applied, refer to " Recommended Operation Conditions". 7. VSS pin Connect this VSS pin to GND.  Equivalent Circuits of Pins SCL SDA Figure 3 Figure 4 SDA Pin SCL Pin INT1, INT2 Figure 5 INT1 Pin, INT2 Pin 5 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Absolute Maximum Ratings Table 3 Item Symbol Applied Pin Absolute Maximum Rating Unit Power supply voltage VDD − VSS − 0.3 to VSS + 6.5 V Input voltage VIN SCL, SDA VSS − 0.3 to VSS + 6.5 V Output voltage VOUT SDA, INT1, INT2 VSS − 0.3 to VSS + 6.5 V Operating ambient − −40 to +85 °C Topr temperature*1 Storage temperature Tstg − −55 to +125 °C *1. Conditions with no condensation or frost. Condensation or frost causes short-circuiting between pins, resulting in a malfunction. Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions.  Recommended Operation Conditions Table 4 (VSS = 0 V) Unit V Item Symbol Condition Min. Typ. Max. Power supply voltage*1 VDD Ta = −40°C to +85°C 1.3 3.0 5.5 Time keeping power Ta = −40°C to +85°C VDET − 0.15 − 5.5 V VDDT supply voltage*2 Quartz crystal CL value CL − − 6 7 pF *1. The power supply voltage that allows communication under the conditions shown in Table 9 of " AC Electrical Characteristics". *2. The power supply voltage that allows time keeping. For the relationship with VDET (low power supply voltage detection voltage), refer to " Characteristics (Typical Data)".  Oscillation Characteristics Table 5 (Ta = +25°C, VDD = 3.0 V, VSS = 0 V, SSP-T7-FL quartz crystal (CL = 6 pF, 32.768 kHz) manufactured by Seiko Instruments Inc.) Item Symbol Condition Min. Typ. Max. Unit Oscillation start voltage VSTA Within 10 seconds 1.1 − 5.5 V Oscillation start time tSTA − − − 1 s IC-to-IC frequency δIC − −10 − +10 ppm deviation*1 Frequency voltage δV VDD = 1.3 V to 5.5 V −3 − +3 ppm/V deviation External capacitance Cg Applied to XIN pin − − 9.1 pF Internal oscillation Applied to XOUT pin − 8 − pF Cd capacitance *1. Reference value 6 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  DC Electrical Characteristics Table 6 DC Characteristics (VDD = 3.0 V) (Ta = −40 °C to +85°C, VSS = 0 V, SSP-T7-FL quartz crystal (CL = 6 pF, 32.768 kHz, Cg = 9.1 pF) manufactured by Seiko Instruments Inc.) Item Symbol Applied Pin Condition Min. Typ. Max. Unit Current consumption 1 IDD1 − Out of communication − 0.34 0.97 μA Out of communication (when 32.768 kHz is Current consumption 2 IDD2 − − 0.60 1.47 μA output from INT 1 pin) During communication Current consumption 3 IDD3 − − 9 14 μA (SCL = 100 kHz) Input current leakage 1 IIZH SCL, SDA VIN = VDD −0.5 − 0.5 μA Input current leakage 2 IIZL SCL, SDA VIN = VSS −0.5 − 0.5 μA Output current leakage 1 IOZH SDA, INT 1 , INT2 VOUT = VDD −0.5 − 0.5 μA VOUT = VSS −0.5 − 0.5 μA 0.8 × VDD VSS − 0.3 − − VSS + 5.5 0.2 × VDD V V Input voltage 1 Input voltage 2 VIH VIL SDA, INT 1 , INT2 SCL, SDA SCL, SDA Output current 1 IOL1 INT 1 , INT2 VOUT = 0.4 V 3 5 − mA Output current 2 Power supply voltage detection voltage IOL2 SDA VOUT = 0.4 V 5 10 − mA 0.65 1 1.35 V Output current leakage 2 IOZL − − − VDET Table 7 − DC Characteristics (VDD = 5.0 V) (Ta = −40°C to +85°C, VSS = 0 V, SSP-T7-FL quartz crystal (CL = 6 pF, 32.768 kHz, Cg = 9.1 pF) manufactured by Seiko Instruments Inc.) Item Symbol Applied Pin Condition Min. Typ. Max. Unit Current consumption 1 IDD1 − Out of communication − 0.36 1.18 μA Out of communication (when 32.768 kHz is Current consumption 2 IDD2 − − 0.82 2.17 μA output from INT 1 pin) During communication Current consumption 3 IDD3 − − 20 30 μA (SCL = 100 kHz) Input current leakage 1 IIZH SCL, SDA VIN = VDD −0.5 − 0.5 μA Input current leakage 2 IIZL SCL, SDA VIN = VSS −0.5 − 0.5 μA Output current leakage 1 IOZH Output current leakage 2 IOZL SDA, INT1 , INT2 SDA, INT 1 , INT2 SCL, SDA SCL, SDA VOUT = VDD −0.5 − 0.5 μA VOUT = VSS −0.5 − 0.5 μA 0.8 × VDD VSS − 0.3 − − VSS + 5.5 0.2 × VDD V V − − Input voltage 1 Input voltage 2 VIH VIL Output current 1 IOL1 INT1 , INT2 VOUT = 0.4 V 5 8 − mA Output current 2 Power supply voltage detection voltage IOL2 SDA VOUT = 0.4 V 6 13 − mA 0.65 1 1.35 V VDET − − 7 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  AC Electrical Characteristics Table 8 VDD Measurement Conditions Input pulse voltage Input pulse rise / fall time Output determination voltage Output load VIH = 0.8 × VDD, VIL = 0.2 × VDD 20 ns VOH = 0.5 × VDD, VOL = 0.5 × VDD 100 pF + pull-up resistor 1 kΩ R = 1 kΩ SDA C = 100 pF Remark The power supplies of the IC and load have the same electrical potential. Figure 6 Table 9 Output Load Circuit AC Electrical Characteristics (Ta = −40°C to +85°C) 1.3 V 3.0 V Item Symbol Unit Min. Typ. Max. Min. Typ. Max. SCL clock frequency fSCL 0 − 100 0 − 400 kHz SCL clock low time tLOW 4.7 − − 1.3 − − μs SCL clock high time tHIGH 4 − − 0.6 − − μs SDA output delay time*1 tPD − − 3.5 − − 0.9 μs Start condition setup time tSU.STA 4.7 − − 0.6 − − μs Start condition hold time tHD.STA 4 − − 0.6 − − μs Data input setup time tSU.DAT 250 − − 100 − − ns Data input hold time tHD.DAT 0 − − 0 − − μs Stop condition setup time tSU.STO 4.7 − − 0.6 − − μs SCL, SDA rise time tR − − 1 − − 0.3 μs SCL, SDA fall time tF − − 0.3 − − 0.3 μs Bus release time tBUF 4.7 − − 1.3 − − μs Noise suppression time tI − − 100 − − 50 ns *1. Since the output format of the SDA pin is Nch open-drain output, SDA output delay time is determined by the values of the load resistance (RL) and load capacity (CL) outside the IC. Therefore, use this value only as a reference value. *2. Regarding the power supply voltage, refer to " Recommended Operation Conditions". VDD*2 ≥ tF tHIGH VDD*2 ≥ tR tLOW SCL tSU.STA tHD.DAT tHD.STA tSU.DAT tSU.STO SDA (S-35399A03 input) SDA (S-35399A03 output) tBUF tPD Figure 7 8 Bus Timing 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Configuration of Data Communication 1. Data Communication For data communication, the master device in the system generates a start condition for the S-35399A03. Next, the master device transmits 4-bit device code "0110" or "0111", and 3-bit command and 1-bit read / write command to the SDA line. After that, output or input is performed from B7 of data. If data I/O has been completed, finish communication by inputting a stop condition to the S-35399A03. The master device generates an acknowledgment signal for every 1-byte. Regarding details, refer to " Serial Interface". Device code "0110" is compatible with the ABLIC Inc. S-35390A/392A as software. Regarding details, refer to "2. Configuration of command". Read / write bit Acknowledgment bit Start condition Device code 0 STA 1 Command 1 0/1 C2 C1 C0 R/W ACK Stop condition 1-byte data B7 B6 B5 B4 B3 Figure 8 B2 B1 B0 ACK STP Data Communication 9 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 2. Configuration of command 13 types of command are available for the S-35399A03. The S-35399A03 reads / writes the various registers by inputting these codes and commands. The S-35399A03 does not perform any operation with any codes and commands other than those below. Table 10 List of Commands Command Data Code C2 C1 C0 Description B7 B6 B5 B4 B3 B2 B1 B0 0 0 0 Status register 1 access 0 0 1 Status register 2 access 0 0 1 1 1 1 1 0 0 32kE 0 Real-time data 1 access (year data to) 1 Real-time data 2 access (hour data to) H1 m1 s1 H2 m2 s2 H4 m4 s4 H8 m8 s8 H10 m10 s10 H20 m20 s20 AM / PM m40 s40 W1 H1 m1 W2 H2 m2 W4 H4 m4 −*6 H8 m8 −*6 H10 m10 −*6 H20 m20 −*6 1 Hz 2 Hz 4 Hz 8 Hz 16 Hz SC2*2 SC3*2 W1 H1 m1 W2 H2 m2 W4 H4 m4 −*6 H8 m8 −*6 H10 m10 −*6 H20 m20 −*6 1 Hz 2 Hz 4 Hz 8 Hz 16 Hz SC5*2 0 1 0 1 INT1 register access (alarm time 1: week / hour / minute) (INT1AE = 1, INT1ME = 0, INT1FE = 0) INT1 register access (output of user-set frequency) (INT1ME = 0, INT1FE = 1) INT2 register access (alarm time 2: week / hour / minute) (INT2AE = 1, INT2ME = 0, INT2FE = 0) INT2 register access (output of user-set frequency) (INT2ME = 0, INT2FE = 1) Clock correction register access Free register 1 access Y2 M2 D2 W2 H2 m2 s2 Y4 M4 D4 W4 H4 m4 s4 Y8 M8 D8 −*6 H8 m8 s8 INT1*3 INT2*3 BLD*4 POC*4 INT2FE INT2ME INT2AE TEST*5 Y40 Y10 Y20 Y80 *6 −*6 − −*6 M10 *6 − −*6 D10 D20 *6 *6 *6 − − − −*6 −*6 H10 H20 AM / PM −*6 m10 m20 m40 −*6 s10 s20 s40 −*6 −*6 −*6 A1WE AM / PM A1HE A1mE m40 SC4*2 A2WE AM / PM A2HE A2mE m40 SC6*2 SC7*2 V0 V1 V2 V3 V4 V5 V6 V7 F10 F11 F12 F13 F14 F15 F16 F17 C64k C128k C256k C512k C1M C2M C4M C8M *7 C256 C512 C1k C2k C4k C8k C16k C32k 0 0 0 Up counter access C1 C2 C4 C8 C16 C32 C64 C128 F20 F21 F22 F23 F24 F25 F26 F27 0 0 1 Free register 2 access F30 F31 F32 F33 F34 F35 F36 F37 0 1 0 Free register 3 access 0111 Y80 Y40 Y1 Y2 Y4 Y8 Y10 Y20 Alarm expansion register 1 access −*6 A1YE A1ME 1 0 0 M1 M2 M4 M8 M10 (alarm time 1: year / month / day) −*6 A1DE D20 D1 D2 D4 D8 D10 Y80 Y40 Y1 Y2 Y4 Y8 Y10 Y20 Alarm expansion register 2 access −*6 A2YE A2ME 1 0 1 M1 M2 M4 M8 M10 (alarm time 2: year / month / day) −*6 A2DE D20 D1 D2 D4 D8 D10 *1. Write-only flag. The S-35399A03 initializes by writing "1" in this register. *2. Scratch bit. This is a register which is available for read / write operations and can be used by users freely. *3. Read-only flag. Valid only when using the alarm function. When the alarm time matches, this flag is set to "1", and it is cleared to "0" when reading. *4. Read-only flag. "POC" is set to "1" when power is applied. It is cleared to "0" when reading. Regarding "BLD", refer to " Low Power Supply Voltage Detection Circuit". *5. Test bit for ABLIC Inc. Be sure to set to "0" in use. *6. No effect when writing. It is "0" when reading. *7. The up counter is a read-only register. 10 1 1 SC1*2 Y1 M1 D1 W1 H1 m1 s1 0110 1 RESET*1 12 / 24 SC0*2 INT1FE INT1ME INT1AE 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Configuration of Registers 1. Real-time data register The real-time data register is a 7-byte register that stores the data of year, month, day, day of the week, hour, minute, and second in the BCD code. To write / read real-time data 1 access, transmit / receive the data of year in B7, month, day, day of the week, hour, minute, second in B0, in 7-byte. When you skip the procedure to access the data of year, month, day, day of the week, read / write real-time data 2 access. In this case, transmit / receive the data of hour in B7, minute, second in B0, in 3-byte. The S-35399A03 transfers a set of data of time to the real-time data register when it recognizes a reading instruction. Therefore, the S-35399A03 keeps precise time even if time-carry occurs during the reading operation of the real-time data register. Year data (00 to 99) Start bit of real-time data 1 data access Y1 Y2 Y4 Y8 Y10 Y20 Y40 B7 Y80 B0 Month data (01 to 12) M1 M2 M4 M8 M10 0 0 B7 0 B0 Day data (01 to 31) D1 D2 D4 D8 D10 D20 0 B7 0 B0 Day of week data (00 to 06) W1 W2 W4 0 0 0 0 B7 0 B0 Hour data (00 to 23 or 00 to 11) Start bit of real-time data 2 data access H1 H2 H4 H8 H10 H20 AM / PM B7 0 B0 Minute data (00 to 59) m1 m2 m4 m8 m10 m20 m40 B7 0 B0 Second data (00 to 59) s1 s2 s4 s8 s10 s20 s40 B7 0 B0 Figure 9 Real-Time Data Register 11 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 Year data (00 to 99): Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80 Sets the lower two digits in the Western calendar year (00 to 99) and links together with the auto calendar function until 2099. Example: 2053 (Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80) = (1, 1, 0, 0, 1, 0, 1, 0) Month data (01 to 12): M1, M2, M4, M8, M10 Example: December (M1, M2, M4, M8, M10, 0, 0, 0) = (0, 1, 0, 0, 1, 0 ,0 ,0) Day data (01 to 31): D1, D2, D4, D8, D10, D20 The count value is automatically changed by the auto calendar function. 1 to 31: Jan., Mar., May, July, Aug., Oct., Dec., 1 to 30: April, June, Sep., Nov. 1 to 29: Feb. (leap year), 1 to 28: Feb. (non-leap year) Example: 29 (D1, D2, D4, D8, D10, D20, 0, 0) = (1, 0, 0, 1, 0, 1, 0, 0) Day of the week data (00 to 06): W1, W2, W4 A septenary up counter. Day of the week is counted in the order of 00, 01, 02, …, 06, and 00. Set up day of the week and the count value. Hour data (00 to 23 or 00 to 11): H1, H2, H4, H8, H10, H20, AM / PM In 12-hour mode, write 0; AM, 1; PM in the AM / PM bit. In 24-hour mode, users can write either 0 or 1. 0 is read when the hour data is from 00 to 11, and 1 is read when from 12 to 23. Example (12-hour mode): 11 p.m. (H1, H2, H4, H8, H10, H20, AM / PM , 0) = (1, 0, 0, 0, 1, 0, 1, 0) Example (24-hour mode): 22 (H1, H2, H4, H8, H10, H20, AM / PM , 0) = (0, 1, 0, 0, 0, 1, 1, 0) Minute data (00 to 59): m1, m2, m4, m8, m10, m20, m40 Example: 32 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (0, 1, 0, 0, 1, 1, 0, 0) Example: 55 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (1, 0, 1, 0, 1, 0, 1, 0) Second data (00 to 59): s1, s2, s4, s8, s10, s20, s40 Example: 19 seconds (s1, s2, s4, s8, s10, s20, s40, 0) = (1, 0, 0, 1, 1, 0, 0, 0) 12 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 2. Status register 1 Status register 1 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below. B7 B6 B5 B4 B3 B2 B1 B0 RESET 12 / 24 SC0 SC1 INT1 INT2 BLD POC W R/W R/W R/W R R R R R: W: R / W: Figure 10 Read Write Read / write Status Register 1 B0: POC This flag is used to confirm whether the power is on. The power-on detection circuit operates at power-on and B0 is set to "1". This flag is read-only. Once it is read, it is automatically set to "0". When this flag is "1", be sure to initialize. Regarding the operation after power-on, refer to " Power-on Detection Circuit and Register Status". B1: BLD This flag is set to "1" when the power supply voltage decreases to the level of detection voltage (VDET) or less. Users can detect a drop in the power supply voltage. Once this flag is set to "1", it is not set to "0" again even if the power supply increases to the level of detection voltage (VDET) or more. This flag is read-only. When this flag is "1", be sure to initialize. Regarding the operation of the power supply voltage detection circuit, refer to " Low Power Supply Voltage Detection Circuit". B2, B3: INT2, INT1 This flag indicates the time set by alarm and when the time has reached it. This flag is set to "1" when the time that users set by using the alarm interrupt function has come. The INT1 flag at alarm 1 interrupt mode and the INT2 flag at alarm 2 interrupt mode are set to "1". Set "0" in INT1AE (B5 in the status register 2) or in INT2AE (B1 in the status register 2) after reading "1" in the INT1 flag or in the INT2 flag. This flag is read-only. Once this flag is read, it is set to "0" automatically. B4, B5: SC1, SC0 These flags configure a 2-bit SRAM type register that can be freely set by users. B6: 12 / 24 This flag is used to set 12-hour or 24-hour mode. Set the flag ahead of write operation of the real-time data register in case of 24-hour mode. 0: 12-hour mode 1: 24-hour mode B7: RESET The internal IC is initialized by setting this bit to "1". This bit is Write-only. It is always "0" when reading. When applying the power supply voltage to the IC, be sure to write "1" to this bit to initialize the circuit. Regarding each status of registers after initialization, refer to " Register Status After Initialization". 13 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 3. Status register 2 Status register 2 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below. B7 B6 B5 B4 B3 B2 B1 B0 INT1FE INT1ME INT1AE 32kE INT2FE INT2ME INT2AE TEST R/W R/W R/W R/W R/W R/W R/W R/W R / W: Read / write Figure 11 Status Register 2 B0: TEST This is a test flag for ABLIC Inc. Be sure to set this flag to "0" in use. If this flag is set to "1", be sure to initialize to set "0". B1: INT2AE, B2: INT2ME, B3: INT2FE These bits are used to select the output mode for the INT2 pin. Table 11 shows how to select the mode. To use an alarm 2 interrupt, set alarm interrupt mode, then access the INT2 register and the alarm expansion register 2. Table 11 INT2AE *1. INT2ME Output Modes for INT2 Pin INT2FE 0 0 0 *1 − 0 1 −*1 1 0 −*1 1 1 1 0 0 Don't care (both of 0 and 1 are acceptable). INT2 Pin Output Mode No interrupt Output of user-set frequency Per-minute edge interrupt Minute-periodical interrupt 1 (50% duty) Alarm 2 interrupt B4: 32kE, B5: INT1AE, B6: INT1ME, B7: INT1FE These bits are used to select the output mode for the INT 1 pin. Table 12 shows how to select the mode. To use an alarm 1 interrupt, set alarm interrupt mode, then access the INT1 register and the alarm expansion register 1. Table 12 32kE *1. 14 INT1AE Output Modes for INT1 Pin INT1ME 0 0 0 −*1 0 0 −*1 0 1 0 0 1 0 1 0 0 1 1 −*1 −*1 1 Don't care (both of 0 and 1 are acceptable). INT1FE 0 1 0 1 0 1 −*1 INT 1 Pin Output Mode No interrupt Output of user-set frequency Per-minute edge interrupt Minute-periodical interrupt 1 (50% duty) Alarm 1 interrupt Minute-periodical interrupt 2 32.768 kHz output 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 4. INT1 register and INT2 register The INT1 and INT2 registers are to set up the output of user-set frequency, or to set up alarm interrupt. Users are able to switch the output mode by using the status register 2. If selecting to use the output mode for alarm interrupt by status register 2; this register works as the alarm-time data register. If selecting the output of user-set frequency by status register 2; this register works as the data register to set the frequency for clock output. From each INT1 and INT2 pin, a clock pulse and alarm interrupt are output. 4. 1 Alarm interrupt Users can set the alarm time (the data of day of the week, hour, minute) by using the INT1 and INT2 registers which are 3-byte data registers. The configuration of register is as well as the data register of day of the week, hour, minute, in the real-time data register; is expressed by the BCD code. Do not set a nonexistent day. Users are necessary to set up the alarm-time data according to the 12 / 24 hour mode that they set by using the status register 1. INT2 register INT1 register W1 W2 W4 0 0 0 0 A1WE W1 B0 B7 B7 H1 H2 H4 H8 / A1HE H10 H20 AM PM B7 m1 B0 m2 m4 m8 H1 m1 B0 B7 Figure 12 W4 0 0 0 A2WE B0 H2 H4 H8 B7 m10 m20 m40 A1mE B7 W2 / H10 H20 AM PM A2HE B0 m2 m4 m8 m10 m20 m40 A2mE B0 INT1 Register and INT2 Register (Alarm Time-Data) The INT1 register has A1WE, A1HE, A1mE at B0 in each byte. It is possible to make data valid; the data of day of the week, hour, minute which are in the corresponding byte; by setting these bits to "1". This is as well in A2WE, A2HE, A2mE in the INT2 register. Regarding set-up of year, month, day, refer to "8. Alarm expansion register 1 and alarm expansion register 2". Setting example: alarm time "7:00 pm" in the INT1 register (1) 12-hour mode (status register 1 B6 = 0) Set up 7:00 PM Data written to INT1 register −*1 −*1 −*1 −*1 −*1 Day of week Hour 1 1 1 0 0 Minute 0 0 0 0 0 B7 *1. Don't care (both of 0 and 1 are acceptable). −*1 0 0 −*1 1 0 0 1 1 B0 −*1 0 0 −*1 1*2 0 0 1 1 B0 (2) 24-hour mode (status register 1 B6 = 1) Set up 19:00 PM Data written to INT1 register −*1 −*1 −*1 −*1 −*1 Day of week Hour 1 0 0 1 1 Minute 0 0 0 0 0 B7 *1. Don't care (both of 0 and 1 are acceptable). *2. Set up the AM / PM flag along with the time setting. 15 2-WIRE REAL-TIME CLOCK S-35399A03 4. 2 Rev.3.2_00 Output of user-set frequency The INT1 and INT2 registers are 1-byte data registers to set up the output frequency. Setting each bit B7 to B3 in the register to "1", the frequency which corresponds to the bit is output in the AND-form. SC2 to SC4 in the INT1 register, and SC5 to SC7 in the INT2 register are 3-bit SRAM type registers that can be freely set by users. B7 B6 B5 B4 B3 B2 B1 B0 1 Hz 2 Hz 4 Hz 8 Hz 16 Hz SC2 SC3 SC4 R/W R/W R/W R/W R/W R/W R/W R/W R / W: Read / write Figure 13 INT1 Register (Data Register for Output Frequency) B7 B6 B5 B4 B3 B2 B1 B0 1 Hz 2 Hz 4 Hz 8 Hz 16 Hz SC5 SC6 SC7 R/W R/W R/W R/W R/W R/W R/W R/W R / W: Read / write Figure 14 INT2 Register (Data Register for Output Frequency) Example: B7 to B3 = 50h 16 Hz 8 Hz 4 Hz 2 Hz 1 Hz INT1 pin / INT2 pin output Status register 2 • Set to INT1FE or INT2FE = 1 Figure 15 16 Example of Output from INT1 Register (Data Register for Output Frequency) 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 1 Hz clock output is synchronized with second-counter of the S-35399A03. INT1 pin / INT2 pin output (1 Hz) Second-counter n+2 n+1 n Figure 16 1 Hz Clock Output and Second-counter 5. Clock correction register The clock correction register is a 1-byte register that is used to correct advance / delay of the clock. When not using this function, set this register to "00h". Regarding the register values, refer to " Function of Clock Correction". B7 B6 B5 B4 B3 B2 B1 B0 V0 V1 V2 V3 V4 V5 V6 V7 R/W R/W R/W R/W R/W R/W R/W R/W R / W: Read / write Figure 17 Clock Correction Register 6. Free registers 1 to 3 These free registers are 1-byte SRAM type registers that can be set freely by users. B7 B6 B5 B4 B3 B2 B1 B0 Fx0 Fx1 Fx2 Fx3 Fx4 Fx5 Fx6 Fx7 R/W R/W R/W R/W R/W R/W R/W R/W R / W: Read / write x: 1 to 3 Figure 18 Free Register 17 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 7. Up counter The up counter is a 24-bit read-only register. It starts binary counting from "000000 h" from power-on and continues counting as long as power is being applied. It continues counting when initialization, instead of returning to "000000 h". At power-on, registers are cleared by the power-on detection circuit so that the up counter is cleared to "000000 h". If the power-on detection circuit does not operate successfully, the counter may start from the indefinite status. For successful operation of the power-on detection circuit, refer to " Power-on Detection Circuit and Register Status". Regarding the operation timing of the up counter, refer to " Up-Count Operation". C64k C128k C256k C512k C1M C2M C4M B7 B0 C256 C512 C1k C2k C4k C8k C16k C32k B7 C1 B0 C2 C4 C8 C16 C32 B7 C128 Up Counter Example of Count Value and Reading Data in Register Count Value 000001 h 000002 h • • • EFFFFF h • • • FFFFFF h 18 C64 B0 Figure 19 Table 13 C8M Reading Data in Register 000080 h 000040 h • • • F7FFFF h • • • FFFFFF h 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 8. Alarm expansion register 1 and alarm expansion register 2 The alarm expansion register 1 and 2 are 3-byte registers. They are expansion registers for the INT1 and INT2 registers which output alarm interrupt. Users are able to set the alarm time; the data of year, month, day. The configuration of register is expressed by BCD code as well as the data register of year, month, day in the real-time register. Alarm expansion register 1 Y1 Y2 Y4 Alarm expansion register 2 B7 M1 B0 M2 M4 M8 M10 0 D4 D8 D10 D20 B7 0 Y8 Y10 Y20 Y40 Y80 M2 M4 M8 M10 0 A2YE A2ME B7 A1DE B0 D1 B0 Figure 20 Y4 B0 M1 B0 D2 Y2 B7 A1YE A1ME B7 D1 Y1 Y8 Y10 Y20 Y40 Y80 D2 D4 D8 D10 D20 B7 0 A2DE B0 Alarm Expansion Register 1 and Alarm Expansion Register 2 To make the year data of alarm expansion register 1 valid, set A1YE to "1". For the month data, set A1ME to "1", for the day data, set A1DE to "1". Set as well A2ME, A2YE, A2DE in the alarm expansion register 2. Regarding how to set the data of day of the week, hour, and minute, refer to "4. 1 Alarm interrupt" in "4. INT1 register and INT2 register". Setting example: Setting alarm time "January 31, 2015" in the alarm expansion register 1 Writing to alarm expansion register 1 Year 1 0 1 0 1 Month 1 0 0 0 0 Day 1 0 0 0 1 B7 *1. Don't care (both of 0 and 1 are acceptable.) 0 *1 − 1 0 1 −*1 0 1 1 B0 19 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Power-on Detection Circuit and Register Status The power-on detection circuit operates by power-on the S-35399A03, as a result each register is cleared; each register is set as follows. Real-time data register: Status register 1: Status register 2: INT1 register: INT2 register: Clock correction register: Free register 1: Free register 2: Free register 3: Up counter: Alarm expansion register 1: Alarm expansion register 2: 00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S) "01h" "80h" "80h" "00h" "00h" "00h" "00h" "00h" "00 00 00h" "00h" "00h" "1" is set in the POC flag (B0 in the status register 1) to indicate that power has been applied. To correct the oscillation frequency, the status register 2 goes in the mode the output of user-set frequency, so that 1 Hz clock pulse is output from the INT1 pin. When "1" is set in the POC flag, be sure to initialize. The POC flag is set to "0" due to initialization so that the output of user-set frequency mode is cleared (Refer to " Register Status After Initialization"). For the regular operation of power-on detection circuit, as seen in Figure 21, the period to power-up the S-35399A03 is that the voltage reaches 1.3 V within 10 ms after setting the IC's power supply voltage at 0 V. When the power-on detection circuit is not working normally is; the POC flag (B0 in the status register 1) is not in "1", or 1 Hz is not output from the INT1 pin. In this case, power-on the S-35399A03 once again because the internal data may be in the indefinite status. Moreover, regarding the processing right after power-on, refer to " Flowchart of Initialization and Example of Real-time Data Set-up". Within 10 ms 1.3 V 0V *1 *1. 0 V indicates that there are no potential differences between the VDD pin and VSS pin of the S-35399A03. Figure 21 20 How to Raise the Power Supply Voltage 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Register Status After Initialization The status of each register after initialization is as follows. Real-time data register: Status register 1: 00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S) "0 B6 B5 B4 0 0 0 0 b" (In B6, B5, B4, the data of B6, B5, B4 in the status register 1 at initialization is set. Refer to Figure 22.) "00h" "00h" "00h" "00h" "00h" "00h" "00h" Is not initialized and continues counting. "00h" "00h" Status register 2: INT1 register: INT2 register: Clock correction register: Free register 1: Free register 2: Free register 3: Up counter: Alarm expansion register 1: Alarm expansion register 2: Read from status register 1 Write to status register 1 1 18 9 1 18 9 SCL R/W R/W L L H LL L L L 0 STOP 0 110000 1 NO_ACK ACK 0 START 10100000 STOP Code + command ACK 0 1 1 0 0 000 ACK START SDA Code + command B7 B5: Not reset B7 B5 Write "1" to reset flag and SC0. : S-35399A03 output data : Master device input data Figure 22 Data of Status Register 1 at Initialization 21 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Low Power Supply Voltage Detection Circuit The S-35399A03 has a low power supply voltage detection circuit, so that users can monitor drops in the power supply voltage by reading the BLD flag (B1 in the status register 1). There is a hysteresis width of approx. 0.15 V typ. between detection voltage and release voltage (refer to " Characteristics (Typical Data)"). The low power supply voltage detection circuit does the sampling operation only once in one sec for 15.6 ms. If the power supply voltage decreases to the level of detection voltage (VDET) or less, "1" is set to the BLD flag so that sampling operation stops. Once "1" is detected in the BLD flag, no sampling operation is performed even if the power supply voltage increases to the level of release voltage or more, and "1" is held in the BLD flag. Furthermore, the S-35399A03 does not initialize the internal circuit even if "1" is set to the BLD flag. If the BLD flag is "1" even after the power supply voltage is recovered, the internal circuit may be in the indefinite status. In this case, be sure to initialize the circuit. Without initializing, if the next BLD flag reading is done after sampling, the BLD flag gets reset to "0". In this case, be sure to initialize although the BLD flag is in "0" because the internal circuit may be in the indefinite status. VDD Hysteresis width Release 0.15 V approximately Detection voltage voltage Time keeping power supply voltage (min.) BLD flag reading Sampling pulse 15.6 ms 1s 1s Stop Stop Stop BLD flag Figure 23 Timing of Low Power Supply Voltage Detection Circuit  Circuits Power-on and Low Power Supply Voltage Detection Figure 24 shows the changes of the POC flag and BLD flag due to VDD fluctuation. Low power supply voltage detection voltage VDD POC flag BLD flag Status register 1 reading Figure 24 22 POC Flag and BLD Flag Low power supply voltage detection voltage VSS 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Correction of Nonexistent Data and End-of-Month When users write the real-time data, the S-35399A03 checks it. In case that the data is invalid, the S-35399A03 does the following procedures. 1. Processing of nonexistent data Table 14 Register Year data Month data Day data Day of week data 24-hour Hour data*1 12-hour Minute data Second data*2 Normal Data 00 to 99 01 to 12 01 to 31 0 to 6 0 to 23 0 to 11 00 to 59 00 to 59 Processing of Nonexistent Data Nonexistent Data XA to XF, AX to FX 00, 13 to 19, XA to XF 00, 32 to 39, XA to XF 7 24 to 29, 3X, XA to XF 12 to 20, XA to XF 60 to 79, XA to XF 60 to 79, XA to XF Result 00 01 01 0 00 00 00 00 *1. In 12-hour mode, write the AM / PM flag (B1 in hour data in the real-time data register). In 24-hour mode, the AM / PM flag in the real-time data register is omitted. However in the flag of reading, users are able to read 0; 0 to 11, 1; 12 to 23. *2. Processing of nonexistent data, regarding second data, is done by a carry pulse which is generated in 1 second, after writing. At this point the carry pulse is sent to the minute-counter. 2. Correction of end-of-month A nonexistent day, such as February 30 and April 31, is set to the first day of the next month. 23 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  INT1 , INT2 Pin Output Modes These are selectable for the output mode for INT1 and INT2 pins; Alarm interrupt, the output of user-set frequency, per-minute edge interrupt output, minute-periodical interrupt output 1. In the INT1 pin output mode, in addition to the above modes, minute-periodical interrupt output 2 and 32.768 kHz output are also selectable. To swith the output mode, use the status register 2. Refer to "3. status register 2" in " Configuration of Registers". When switching the output mode, be careful of the output status of the pin. Especially, when using alarm interrupt / output of frequency, switch the output mode after setting "00h" in the INT1 / INT2 register. In 32.768 kHz output / per-minute edge interrupt output / minute-periodical interrupt output, it is unnecessary to set data in the INT1 / INT2 register for users. Refer to the followings regarding each operation of output modes. 1. Alarm interrupt output Alarm interrupt output is the function to output "L" from the INT1 / INT2 pin, at the alarm time which is set by user has come. If setting the pin output to "H", turn off the alarm function by setting "0" in INT1AE / INT2AE in the status register 2. To set the alarm time, set the data of day of the week, hour, minute in the INT1 / INT2 register, set the data of year, month, day in the alarm expansion register 1 or 2. Refer to "4. INT1 register and INT2 register" and "8. Alarm expansion register 1 and alarm expansion register 2" in " Configuration of Registers". 1. 1 Alarm setting of "Y (year), M (month), D (day), W (day of the week), H (hour), m (minute)" Status register 2 setting • INT1 pin output mode 32kE = 0, INT1ME = INT1FE = 0 • INT2 pin output mode INT2ME = INT2FE = 0 INT1 register INT2 register mx Hx INTx register alarm enable flag • AxHE = AxmE = AxWE = "1" Alarm expansion register x alarm enable flag • AxYE = AxME = AxDE = "1" Alarm expansion register 1 Alarm expansion register 2 Wx Dx Mx Yx Comparator Second Minute Hour Week Day Alarm interrupt Month Year Real-time data Y (year), M (month), D (day), W (day of the week) Real-time data H h 00m 00 s H h (m − 1) m 59 s Change by program 59 s 01 s Change by program H h (m + 1) m 00 s Change by program INT1AE / INT2AE *1 Alarm time matches OFF INT1 pin / INT2 pin Period when alarm time matches *1. If users clear INT1AE / INT2AE once; "L" is not output from the INT1 / INT 2 pin by setting INT1AE / INT2AE enable again, within a period when the alarm time matches real-time data. Figure 25 24 Alarm Interrupt Output Timing 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 1. 2 Alarm setting of "H (hour)" INTx register alarm enable flag • AxHE = AxmE = AxWE = "1" Alarm expansion register x alarm enable flag • AxYE = AxME = AxDE = "1" Status register 2 setting • INT1 pin output mode 32kE = 0, INT1ME = INT1FE = 0 • INT2 pin output mode INT2ME = INT2FE = 0 INT1 register INT2 register mx Hx Alarm expansion register 1 Alarm expansion register 2 Wx Dx Mx Yx Alarm interrupt Comparator Second Minute Hour Week Day Month Year Real-time data Real-time data H h 00 m 00 s (H − 1) h 59 m 59 s Change by program 01 s Change by program 59 s H h 01 m 00 s H h 59 m 59 s (H + 1) h 00 m 00 s Change by program Change by program INT1AE / INT2AE *1 Alarm time matches OFF INT1 pin / INT2 pin *1 Alarm time matches*2 OFF Period when alarm time matches *1. If users clear INT1AE / INT2AE once; "L" is not output from the INT1 / INT 2 pin by setting INT1AE / INT2AE enable again, within a period when the alarm time matches real-time data. *2. If turning the alarm output on by changing the program, within the period when the alarm time matches real-time data, "L" is output again from the INT1 / INT 2 pin when the minute is counted up. Figure 26 Alarm Interrupt Output Timing 2. Output of user-set frequency The output of user-set frequency is the function to output the frequency which is selected by using data, from the INT1 / INT 2 pin, in the AND-form. Set up the data of frequency in the INT1 / INT2 register. Refer to "4. INT1 register and INT2 register" in " Configuration of Registers". Status register 2 setting • INT1 pin output mode 32kE = 0, INT1AE = Don’t care (0 or 1), INT1ME = 0 • INT2 pin output mode INT2AE = Don’t care (0 or 1), INT2ME = 0 Change by program INT1FE / INT2FE Free-run output starts OFF INT1 pin / INT2 pin Figure 27 Output Timing of User-set Frequency 25 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 3. Per-minute edge interrupt output Per-minute edge interrupt output is the function to output "L" from the INT 1 / INT2 pin, when the first minute-carry processing is done, after selecting the output mode. To set the pin output to "H", turn off the output mode of per-minute edge interrupt. In the INT 1 pin output mode, input "0" in INT1ME in the status register 2. In the INT2 pin output mode, input "0" in INT2ME. Status register 2 setting • INT1 pin output mode 32kE = 0, INT1AE = Don’t care (0 or 1), INT1FE = 0 • INT2 pin output mode INT2AE = Don’t care (0 or 1), INT2FE = 0 Change by program INT1ME / INT2ME Minute-carry processing Minute-carry processing OFF INT1 pin / INT2 pin "L" is output again if this period is within 7.81 ms*1. *1. Pin output is set to "H" by disabling the output mode within 7.81 ms, because the signal of this procedure is maintained for 7.81 ms. Note that pin output is set to "L" by setting enable the output mode again. Figure 28 Timing of Per-Minute Edge Interrupt Output 4. Minute-periodical interrupt output 1 The minute-periodical interrupt 1 is the function to output the one-minute clock pulse (Duty 50%) from the INT 1 / INT2 pin, when the first minute-carry processing is done, after selecting the output mode. Status register 2 setting INT1 pin output mode 32kE = 0, INT1AE = 0 INT2 pin output mode INT2AE = 0 Change by program (OFF) INT1ME, INT1FE INT2ME, INT2FE Minute-carry processing Minute-carry processing Minute-carry processing Minute-carry processing Minute-carry processing INT1 pin / INT2 pin 30 s 30 s 30 s 30 s 30 s 30 s 30 s 30 s 30 s "L" is output again if this period is within 7.81 ms*1. "H" is output again if this period is 7.81 ms or longer. "L" is output at the next minute-carry processing. *1. Setting the output mode disable makes the pin output "H", while the output from the INT 1 / INT2 pin is in "L". Note that pin output is set to "L" by setting the output mode enable again. Figure 29 26 Timing of Minute-periodical Interrupt Output 1 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 5. Minute-periodical interrupt output 2 (only in the INT1 pin output mode) The output of minute-periodical interrupt 2 is the function to output "L", for 7.81 ms, from the INT 1 pin, synchronizing with the first minute-carry processing after selecting the output mode. However, during reading in the real-time data register, the procedure delays at 0.5 seconds max. thus output "L" from the INT 1 pin also delays at 0.5 seconds max. During writing in the real-time data register, some delay is made in the output period due to write timing and the second-data of writing. (1) During normal operation Minute-carry processing Minute-carry processing Minute-carry processing INT1 pin 7.81 ms (2) 7.81 ms 60 s 7.81 ms 60 s During reading operation in the real-time data register (Normal minutecarry processing) Minute-carry processing Minute-carry processing Minute-carry processing INT1 pin 0.5 s max. 7.81 ms 7.81 ms 60 s 60 s 7.81 ms Serial communication Real-time data read command (3) Real-time Real-time data Real-time data reading read command data reading During writing operation in the real-time data register Minute-carry processing Minute-carry processing Minute-carry processing INT1 pin 7.81 ms 7.81 ms 55 s 45 s 10 s 7.81 ms 80 s 30 s 50 s Real-time data write timing Second data of writing: "50" s The output period is shorter. Figure 30 Second data of writing: "10" s The output period is longer. Timing of Minute-periodical Interrupt Output 2 27 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 6. Operation of power-on detection circuit (only in the INT1 pin output mode) When power is applied to the S-35399A03, the power-on detection operates to set "1" in the POC flag (B0 in the status register 1). A 1 Hz clock pulse is output from the INT 1 pin. Status register 2 setting Change by reset command • 32kE = 0, INT1AE = INT1ME = 0 INT1FE OFF INT1 pin 0.5 s Figure 31 0.5 s Output Timing of INT 1 Pin during Operation of Power-on Detection Circuit  Function of Clock Correction The function of clock correction is to correct advance / delay of the clock due to the deviation of oscillation frequency, in order to make a high precise clock. For correction, the S-35399A03 adjusts the clock pulse by using a certain part of the dividing circuit, not adjusting the frequency of the quartz crystal. Correction is performed once every 20 seconds (or 60 seconds). The minimum resolution is approx. 3 ppm (or approx. 1 ppm) and the S-35399A03 corrects in the range of −195.3 ppm to +192.2 ppm (or of −65.1 ppm to +64.1 ppm). (Refer to Table 15.) Users can set up this function by using the clock correction register. Regarding how to calculate the setting data, refer to "1. How to calculate". When not using this function, be sure to set "00h". Table 15 Item Adjustment Minimum resolution Correction range 28 Function of Clock Correction B0 = 0 Every 20 seconds 3.052 ppm −195.3 ppm to +192.2 ppm B0 = 1 Every 60 seconds 1.017 ppm −65.1 ppm to +64.1 ppm 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 1. How to calculate 1. 1 If current oscillation frequency > target frequency (in case the clock is fast) *1 Correction value = 128 − Integral value Caution (Current oscillation frequency *3 *2 actual measurement value ) − (Target oscillation frequency ) (Current oscillation frequency *2 actual measurement value ) × *4 (Minimum resolution ) The figure range which can be corrected is that the calculated value is from 0 to 64. *1. Convert this value to be set in the clock correction register. For how to convert, refer to "(1) Calculation example 1". *2. Measurement value when 1 Hz clock pulse is output from the INT1 / INT2 pin. *3. Target value of average frequency when the clock correction function is used. *4. Refer to "Table 15 Function of Clock Correction". (1) Calculation example 1 In case of current oscillation frequency actual measurement value = 1.000070 [Hz], target oscillation frequency = 1.000000 [Hz], B0 = 0 (Minimum resolution = 3.052 ppm) (1.000070) − (1.000000)  Correction value = 128 − Integral value   (1.000070) × (3.052 × 10−6)  = 128 − Integral value (22.93) = 128 − 22 = 106 Convert the correction value "106" to 7-bit binary and obtain "1101010b". Reverse the correction value "1101010b" and set it to B7 to B1 of the clock correction register. Thus, set the clock correction register: (B7, B6, B5, B4, B3, B2, B1, B0) = (0, 1, 0, 1, 0, 1, 1, 0) 1. 2 If current oscillation frequency < target frequency (in case the clock is slow) (Target oscillation frequency) − Correction value = Integral value Caution (Current oscillation frequency actual measurement value) (Current oscillation frequency × actual measurement value) +1 (Minimum resolution) The figure range which can be corrected is that the calculated value is from 0 to 62. (1) Calculation example 2 In case of current oscillation frequency actual measurement value = 0.999920 [Hz], target oscillation frequency = 1.000000 [Hz]. B0 = 0 (Minimum resolution = 3.052 ppm) (1.000000) − (0.999920)  +1 Correction value = Integral value   (0.999920) × (3.052 × 10-6)  = Integral value (26.21) + 1 = 26 + 1 = 27 Thus, set the clock correction register: (B7, B6, B5, B4, B3, B2, B1, B0) = (1, 1, 0, 1, 1, 0, 0, 0) (2) Calculation example 3 In case of current oscillation frequency actual measurement value = 0.999920 [Hz], target oscillation frequency = 1.000000 [Hz], B0 = 1 (Minimum resolution = 1.017 ppm) (1.000000) − (0.999920)  Correction value = Integral value  +1 0.999920 ( ) × (1.017 × 10-6)   = Integral value (78.66) + 1 This calculated value exceeds the correctable range 0 to 62. B0 = "1" (minimum resolution = 1.017 ppm) indicates the correction is impossible. 29 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 2. Setting values for registers and correction values Table 16 Table 17 30 Setting Values for Registers and Correction Values (Minimum Resolution: 3.052 ppm (B0 = 0)) B7 B6 B5 B4 B3 B2 B1 B0 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 • • • 0 0 0 1 1 1 • • • 0 0 0 0 0 0 1 1 1 0 0 0 Correction Value [ppm] 192.3 189.2 186.2 • • • 6.1 3.1 0 −3.1 −6.1 −9.2 • • • −189.2 −192.3 −195.3 Rate [s / day] 16.61 16.35 16.09 • • • 0.53 0.26 0 −0.26 −0.53 −0.79 • • • −16.35 −16.61 −16.88 Setting Values for Registers and Correction Values (Minimum Resolution: 1.017 ppm (B0 = 1)) B7 B6 B5 B4 B3 B2 B1 B0 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0 1 1 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 • • • 0 0 0 1 1 1 • • • 0 0 0 0 0 0 1 1 1 1 1 1 Correction Value [ppm] 64.1 63.1 62.0 • • • 2.0 1.0 0 −1.0 −2.0 −3.0 • • • −63.1 −64.1 −65.1 Rate [s / day] 5.54 5.45 5.36 • • • 0.18 0.09 0 −0.09 −0.18 −0.26 • • • −5.45 −5.54 −5.62 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 3. How to confirm setting value for register and result of correction The S-35399A03 does not adjust the frequency of the quartz crystal by using the clock correction function. Therefore users cannot confirm if it is corrected or not by measuring output 32.768 kHz. When the function of clock correction is being used, the cycle of 1 Hz clock pulse output from the INT 1 pin changes once in 20 times or 60 times, as shown in Figure 32. INT1 pin (1 Hz output) a a a 19 times or 59 times b a Once In case of B0 = 0: a = 19 times, b = Once In case of B0 = 1: a = 59 times, b = Once Figure 32 Confirmation of Clock Correction Measure a and b by using the frequency counter*1. Calculate the average frequency (Tave) based on the measurement results. B0 = 0, Tave = (a × 19 + b) ÷ 20 B0 = 1, Tave = (a × 59 + b) ÷ 60 Calculate the error of the clock based on the average frequency (Tave). The following shows an example for confirmation. Confirmation example: When B0 = 0, 66h is set Measurement results: a = 1.000080 Hz, b = 0.998493 Hz Clock Correction Register Setting Value Average Frequency [Hz] Before correction 00 h (Tave = a) 1.000080 After correction 66 h (Tave = (a × 19 + b) ÷ 20) 1.00000065 Per Day [s] 86393 86399.9 Calculating the average frequency allows to confirm the result of correction. *1. Use a high-accuracy frequency counter of 7 digits or more. Caution Measure the oscillation frequency under the usage conditions. 31 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Up-Count Operation The up counter is a 24-bit read-only binary counter. This counter starts counting from "000000 h" from power-on and returns to "000000 h" at the next clock after it has reached "FFFFFF h". A clock pulse is a pulse that is output when the second-data in the real-time data is "00h". Therefore, some delay is made in the period that a clock pulse is being output due to write timing and write data. The registers are not initialized unless power-on again, so that users are able to grasp the elapsed time from power-on up to 30 years. Figure 33 shows the example of timing chart of up counter's operation. ON Power supply Clock pulse of real-time second data "00h" 24-bit binary up counter OFF Write real-time second data: "20 seconds" 40 s 40 s 000000 h 60 s 20 s 10 s 000001 h 000010 h A clock pulse is 60 seconds or more. Figure 33 32 OFF Write real-time second data: "50 seconds" 60 s 60 s FFFFFF h 000000 h A clock pulse is 60 seconds or less. Timing Chart of 24-Bit Binary Up Counter 000001 h 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Serial Interface The S-35399A03 transmits / receives various commands via I2C-bus serial interface to read / write data. Regarding transmission is as follows. 1. Start condition A start condition is when the SDA line changes "H" to "L" when the SCL line is in "H", so that the access starts. 2. Stop condition A stop condition is when the SDA line changes "L" to "H" when the SCL line is in "H", and the access stops, so that the S-35399A03 gets standby. tSU.STA tHD.STA tSU.STO SCL SDA Start condition Stop condition Figure 34 Start / Stop Conditions 3. Data transmission and acknowledgment signal Data transmission is performed for every 1-byte, after detecting a start condition. Transmit data while the SCL line is in "L", and be careful of spec of tSU.DAT and tHD.DAT when changing the SDA line. If the SDA line changes while the SCL line is in "H", the data will be recognized as start / stop condition in spite of data transmission. Note that by this case, the access will be interrupted. During data transmission, every moment receiving 1-byte data, the devices which work for receiving data send an acknowledgment signal back. For example, as seen in Figure 35, in case that the S-35399A03 is the device working for receiving data and the master device is the one working for sending data; when the 8-bit clock pulse falls, the master device releases the SDA line. After that, the S-35399A03 sends an acknowledgment signal back, and set the SDA line to "L" at the 9-bit clock pulse. The S-35399A03 does not output an acknowledgment signal is that the access is not being done regularly. SCL (S-35399A03 input) 8 1 tSU.DAT 9 tHD.DAT SDA (Master device output) SDA (S-35399A03 output) SDA is released High-Z Output acknowledgment (Active "L") High-Z Start condition tPD Figure 35 Output Timing of Acknowledgment Signal 33 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 The followings are data reading / writing in the S-35399A03. 3. 1 Data reading in the S-35399A03 After detecting a start condition, the S-35399A03 receives device code and command. The S-35399A03 enters the read-data mode by the read / write bit "1". The data is output from B7 in 1-byte. Input an acknowledgment signal from the master device every moment that the S-35399A03 outputs 1-byte data. However, do not input an acknowledgment signal (input NO_ACK) for the last data-byte output from the master device. This procedure notifies the completion of reading. Next, input a stop condition to the S-35399A03 to finish access. 1-byte data 1 18 9 SCL R/W B7 Code + command : S-35399A03 output data B0 Input NO_ACK after the 1st byte of data has been output. : Master device input data Figure 36 STOP NO_ACK 0 1 1 0 000 1 ACK START SDA Example of Data Reading 1 (1-Byte Data Register) 3-byte data 1 9 18 27 B7 B0 B7 36 SCL R/W : S-35399A03 output data B0 Input NO_ACK after the 3rd byte of data has been output. : Master device input data Figure 37 34 STOP B0 NO_ACK B7 ACK Code + command ACK 01100111 ACK START SDA Example of Data Reading 2 (3-Byte Data Register) 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 3. 2 Data writing in the S-35399A03 After detecting a start condition, S-35399A03 receives device code and command. The S-35399A03 enters the write-data mode by the read / write bit "0". Input data from B7 to B0 in 1-byte. The S-35399A03 outputs an acknowledgment signal "L" every moment that 1-byte data is input. After receiving the acknowledgment signal which is for the last byte-data, input a stop condition to the S-35399A03 to finish access. 1-byte data 1 18 9 SCL R/W STOP B7 Code + command ACK 0 1 1 0 000 0 ACK START SDA B0 : S-35399A03 output data : Master device input data Figure 38 Example of Data Writing 1 (1-Byte Data Register) 3-byte data 1 9 18 36 27 SCL R/W B0 B7 STOP B0 B7 ACK ACK B7 ACK 0 1100110 ACK START SDA B0 Code + command : S-35399A03 output data : Master device input data Figure 39 Example of Data Reading 2 (3-Byte Data Register) 35 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 4. Data access 4. 1 Real-time data 1 access 1 9 72 63 18 SCL R/W B0 B0 B7 Year data Second data I/O mode switching I/O mode switching *1. Set NO_ACK = 1 when reading. *2. Transmit ACK = 0 from the master device to the S-35399A03 when reading. Figure 40 4. 2 Real-Time Data 1 Access Real-time data 2 access 1 9 18 36 27 SCL R/W B0 Second data Set NO_ACK = 1 when reading. Transmit ACK = 0 from the master device to the S-35399A03 when reading. Real-Time Data 2 Access Status register 1 access and status register 2 access 9 1 18 SCL *1 B7 I/O mode switching 0: Status register 1 selected, 1: Status register 2 selected Set NO_ACK = 1 when reading. Figure 42 36 B0 Status data I/O mode switching *1. *2. STOP Device code + command ACK*2 0 11000 ACK START SDA R/W Status Register 1 Access and Status Register 2 Access STOP *1 B7 I/O mode switching Figure 41 4. 3 B0 Minute data Hour data I/O mode switching *1. *2. B7 ACK B0 B7 Code + command ACK*2 ACK*2 0 1 1 00 11 ACK START SDA STOP *2 *1 ACK *2 B7 Code + command ACK ACK 0 1 100 1 0 ACK START SDA 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 4. 4 INT1 register access and INT2 register access In reading / writing the INT1 and INT2 registers, data varies depending on the setting of the status register 2. Be sure to read / write after setting the status register 2. When setting the alarm by using the status register 2, these registers work as 3-byte alarm time data registers, in other statuses, they work as 1-byte registers. When outputting the user-set frequency, they are the data registers to set up the frequency. Regarding details of each data, refer to "4. Caution INT1 register and INT2 register" in " Configuration of Registers". Users cannot use both functions of alarm 1 interrupt for the INT1 pin and INT 2 pin and the output of user-set frequency simultaneously. 9 1 18 27 36 SCL R/W *1 B7 STOP *2 *3 B0 B7 Day of the week Hour data data I/O mode switching I/O mode switching ACK ACK *3 B0 B7 Code + command *1. *2. *3. ACK 0 11010 ACK START SDA B0 Minute data 0: INT1 register selected, 1: INT2 register selected Set NO_ACK = 1 when reading. Transmit ACK = 0 from the master device to the S-35399A03 when reading. Figure 43 INT1 Register Access and INT2 Register Access 9 1 18 SCL *1 *1. *2. B7 STOP I/O mode switching *2 Code + command ACK 0 11010 ACK START SDA R/W B0 Frequency setting data I/O mode switching 0: INT1 register selected, 1: INT2 register selected Set NO_ACK = 1 when reading. Figure 44 INT1 Register and INT2 Register (Data Register for Output Frequency) Access 37 2-WIRE REAL-TIME CLOCK S-35399A03 4. 5 Rev.3.2_00 Clock correction register access 1 9 18 SCL R/W STOP ACK 0 110110 ACK*1 START SDA B7 Code + command B0 Clock correction data I/O mode switching I/O mode switching *1. Set NO_ACK = 1 when reading. Figure 45 4. 6 Clock Correction Register Access Free register 1 access 1 9 18 SCL R/W I/O mode switching *1. B0 B7 Free register data I/O mode switching Set NO_ACK = 1 when reading. Figure 46 4. 7 STOP Code + command ACK*1 0 110111 ACK START SDA Free Register 1 Access Up counter access Access to the up counter is read-only. Users cannot write in this counter with write operation. 9 1 18 36 27 SCL Read-only Code + command B0 B7 Count data I/O mode switching I/O mode switching Figure 47 38 Up Counter Access B0 B7 Count data STOP 1 1 1 0 0 0 1 NO_ACK C128 C64 C32 C16 C8 C4 C2 C1 ACK C32k C16k 0 ACK C8M C4M C2M C1M C512 C256k C128k C64k ACK START SDA 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 4. 8 Free register 2 access and free register 3 access 1 18 9 SCL R/W *1 a 0 1 Free register data I/O mode switching b 1 0 Register to Select Free register 2 Free register 3 Set NO_ACK = 1 when reading. *2. 4. 9 B0 B7 To select register, use the following settings. *1. Figure 48 STOP I/O mode switching *2 Code + command ACK 0 1110a b ACK START SDA Free Register 2 Access and Free Register 3 Access Alarm expansion register 1 access and alarm expansion register 2 access Writing to the alarm expansion register 1 (alarm expansion register 2) should be executed after setting the status register 2. 1 9 18 36 27 SCL *1 Year data B7 B0 Month data B7 STOP B0 *3 *2 B7 ACK ACK I/O mode switching *2 Code + command ACK 0 1 1 11 0 ACK START SDA R/W B0 Second data I/O mode switching *1. 0: Alarm expansion register 1 access, 1: Alarm expansion register 2 access *2. Transmit ACK = 0 from the master device to the S-35399A03 when reading. *3. Set NO_ACK = 1 when reading. Figure 49 Alarm Expansion Register 1 Access and Alarm Expansion Register 2 Access 39 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Reset After Communication Interruption In case of communication interruption in the S-35399A03, for example, if the power supply voltage drops and only the master device is reset during communication, the S-35399A03 does not perform the next operation because the internal circuit keeps the status prior to communication interruption. Since the S-35399A03 does not have a reset pin, users usually reset its internal circuit by inputting a stop condition. However, if the SDA is outputting "L" (during output of acknowledgment signal or reading), the S-35399A03 does not accept a stop condition from the master device. In this case, users are necessary to finish acknowledgment output or reading of the SDA. Figure 50 shows how to reset. First, input a start condition from the master device (the S-35399A03 cannot detect a start condition because the SDA in the S-35399A03 is outputting "L"). Next, input a clock pulse equivalent to 1-byte data access (9-clock) from the SCL. During this period, release the SDA line for the master device. By this procedure, SDA I/O before communication interruption is finished, and the SDA line in the S-35399A03 is released. After that, inputting a stop condition resets the internal circuit and restores the regular communication. This reset procedure is recommended to be executed at initialization of the system after the master device's power supply voltage is raised. If this reset procedure is executed when the S-35399A03 outputs an acknowledgment signal of a writing instruction, the writing operation may be performed at the corresponding register, so caution should be exercised. Start condition Clocks equivalent to 1-byte data access 1 SCL SDA 2 8 9 High-Z (Output from the master device) SDA (Output from "L" "L" or High-Z High-Z "L" "L" or High-Z High-Z S-35399A03) SDA Figure 50 40 How to Reset Stop condition 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Flowchart of Initialization and Example of Real-time Data Set-up Figure 51 is a recommended flowchart when the master device shifts to a normal operation status and initiates communication with the S-35399A03. Regarding how to apply power, refer to " Power-on Detection Circuit and Register Status". It is unnecessary for users to comply with this flowchart of real-time data strictly. And if using the default data at initializing, it is also unnecessary to set up again. START Read status register 1 NO POC = 1 YES Wait for 0.5 s *1 NO BLD = 0 YES Initialize (status register 1 B7 = 1) Read real-time data 1 Read status register 1 NO POC = 0 YES NO BLD = 0 YES Set 24-hour / 12-hour mode to status register 1 Read status register 1 Confirm data in status register 1 NG OK Set real-time data 1 *2 Read real-time data 1 Confirm data in real-time data 1 NG OK END *1. *2. Do not communicate for 0.5 seconds since the power-on detection circuit is in operation. Reading the real-time data 1 should be completed within 1 second after setting the real-time data 1. Figure 51 Example of Initialization Flowchart 41 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Examples of Application Circuits VCC 10 kΩ INT1 VDD System power supply VCC 10 kΩ INT2 1 kΩ 1 kΩ S-35399A03 CPU SDA VSS SCL XOUT XIN VSS Cg Caution 1. 2. Because the I/O pin has no protective diode on the VDD side, the relation of VCC ≥ VDD is possible. But pay careful attention to the specifications. Start communication under stable condition after power-on the power supply in the system. Figure 52 Application Circuit 1 System power supply 10 kΩ INT1 VDD VCC 10 kΩ INT2 1 kΩ SDA CPU SCL VSS XIN 1 kΩ S-35399A03 XOUT VSS Cg Caution Start communication under stable condition after power-on the power supply in the system. Figure 53 Caution 42 Application Circuit 2 The above connection diagrams do not guarantee operation. Set the constants after performing sufficient evaluation using the actual application. 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Adjustment of Oscillation Frequency 1. Configuration of crystal oscillation circuit Since the crystal oscillation circuit is sensitive to external noise (the clock accuracy is affected), the following measures are essential for optimizing the configuration. • • • • • Place the S-35399A03, quartz crystal, and external capacitor (Cg) as close to each other as possible. Increase the insulation resistance between pins and the substrate wiring patterns of XIN and XOUT. Do not place any signal or power lines close to the crystal oscillation circuit. Locating the GND layer immediately below the crystal oscillation circuit is recommended. Locate the bypass capacitor adjacent to the power supply pin of the S-35399A03. Parasitic capacitance*3 XIN Rf Cg Quartz crystal: 32.768 kHz CL = 6 pF*1 Cg = None*2 to 9.1 pF Parasitic capacitance*3 Rd XOUT Rf = 100 MΩ (typ.) Rd = 100 kΩ (typ.) Cd = 8 pF (typ.) Cd S-35399A03 *1. When setting the value for the quartz crystal's CL as 7 pF, connect Cd externally if necessary. *2. The crystal oscillation circuit operates even when Cg is not connected. Note that the oscillation frequency is in the direction that it advances. *3. Design the board so that the parasitic capacitance is within 5 pF. Figure 54 Connection Diagram 1 S-35399A03 1 Quartz crystal Locate the GND layer in the layer immediately below Figure 55 Caution 2 XOUT 8 7 3 XIN 6 4 VSS 5 Cg Connection Diagram 2 1. When using the quartz crystal with a CL exceeding the rated value (7 pF) (e.g: CL = 12.5 pF), oscillation operation may become unstable. Use a quartz crystal with a CL value of 6 pF or 7 pF. 2. Oscillation characteristics is subject to the variation of each component such as substrate parasitic capacitance, parasitic resistance, quartz crystal, and Cg. When configuring a crystal oscillaiton circuit, pay sufficient attention for them. 43 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 2. Measurement of oscillation frequency When the S-35399A03 is turned on, the internal power-on detection circuit operates and a signal of 1 Hz is output from the INT 1 pin to select the quartz crystal and optimize the Cg value. Turn the power on and measure the signal with a frequency counter following the circuit configuration shown in Figure 56. If 1 Hz signal is not output, the power-on detection circuit does not operate normally. Turn off the power and then turn it on again. For how to apply power, refer to " Power-on Detection Circuit and Register Status". Remark If the error range is ±1 ppm in relation to 1 Hz, the time is shifted by approximately 2.6 seconds per month (calculated using the following expression). 10–6 (1 ppm) × 60 seconds × 60 minutes × 24 hours × 30 days = 2.592 seconds VDD 1 kΩ 1 kΩ XIN SDA SCL Cg S-35399A03 10 kΩ XOUT INT1 Open or pull-up INT2 VSS Figure 56 Caution 44 Frequency counter Configuration of Oscillation Frequency Measurement Circuit 1. Use a high-accuracy frequency counter of 7 digits or more. 2. Measure the oscillation frequency under the use operation conditions. 3. Since the 1 Hz signal continues to be output, initialization must be executed during normal operation. 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 3. Adjustment of oscillation frequency 3. 1 Adjustment by setting Cg Matching of the quartz crystal with the nominal frequency must be performed with the parasitic capacitance on the board included. Select a quartz crystal and optimize the Cg value in accordance with the flowchart below. START Select a quartz crystal*1 Variable capacitance YES Trimmer capacitor NO Fixed capacitor Set to center of variable capacitance*3 Set Cg NO Frequency Cg in specification YES Optimal value*2 Change Cg NO NO YES Make fine adjustment of frequency using variable capacitance YES END *1. Request a quartz crystal manufacturer for a matching evaluation between the IC and the quartz crystal. The recommended quartz crystal characteristic values are, CL value (load capacitance) = 6 pF, R1 value (equivalent serial resistance) = 65 kΩ max. *2. The Cg value must be selected on the actual PCB since it is affected by parasitic capacitance. Select the external Cg value in a range of 0 pF to 9.1 pF. *3. Adjust the rotation angle of the variable capacitance so that the capacitance value is slightly smaller than the center, and confirm the oscillation frequency and the center value of the variable capacitance. This is done in order to make the capacitance of the center value smaller than one half of the actual capacitance value because a smaller capacitance value increases the frequency variation. Figure 57 Caution Quartz Crystal Setting Flow 1. The oscillation frequency varies depending on the ambient temperature and power supply voltage. Refer to " Characteristics (Typical Data)". 2. The 32.768 kHz quartz crystal operates more slowly at an operating temperature higher or lower than +20°C to +25°C. Therefore, it is recommended to set the oscillator to operate slightly faster at normal temperature. 45 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Precautions • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 46 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00  Characteristics (Typical Data) 1. Current consumption 1 (current consumption out of communication) vs. VDD characteristics 2. Current consumption 2 (current consumption when 32.768 kHz is output) vs. VDD characteristics Ta = +25°C, CL = 6 pF, Cg = 5.1 pF IDD1 [μA] Ta = +25°C, CL = 6 pF, Cg = 5.1 pF 1.0 1.0 0.8 0.8 0.6 IDD2 [μA] 0.4 0.2 0.6 0.4 0.2 0 0 0 1 2 3 4 5 6 0 1 2 VDD [V] 3. Current consumption 3 (current consumption during communication) vs. Input clock characteristics CL = 6 pF, Cg = 5.1 pF 90 1.0 80 0.9 0.8 70 VDD = 5.0 V 60 0.7 50 IDD1 [μA] 40 30 0.6 0.5 VDD = 5.0 V 0.4 VDD = 3.0 V 0.3 20 0.2 VDD = 3.0 V 10 0.1 0 0 100 200 300 SCL [kHz] 400 0 −40 −25 500 5. Current consumption 1 (current consumption out of communication) vs. Cg characteristics Ta = +25°C, CL = 6 pF 1.0 0 25 Ta [°C] 75 85 50 6. Oscillation frequency vs. Cg characteristics Ta = +25°C, CL = 6 pF, Cg = 5.1 pF (reference) 60 0.9 40 0.8 0.7 IDD1 [μA] 6 5 4. Current consumption 1 (current consumption out of communication) vs. Temperature characteristics Ta = +25°C, CL = 6 pF, Cg = 5.1 pF IDD3 [μA] 3 4 VDD [V] 20 0.6 0.5 Δf/f [ppm] VDD = 5.0 V 0.4 VDD = 3.0 V −20 VDD = 3.0 V 0.3 VDD = 5.0 V 0 0.2 −40 0.1 0 0 2 4 6 Cg [pF] 8 10 −60 0 2 4 6 Cg [pF] 8 10 47 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 7. Oscillation frequency vs. VDD characteristics 8. Oscillation frequency vs. Temperature characteristics Ta = +25°C, CL = 6 pF, Cg = 5.1 pF (reference) 50 CL = 6 pF, Cg = 5.1 pF (reference) 20 40 30 −20 20 Δf/f [ppm] VDD = 5.0 V 0 VDD = 3.0 V −40 10 Δf/f −60 [ppm] −80 0 −10 −20 −100 −30 −120 −40 −50 0 1 2 3 4 5 −140 −40 −25 6 0 25 Ta [°C] VDD [V] 9. Oscillation start time vs. Temperature characteristics (XOUT pin moniterd) 10. Output current characteristics 1 (VOUT vs. IOL1) Ta = +25°C, CL = 6 pF INT 1 pin, INT2 pin, Ta = +25°C 500 40 450 35 400 VDD = 5.0 V 30 350 25 300 tSTA 250 [ms] 200 IOL1 [mA] VDD = 5.0 V VDD = 3.0 V 10 VDD = 3.0 V 100 20 15 150 5 50 0 0 2 4 6 Cg [pF] 8 0 10 0 2 1 (VOUT vs. IOL2) SDA pin, Ta = +25°C 1.4 60 1.2 VDD = 5.0 V 50 1.0 40 0.8 VDD [V] 30 VDD = 3.0 V 6 Release voltage Detection voltage VDDT (min) 0.6 0.4 10 0.2 0 0 1 2 3 VOUT [V] 48 5 CL = 6 pF, Cg = 5.1 pF 70 20 4 3 VOUT [V] 12. Low power supply voltage detection voltage release voltage, and time keeping power supply voltage (min) vs. Temperature characteristics 11. Output current characteristics 2 IOL2 [mA] 75 85 50 4 5 6 0 −40 −25 0 25 Ta [°C] 50 75 85 2-WIRE REAL-TIME CLOCK S-35399A03 Rev.3.2_00 13. Characteristics of power-on detection circuit Ta = −40°C to +85°C 5.5 VDD [V] 1.3 0 t1 t2 t3 t1: A condition that power-on detection works at turning on t1 ≤ 10 ms t2: A condition that the IC works regularly and data is retained during power voltage drop t2 ≥ 1 ms t3: A condition that the IC works regularly and data is retained during power voltage rise t3 ≥ 1 ms 49 5.02±0.2 8 5 1 4 1.27 0.20±0.05 0.4±0.05 No. FJ008-A-P-SD-2.2 TITLE SOP8J-D-PKG Dimensions FJ008-A-P-SD-2.2 No. ANGLE UNIT mm ABLIC Inc. 4.0±0.1(10 pitches:40.0±0.2) 2.0±0.05 ø1.55±0.05 0.3±0.05 ø2.0±0.05 8.0±0.1 2.1±0.1 6.7±0.1 1 8 4 5 Feed direction No. FJ008-D-C-SD-1.1 TITLE SOP8J-D-Carrier Tape No. FJ008-D-C-SD-1.1 ANGLE UNIT mm ABLIC Inc. 60° 2±0.5 13.5±0.5 Enlarged drawing in the central part ø21±0.8 2±0.5 ø13±0.2 No. FJ008-D-R-S1-1.0 TITLE SOP8J-D-Reel No. FJ008-D-R-S1-1.0 QTY. ANGLE UNIT mm ABLIC Inc. 4,000 Disclaimers (Handling Precautions) 1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described herein. 4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to the use of the products outside their specified ranges. 5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear, biological or chemical weapons or missiles, or use any other military purposes. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by ABLIC, Inc. Do not apply the products to the above listed devices and equipments. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of the products. 9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system in which the products are used must be sufficiently evaluated and judged whether the products are allowed to apply for the system on customer's own responsibility. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express permission of ABLIC Inc. 14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales representative. 15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into the English language and the Chinese language, shall be controlling. 2.4-2019.07 www.ablic.com