Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
The S-818 Series is a positive voltage regulator developed utilizing CMOS technology featured by low dropout voltage, high output voltage accuracy and low current consumption. Built-in low on-resistance transistor provides low dropout voltage and large output current. A ceramic capacitor of 2 µF or more can be used as an output capacitor. A power-OFF circuit ensures long battery life. The SOT-23-5 miniaturized package and the SOT-89-5 package are recommended for configuring portable devices and large output current applications, respectively.
Features
Applications
During operation: Typ. 30 µA, Max. 40 µA During power off: Typ. 100 nA, Max. 500 nA O Output voltage: 0.1 V steps between 2.0 and 6.0 V O High accuracy output voltage: ±2.0% O Peak output current; Note 200 mA capable (3.0 V output product, VIN=4 V) Note 300 mA capable (5.0 V output product, VIN=6 V) O Low dropout voltage Typ. 170 mV (5.0 V output product, IOUT = 60 mA) A ceramic capacitor (2 µF or more) can be used as an output capacitor. O Built-in power-off circuit O Compact package: SOT-23-5, SOT-89-5
O Low current consumption
O Power source for
battery-powered devices
O Power source for
personal communication devices
O Power source for home electric/electronic
appliances
Note : Please consider power dissipation of the package when the output current is large.
Package
O 5-pin SOT-23-5 (Package drawing code: MP005-A) O 5-pin SOT-89-5 (Package drawing code: UP005-A)
Seiko Instruments Inc.
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series Block Diagram
*1 VIN VOUT
Rev.1.2
ON/OFF
ON/OFF circuit
Reference voltage
VSS *1: Parasitic diode
Figure 1 Block Diagram
Selection Guide
1. Product Name
S-818x xx A xx - xxx - T2 IC orientation in taping specifications Product abbreviation Package type MC : SOT-23-5 UC : SOT-89-5 Output voltage x 10 Product type
A: ON/OFF pin has positive logic (high active) B: ON/OFF pin has negative logic (low active) Table 1 Output Voltage Selection Guide
SOT-23-5 SOT-89-5 S-818A20AMC-BGA-T2 S-818A20AUC-BGA-T2 2.0 V ± 2.0% S-818A25AMC-BGF-T2 S-818A25AUC-BGF-T2 2.5 V ± 2.0% S-818A28AMC-BGI-T2 S-818A28AUC-BGI-T2 2.8 V ± 2.0% S-818A30AMC-BGK-T2 S-818A30AUC-BGK-T2 3.0 V ± 2.0% S-818A33AMC-BGN-T2 S-818A33AUC-BGN-T2 3.3 V ± 2.0% S-818A38AMC-BGS-T2 S-818A38AUC-BGS-T2 3.8 V ± 2.0% S-818A40AMC-BGU-T2 S-818A40AUC-BGU-T2 4.0 V ± 2.0% S-818A50AMC-BHE-T2 S-818A50AUC-BHE-T2 5.0 V ± 2.0% Note: Contact SII sales division for product with an output voltage other than those specified above or product type B, low active product.
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Seiko Instruments Inc.
Rev.1.2 Pin Configuration
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
Please refer to the package drawings at the end of this document for details. Table 2 Pin Assignment
5 4
Pin No. 1 2 3 4
Symbol VIN VSS ON/OFF NC
Note
Description
Voltage input pin GND pin Power off pin No connection Voltage output pin
SOT-23-5 Top view
1
2
3
5
VOUT
Figure 2 SOT-23-5
Table 3 Pin Assignment Pin No.
5 4
Symbol VOUT VSS NC
Note
Description
Voltage output pin GND pin No connection Power off pin Voltage input pin
1 2 3 4 5
SOT-89-5 Top view
ON/OFF VIN
1
2
3
Note: NC means electrical open. Connecting NC pin to VIN or VSS is allowed.
Figure 3 SOT-89-5
Absolute Maximum Ratings
Table 4 Absolute Maximum Ratings (Ta=25°C unless otherwise specified) Symbol Absolute Maximum Rating Unit VIN VON / OFF VOUT PD Tope Tstg 12 VSS-0.3 to 12 VSS-0.3 to VIN+0.3 250 (SOT-23-5) 500 (SOT-89-5) -40 to +85 -40 to +125 V V V mW °C °C
Parameter Input voltage Output voltage Power dissipation
Operating temperature range Storage temperature range
The IC has a protection circuit against static electricity. DO NOT apply high static electricity or high voltage that exceeds the performance of the protection circuit to the IC.
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series Electrical Characteristics
S-818AXXAMC/UC, S-818BXXAMC/UC
Rev.1.2
Table 5 Electrical Characteristics
Parameter Output voltage Output current
*1) *2)
(Ta=25°C unless otherwise specified)
Min. Typ. Max. Test Units circuit s 1 3 3 3 3 3 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 4 4 4 4 5
Symbol VOUT(E) IOUT
Conditions VIN=VOUT(S)+1V,IOUT=30mA VOUT(S)+1V ≤ VIN≤10V
2.0V ≤VOUT(S) ≤2.4V 2.5V ≤VOUT(S) ≤2.9V 3.0V ≤VOUT(S) ≤3.9V 4.0V ≤VOUT(S) ≤4.9V 5.0V ≤VOUT(S) ≤6.0V *3) Dropout voltage Vdrop IOUT = 2.0V ≤VOUT(S) ≤2.4V 60mA 2.5V ≤VOUT(S) ≤2.9V 3.0V ≤VOUT(S) ≤3.4V 3.5V ≤VOUT(S) ≤3.9V 4.0V ≤VOUT(S) ≤4.4V 4.5V ≤VOUT(S) ≤4.9V 5.0V ≤VOUT(S) ≤5.4V 5.5V ≤VOUT(S) ≤6.0V ∆VOUT1 1 VOUT(S) + 0.5 V ≤ VIN ≤ 10 V, Line regulation 1 ∆VIN • VOUT IOUT = 30mA ∆VOUT2 1 VOUT(S) + 0.5 V ≤ VIN ≤ 10 V, Line regulation 2 ∆VIN • VOUT IOUT = 10µA ∆VOUT3 Load regulation VIN = VOUT(S) + 1 V, 10µA ≤ IOUT ≤ 80mA ∆VOUT 1 VIN = VOUT(S) + 1 V, IOUT = 30mA Output voltage temperature *4) ∆Ta • VOUT -40°C ≤ Ta ≤ 85°C coefficient Current consumption during ISS1 VIN = VOUT(S) + 1 V, operation ON/OFF pin = ON, no load Current consumption when ISS2 VIN = VOUT(S) + 1 V, power off ON/OFF pin = OFF, no load Input voltage VIN Power-off pin input voltage "H" VSH VIN = VOUT(S) + 1 V, RL = 1kΩ,
VOUT(S) VOUT(S) VOUT(S) V ×0.98 ×1.02 − − 100 *5) mA − − 150 *5) mA − − 200 *5) mA − − 250 *5) mA − − 300 *5) mA − 0.51 0.87 V − 0.38 0.61 V − 0.30 0.44 V − 0.24 0.33 V − 0.20 0.26 V − 0.18 0.22 V − 0.17 0.21 V − 0.17 0.20 V 0.05 0.2 %/V 0.05 30 ±100 1.5 30 0.1 45 0.2 50 40 0.5 10 0.3 0.1 -0.1 %/V mV ppm /°C µA µA V V V µA µA dB
Judged by VOUT output level.
Power-off pin input voltage "L" Power-off pin input current "H" Power-off pin input current "L" Ripple rejection VSL ISH ISL RR VIN = VOUT(S) + 1 V, RL = 1kΩ,
Judged by VOUT output level.
VIN = VOUT(S) + 1 V, ON/OFF = 7 V VIN = VOUT(S) + 1 V, ON/OFF = 0 V VIN = VOUT(S) + 1 V, f = 100Hz, ∆Vrip = 0.5 V p-p, IOUT=30mA
*1) VOUT(S)=Specified output voltage VOUT(E)=Effective output voltage, i.e., the output voltage at fixet IOUT(=30 mA) and input VOUT(S)+1.0 V. *2) Output current when the output voltage goes below 95% of VOUT(E) after gradually increasing output current. *3) Vdrop = VIN1-(VOUT(E) × 0.98) VIN1 = Input voltage when output voltage falls 98% of VOUT(E) after gradually decreasing input voltage. *4) Output voltage shift by temperature [mV/°C] is calculated using the following equation. ∆VOUT ∆VOUT [ppm/°C] ÷1000 [mV/°C] = VOUT(S)[V] × ∆Ta • V OUT ∆Ta
Specified output voltage Output voltage shift by temperature Output voltage temperature coefficient
*5) Peak output current can exceed the minimum value.
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Seiko Instruments Inc.
Rev.1.2 Test Circuits
1.
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
2.
VIN ON/OFF
Set to power ON
VOUT VSS V
A
A
VIN ON/OFF
Set to VIN or GND
VOUT VSS
3.
4.
VIN ON/OFF
Set to power ON
VOUT VSS
A V A
VIN ON/OFF
VOUT VSS V RL
5.
VIN ON/ OFF
VOUT VSS V RL
Set to power ON
Figure 4 Test Circuits
Standard Circuit
INPUT VIN CIN VOUT CL OUTPUT
VSS
In addition to a tantalum capacitor, a ceramic capacitor of 2 µF or more can be used in CL. CIN is a capacitor used to stabilize input. Use a capacitor of 0.47 µF or more.
Single GND
GND
Figure 5 Standard Circuit
Operating Conditions
Input capacitor (CIN) Output capacitor (CL) Equivalent Series Resistor (ESR) Input Series Resistor (RIN) : 0.47 µF or more : 2 µF or more : 10 Ω or less : 10 Ω or less
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series Technical Terms
Rev.1.2
1. Low dropout voltage regulator The low dropout voltage regulator is a voltage regulator having a low dropout voltage characteristic due to the internal low on-resistance transistor. 2. Output voltage (VOUT) The accuracy of the output voltage is ensured at ± 2.0% under the specified conditions of input voltage, output current, and temperature, which differ product by product. Note: When the above conditions are changed, the output voltage may vary and go out of the accuracy range of the output voltage. See the electrical characteristics and characteristic data for details. 3. Line regulations 1 and 2 (∆VOUT1, ∆VOUT2) Line regulation indicates the input voltage dependence of the output voltage. The value shows how much the output voltage changes due to the change of the input voltage when the output current is kept constant. 4. Load regulation (∆VOUT3) Load regulation indicates the output current dependence of output voltage. The value shows how much the output voltage changes due to the change of the output current when the input voltage is kept constant. 5. Dropout voltage (Vdrop) Let VIN1 be an input voltage where the output voltage falls to the 98% of the actual output voltage VOUT(E) when gradually decreasing input voltage. The dropout voltage is the difference between the VIN1 and the resultant output voltage defined as following equation. Vdrop = VIN1-[VOUT(E) × 0.98] 6. Temperature coefficient of output voltage [∆VOUT/(∆Ta • VOUT)] The shadowed area in Figure 6 is the range where VOUT varies in the operating temperature range when the temperature coefficient of the output voltage is ±100 ppm/°C. Typical Example of the S-818A28A
VOUT
[V]
+0.28mV/°C
VOUT (E) is a mesured value of output voltage at 25°C.
OUT(E)
-0.28mV/°C
-40
25
85
Ta [°C]
Figure 6 Temperature coefficient range of output voltage A change of output voltage in temperature [mV/°C] is calculated using the following equation.
∆VOUT [mV/°C] = VOUT(S)[V] × ∆Ta
Specified output voltage Output voltage temperature coefficient Change of output voltage in temperatures
∆VOUT [ppm/°C] ÷1000 ∆Ta • VOUT
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Seiko Instruments Inc.
Rev.1.2 Operation
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
VIN *1
1. Basic operation Figure 7 shows the block diagram of the S-818 Series. The error amplifier compares a reference voltage VREF with the part of the output voltage divided by the feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage, necessary to ensure certain output voltage free of any fluctuations of input voltage and temperature.
Current source Error amplifier Vref
VOUT Rf
Reference voltage circuit VSS
Rs
*1 Parasitic diode
Figure 7 Typical Circuit Block Diagram 2. Output transistor The S-818 Series uses a low on-resistance Pch MOS FET as the output transistor. Be sure that VOUT does not exceed VIN+0.3 V to prevent the voltage regulator from being broken due to inverse current flowing from VOUT pin to VIN pin through the parasitic diode. 3. Power Off Pin (ON/OFF Pin) This pin activates and inactivates the regulator. When the ON/OFF pin is switched to the power off level, the operation of all internal circuit stops, the built-in Pch MOSFET output transistor between VIN and VOUT pin is switched off, suppressing current consumption. The VOUT pin goes to the Vss level due to internal divided resistance of several MΩ between VOUT pin and VSS pin. The structure of the ON/OFF pin is shown in Figure 8. Since the ON/OFF pin is neither pulled down nor pulled up internally, do not keep it in the floating state. Current consumption increases if a voltage of 0.3 V to VIN-0.3 V is applied to the ON/OFF pin. When the power off pin is not used, connect it to the VIN pin for product type "A" and to the VSS pin for product type "B".
Table 6 Power off pin function by product type Product type A A B B ON/OFF pin “H” : Power on “L” : Power off “H” : Power off “L” : Power on Internal circuit Operating Stop Stop Operating VOUT pin voltage Set value VSS level VSS level Set value Current consumption Iss1 Iss2 Iss2 Iss1
VIN ON/OFF
Figure 8 ON/OFF Pin VSS
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series Selection of Output Capacitor (CL)
Rev.1.2
The S-818 series needs an output capacitor between VOUT pin and VSS pin for phase compensation. A small ceramic or an OS electrolytic capacitor of 2 µF or more can be used. If a tantalum or an aluminum electrolytic capacitor is used, its capacitance must be 2 µF or more and the ESR must be 10 Ω or less. Attention should be paid not to cause an oscillation due to increase of ESR at low temperatures when using an aluminum electrolytic capacitor. Evaluate the performance including temperature characteristics before prototyping the circuit. Overshoot and undershoot characteristics differ depending upon the type of the output capacitor. Refer to output capacitor dependence data in transient response characteristics .
Design Considerations
• Design wiring patterns for VIN, VOUT and GND pins to decrease impedance. When mounting an output capacitor, connection from the capacitor to the VOUT pin and to the VSS pin should be as close as possible. Note that output voltage may increase when the voltage regulator is used at low load current (less than 10 µA). To prevent oscillation, it is recommended to use the external components under the following conditions: * Input capacitor (CIN): 0.47 µF or more * Output capacitor (CL): 2 µF or more * Equivalent Series Resistance (ESR): 10 Ω or less * Input series resistance (RIN): 10 Ω or less The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small or not connected. Be sure that input voltage and load current do not exceed the power dissipation level of the package. SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products including this IC upon patents owned by a third party. In determining necessary output current, consider the value of output current of Table 4 “Electrical Characteristics” and Note *5) (page 4).
• •
• • • •
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Seiko Instruments Inc.
Rev.1.2 Typical Characteristics (Typical Data)
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(1) OUTPUT VOLTAGE vs. OUTPUT CURRENT (When load current increases) S-818A20A(Ta=25°C)
2.0
S-818A30A(Ta=25°C)
3.0 10V 4V 3.5V 1.0 VIN=3.3V 0.0 0.6 0.8 0 0.2 0.4 0.6 0.8 5V 6V
VOUT(V)
3V
VOUT(V)
10V 4V 5V
2.0
1.0
2.5V VIN=2.3V
0.0 0 0.2 0.4
IOUT(A) S-818A50A(Ta=25°C)
6.0 5.0 10V 8V
IOUT(A)
VOUT(V)
4.0 3.0 2.0 1.0 0.0 0 0.2 0.4 0.6 0.8 5.5V VIN=5.3V 7V 6V
* In determining necessary output current, consider the following parameters: • Minimum value of output current in Table 4 “Electrical Characteristics” and Note *5) (page 4); • Power dissipation of the package
IOUT(A) (2) OUTPUT VOLTAGE vs. INPUT VOLTAGE
S-818A20A (Ta=25°C) 2.5
Iout=10uA 100uA
S-818A30A (Ta=25°C) 3.5 3.0 V (V)
60mA Iout=10uA 100uA 1mA
V (V)
2.0
2.5 2.0 1.5
60mA 30mA
1.5
1mA
30mA
1.0 1 2 V). (V) S-818A50A (Ta=25°C) 5.5
Iout=10u A 100uA 1mA
3
4
2
3 V). (V)
4
5
V (V)
5.0
60mA
4.5
30mA
4.0 4 5 V). (V) 6 7
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(3) MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE S-818A20A
0.8 Ta=-40°C 0.6 0.4 85°C 0.2 0.0 0 2 4 6 8 10 25°C
Rev.1.2
S-818A30A
0.8 Ta=-40°C 0.6 0.4 0.2 0.0 0 2 4 6 8 10 85°C 25°C
IOUTmax(A)
VIN(V) S-818A50A
0.8 25°C 0.6 Ta=-40°C 0.4 0.2 0.0 0 2 4 6 8 10 85°C
IOUTmax(A)
VIN(V)
* In determining necessary output current, consider the following parameters: • Minimum value of output current in Table 4 “Electrical Characteristics” and Note *5) (page 4); • Power dissipation of the package
IOUTmax(A)
VIN(V) (4) DROPOUT VOLTAGE vs. OUTPUT CURRENT
S-818A20A
2000
S-818A30A
2000
Vdrop(mV)
Vdrop(mV)
1500 1000 500 0 0 50
85°C Ta=-40°C 25°C
1500 85°C 1000 Ta=-40°C 500 25°C 0
100
150
200
250
300
0
100
200
300
400
I/ 5 4 (mA) S-818A50A
2000
I/ 5 4 (mA)
Vdrop(mV)
1500 85°C 1000 500 0 0 100 200 300 400 500 600 Ta=-40°C 25°C
I/ 5 4 (mA)
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Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(5) OUTPUT VOLTAGE TEMPERATURE DEPENDENCE S-818A20A
2.04 2.02
VIN=3V, IOUT=30mA
S-818A30A
3.06 3.03
VIN=4V, IOUT=30mA
VOUT(V)
2.00 1.98 1.96 -50 0 50 100
VOUT(V)
3.00 2.97 2.94 -50 0 50 100
Ta(°C) S-818A50A
5.10 5.05
Ta(°C)
VIN=6V, IOUT=30mA
VOUT(V)
5.00 4.95 4.90 -50 0 50 100
Ta(°C) (6) LINE REGULATION TEMPERATURE DEPENDENCE
S-818A20/30/50A V) . =V/54 (S)+0.5↔ 10V,I/54 =30mA
35 30
1(mV)
25 20 15 10 5 0 -50
3V
5V
V
V/54 =2V
0
50
100
Ta(°C)
(7) LOAD REGULATION TEMPERATURE DEPENDENCE
S-818A20/30/50A V) . =V/54 (S)+1V,I/54 =10uA↔ 80mA
50 40 3V
3(mV)
30 20 10 0 -50 0 50 100 5V V/54 =2V
V
Ta(°C)
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(8) CURRENTCONSUMPTION vs. INPUT VOLTAGE
S-818A20A
40 25°C 30 30
Rev.1.2
S-818A30A
40 25°C
I 1(uA)
I 1(uA)
20 10
85°C
85°C 20 Ta=-40°C 10
Ta=-40°C 0 0 2 4 0 6 8 10 0 2 4 6 8 10
V) . (V)
V) . (V)
S-818A50A
40 30
I 1(uA)
20 10 0 0 2 4
85°C 25°C Ta=-40°C
V) . (V)
6
8
10
(9) THRESHOLD VOLTAGE OF POWER OFF PIN vs. INPUT VOLTAGE S-818A20A
2.5 2.0 1.5 1.0 0.5 0.0 2 4 6
S-818A30A
2.5 2.0
VSH/VSL(V)
VSH
VSH/VSL(V)
VSH
1.5 1.0 0.5
VSL
8 10
0.0 3 5
VSL
7 8 10
VIN(V) S-818A50A
2.5 2.0
VIN(V)
VSH/VSL(V)
VSH
1.5 1.0 0.5 0.0 5 6
VSL
8 9 10
VIN(V)
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Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(10) RIPPLE REDUCTION RATE S-818A20A
0 -20 -40 -60 -80 -100 0.1
VIN =3V IOUT=30mA CIN =None COUT=2µF 0.5Vp-p Ta=25°C
Gain (dB)
1 f (kHz)
10
100
S-818A30A 0 -20 -40 -60 -80 -100 0.1
VIN =4V IOUT=30mA C IN =None COUT=2µF 0.5Vp-p Ta=25°C
Gain (dB)
1 f (kHz)
10
100
S-818A50A 0 -20 -40 -60 -80 -100 0.1
VIN =6V IOUT=30mA CIN =NoneCOUT=2µF 0.5Vp-p Ta=25°C
Gain (dB)
1 f (kHz)
10
100
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
Rev.1.2 REFERENCE DATA
TRANSIENT RESPONSE CHARACTERISTICS (S-818A30A, Typical data: Ta=25°C)
INPUT VOLTAGE or LOAD CURRENT
Overshoot
OUTPUT VOLTAGE Undershoot
(1) Power on
V IN =0→10V IOUT=30mA
10V 0V
VOUT(0.5V/div)
CL=4.7µF VIN CL=2µF VOUT
0V
TIME(50usec/div)
Load dependence of overshoot
1.0 Over Shoot(V) 0.8 0.6 3V VOUT=2V 0.4 0.2 0.0 1.E-05 1.E-04 1.E-03 1.E-02 IOUT(A) 1.E-01 1.E+00
Output capacitor (CL) dependence of overshoot
1.0 5V Over Shoot(V) 0.8 0.6 0.4 0.2 0.0 1 10 CL(µF) 100
V IN =0→VOUT(S)+1V, CL=2µF
VIN =0→VOUT(S)+1V, IOUT=30mA
VOUT=2V 3V 5V
VDD dependence of overshoot
1.0 Over Shoot(V) 0.8 0.6 0.4 0.2 0.0 0 2 4 6 VDD(V) 8 10 VOUT=2V
Temperature dependence of overshoot
1.0 Over Shoot(V) 0.8 0.6 0.4 0.2 0.0 -50 0 Ta(°C 50 100
VIN =0→VDD, IOUT=30mA,CL=2µF
5V 3V
VIN =0→V/54 (S)+1V, IOUT=30mA,CL=2µF
3V VOUT=2V 5V
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Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(2) Power on/off control
V IN =10V ON/OFF=0→10V IOUT=30mA
10V 0V
CL=4.7µF VIN CL=2µF VOUT
VOUT(0.5V/div)
0V
TIME(50usec/div)
Load dependence of overshoot
1.0 Over Shoot(V) 0.8 0.6 3V 0.4 0.2 0.0 1.E-05 1.E-04 1.E-03 1.E-02 IOUT(A) 1.E-01 1.E+00 VOUT=2V
V IN=V OUT(S)+1V , CL=2µF, ON/OFF=0→V OUT(S)+1V
Output capacitor (CL) dependence of overshoot
1.0 0.8 Over Shoot(V) 0.6 0.4 0.2 0.0 1 10 CL(uF) 100
V IN=V OUT(S)+1V IOUT=30mA, ON/OFF=0→V OUT(S)+1V
5V
VOUT=2V 3V 5V
VDD dependence of overshoot
V IN=VDD ,IOUT=30mA, CL=2µF, ON/OFF=0→VDD
Temperature dependence of overshoot
V IN=V OUT(S)+1V ,IOUT=30mA, CL=2µF, ON/OFF=0→V OUT(S)+1V
1.0 Over Shoot(V) 0.8 0.6 0.4 0.2 0.0 0 2 4 VDD(V) 6 8 10 VOUT=2V 3V 5V Over Shoot(V)
1.0 0.8 0.6 0.4 0.2 0.0 -50 0 °C Ta 50 100 VOUT=2 V 3V 5V
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LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(3) Power fluctuation
V IN =4→10V IOUT=30mA
10V
Rev.1.2
V IN =10→4V IOUT=30mA
10V
VIN CL=2µF CL=4.7µF
V IN V OUT(0.2V/div)
4V
VOUT(0.2V/div)
4V
V OU T
3V
VOUT
3V
CL=4.7µF
CL=2µF TIME(50usec/div) TIME(50usec/div)
Load dependence of overshoot
0.6 Over Shoot(V)
Output capacitor (CL) dependence of overshoot
0.05 Over Shoot(V) 0.04 VOUT=2V 0.03 0.02 0.01 0 5V 1 10 CL(uF) 100 3V
VIN =VOUT(S)+1V→VOUT(S)+2V,CL=2µF
VIN =VOUT(S)+1V→V OUT(S)+2V, IOUT=30mA
0.4 VOUT=2V 0.2 3V 5V 0 1.E-05 1.E-04 1.E-03 1.E-02 IOUT(A) 1.E-01 1.E+00
VDD dependence of overshoot
0.6 Over Shoot(V)
V IN=V OUT(S)+1V →VDD, IOUT=30mA,CL=2µF
Temperature dependence of overshoot
VIN=VOUT(S)+1V→VOUT(S)+2V, IOUT=30mA,CL=2µF 0.06 0.05 Over Shoot(V) 0.04 0.03 0.02 0.01 5V -50 0 50 100 VOUT=2V 3V
3V 0.4 VOUT=2V 0.2 5V
0 0 2 4 VDD(V) 6 8 10
0 °C Ta
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Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
Load dependence of undershoot Output capacitor (CL) dependence of undershoot
VIN =V OUT(S)+2V →VOUT(S)+1V ,IOUT=30mA
0.05 5V Under Shoot(V) 0.04 3V 0.03 0.02 0.01 0 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 1 IOUT(A) 10 CL(uF) 100 5V VOUT=2V
0.3 Under Shoot(V)
VIN =VOUT(S)+2V→VOUT(S)+1V,CL=2µF
0.2 VOUT=2V 3V
0.1
0 1.E-05
VDD dependence of undershoot
0.2 Under Shoot(V) 0.15 0.1 0.05 0 0 2 4 6 VDD(V) 8 10 VOUT=2V
Temperature dependence of undershoot
VIN=VOUT(S)+2V→VOUT(S)+1V, IOUT=30mA,CL=2µF 0.06 0.05 Under Shoot(V) 0.04 0.03 0.02 0.01 0 -50 0 Ta(°C) 50 100 5V
VIN =VDD→VOUT(S)+1V, IOUT=30mA,CL=2µF
5V 3V
3V
VOUT=2V
Seiko Instruments Inc.
17
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
(4) Load fluctuation
IOUT=10µA →30mA VIN =4V
30mA 30m A
Rev.1.2
IOUT=30mA→10µA VIN =4V
VOUT(0.2V/div)
VOUT(0.1V/div)
10µA
10µA
IOUT VOUT
3V
CL=2µF
IOUT
CL=2µF CL=4.7µF
3V
CL=4.7µF TIME(50µsec/div)
V OUT TIME(20msec/div)
Load current dependence of load fluctuation overshoot
∆IOUT shows larger load current at load current fluctuation while smaller current is fixed to 10 µA. For example ∆IOUT=1.E-02 (A) means load current fluctuation from 10 mA to 10 µA.
Output capacitor (CL) dependence of overshoot
0.2
1.0 Over Shoot(V) 0.8 0.6 0.4 0.2 0.0
VIN =VOUT(S)+1V,CL=2µF
5V Over Shoot(V)
VIN =V OUT(S)+1V ,IOUT=30mA →10µA
VOUT=2V 3V
0.15 0.1 0.05 0 5V
3V
VOUT=2V 1.E-02 1.E-01 1.E+00 1 10 CL(uF) 100
1.E-03
∆IOUT(A)
VDD dependence of overshoot
0.3 Over Shoot(V)
Temperature dependence of overshoot
VIN =VOUT(S)+1V ,IOUT=30mA→10µA,CL=2µF
0.3 0.25 Over Shoot(V)
VIN =VDD, IOUT=30mA →10µA ,CL=2µF
0.2
3V
0.2 0.15 0.1 0.05 0 VOUT=2V
3V
0.1 VOUT=2V 5V 0 0 2 4 VDD(V) 6 8 10
5V
-50
0
Ta(°C)
50
100
18
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR S-818 Series
∆IOUT shows larger load current at load current fluctuation while smaller current is fixed to 10 µA. For example ∆IOUT=1.E-02 (A) means load current fluctuation from 10 µA to 10 mA.
Load current dependence of load fluctuation undershoot
Output capacitor (CL) dependence of undershoot
0.4 Under Shoot(V) 0.3 3V 0.2 0.1 0
1.0 Under Shoot(V) 0.8 0.6 0.4 0.2
VIN =VOUT(S)+1V, CL=2µF
VIN =VOUT(S)+1V ,IOUT=10µA→30mA
3V
5V
VOUT=2V 0.0 1.E-03 1.E-02 ∆IOUT(A) 1.E-01 1.E+00 1
5V VOUT=2V 10 CL(uF) 100
VDD dependence of undershoot
0.4 Under Shoot(V) 0.3 0.2 VOUT=2V 0.1 0 0 2 4 6 VDD(V) 8 10 5V
Temperature dependence of undershoot
VIN =V OUT(S)+1V ,IOUT=10µA→30mA ,CL=2µF
0.5 Under Shoot(V) 0.4 0.3 0.2 0.1 0 -50 0 Ta(°C) 50 100 5V VOUT=2V 3V
V IN =VDD, IOUT=10µA→30mA,CL=2µF
3V
Seiko Instruments Inc.
19
SOT-23-5
Dimensions
2.9±0.2 1.9±0.2
5 4
MP005-A 991105
Unit
mm
0.45
1.6
2.8 -0.3
+0.1 -0.06
+0.2
1
2
3
0.16
1.1±0.1
1.3max
0.95
0.1 0.4±0.1
Taping Specifications
4.0±0.1 (10 pitches 40.0±0.2)
Reel Specifications
0.27±0.05
ø1.5 +0.1 -0
2.0±0.05
3000 pcs./reel
12.5max.
3 max.
3 max.
ø1.0
+0.1 -0
4.0±0.1
1.4±0.2
3.25±0.15
9.0±0.3 21±0.5 φ13±0.2 2±0.2
(60°) (60°)
Feed direction
SOT-89-5
Unit Dimensions
4.5±0.1 1.6±0.2 1.5±0.1
UP005-A 990531
mm
1
2
3
1.5±0.1 1.5±0.1
0.4±0.05
0.3 0.4±0.1 0.45±0.1 0.4±0.1
45
Taping Specifications
ø1.5 +0.1 -0 2.0±0.05 4.0±0.1(10 pitches 40±0.2)
Reel Specifications
1 reel holds 1000 ICs.
3 max.
5 max.
ø1.5 +0.1 -0
8.0±0.1
0.3±0.05 2.0±0.1
4.75±0.1
ø21±0.5
ø13±0.2
2±0.2
Feed direction
Markings
SOT-23-5
814
990603
5
4
1
3
SOT-89-5
5 4
1
2
3
• •
• •
The information herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or other diagrams described herein whose industrial properties, patents or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee any mass-production design. When the products described herein include Strategic Products (or Service) subject to regulations, they should not be exported without authorization from the appropriate governmental authorities. The products described herein cannot be used as part of any device or equipment which influences the human body, such as physical exercise equipment, medical equipment, security system, gas equipment, vehicle or airplane, without prior written permission of Seiko Instruments Inc.