S-8211DAG-I6T1G

Rev.4.5_00 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series The S-8211D Series are protection ICs for single-cell lithium-ion / lithium-polymer rechargeable batteries and include highaccuracy voltage detectors and delay circuits. These ICs are suitable for protecting single-cell rechargeable lithium-ion / lithium-polymer battery packs from overcharge, overdischarge, and overcurrent. Features (1) High-accuracy voltage detection circuit • Overcharge detection voltage Accuracy ±25 mV (+25 °C) Accuracy ±30 mV (−5 to +55 °C) • Overcharge release voltage 3.8 to 4.4 V*1 Accuracy ±50 mV • Overdischarge detection voltage 2.0 to 3.0 V (10 mV steps) Accuracy ±50 mV *2 Accuracy ±100 mV • Overdischarge release voltage 2.0 to 3.4 V • Discharge overcurrent detection voltage 0.05 to 0.30 V (10 mV steps) Accuracy ±15 mV • Load short-circuiting detection voltage 0.5 V (fixed) Accuracy ±200 mV Detection delay times are generated by an internal circuit (external capacitors are unnecessary). Accuracy ±20% High-withstanding-voltage device is used for charger connection pins (VM pin and CO pin : Absolute maximum rating = 28 V) 0 V battery charge function available / unavailable are selectable. Shutdown function yes / no are selectable. Wide operating temperature range −40 to +85 °C Low current consumption • Operation mode 3.0 µA typ., 5.5 µA max. (+25 °C) • Power-down mode 0.2 µA max. (+25 °C) Small package: SOT-23-5, SNT-6A Lead-free product 3.9 to 4.4 V (5 mV steps) (2) (3) (4) (5) (6) (7) (8) (9) *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 to 0.4 V in 50 mV steps.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 to 0.7 V in 100 mV steps.) Applications • Lithium-ion rechargeable battery packs • Lithium-polymer rechargeable battery packs Packages Package Name SOT-23-5 SNT-6A Drawing Code Package MP005-A PG006-A Tape MP005-A PG006-A Reel MP005-A PG006-A Land − PG006-A Seiko Instruments Inc. 1 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Block Diagram Output control circuit 0 V battery charge circuit or 0 V battery charge inhibition circuit Oscillator control circuit Rev.4.5_00 DO Divider control circuit VDD CO Charger detection circuit + − RVMD Discharge overcurrent detection comparator Overcharge detection comparator + − VM RVMS + − + − Load short-circuiting detection comparator Overdischarge detection comparator VSS Remark All diodes shown in figure are parasitic diodes. Figure 1 2 Seiko Instruments Inc. Rev.4.5_00 Product Name Structure 1. Product Name S-8211D xx xxxx G BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Package name (abbreviation) and IC packing specifications *1 M5T1 : SOT-23-5, Tape I6T1 : SNT-6A, Tape Serial code Sequentially set from AA to ZZ *1. Refer to the taping specifications. *2. Refer to the “2. Product Name List”. *2 Seiko Instruments Inc. 3 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series 2 Product Name List (1) SOT-23-5 Table 1 Overcharge Detection Voltage VCU 4.250 V 4.280 V 4.275 V 4.325 V 4.280 V 4.280 V 4.280 V 4.275 V Overcharge Over-discharge Over-discharge Release Detection Release Voltage Voltage Voltage VCL VDL VDU 4.050 V 4.180 V 4.175 V 4.075 V 4.080 V 4.080 V 4.080 V 4.075 V 2.60 V 2.50 V 2.30 V 2.50 V 3.00 V 2.30 V 2.80 V 2.50 V 2.90 V 2.70 V 2.40 V 2.90 V 3.00 V 2.30 V 2.80 V 2.90 V Discharge Overcurrent Detection Voltage VDIOV 0.12 V 0.19 V 0.10 V 0.15 V 0.08 V 0.13 V 0.10 V 0.15 V 0 V Battery Charge Function Unavailable Unavailable Available Unavailable Available Unavailable Available Unavailable Rev.4.5_00 Product Name / Item Delay Time Combination*1 (1) (1) (1) (1) (1) (1) (1) (1) Shutdown Function No Yes Yes Yes Yes Yes Yes Yes S-8211DAB-M5T1G S-8211DAE-M5T1G S-8211DAH-M5T1G S-8211DAI-M5T1G S-8211DAJ-M5T1G S-8211DAK-M5T1G S-8211DAL-M5T1G S-8211DAM-M5T1G *1. Refer to the Table 3 about the details of the delay time combinations (1). Remark Please contact our sales office for the products with detection voltage value other than those specified above. (2) SNT-6A Table 2 Overcharge Detection Voltage VCU 4.250 V 4.280 V 4.250 V 4.280 V Overcharge Over-discharge Over-discharge Release Detection Release Voltage Voltage Voltage VCL VDL VDU 4.050 V 4.180 V 4.050 V 4.080 V 2.60 V 2.50 V 2.40 V 2.30 V 2.90 V 2.70 V 2.90 V 2.30 V Discharge Overcurrent Detection Voltage VDIOV 0.12 V 0.19 V 0.10 V 0.08 V 0 V Battery Charge Function Unavailable Unavailable Available Available Delay Time Combination*1 (1) (1) (2) (1) Shutdown Function No Yes No No Product Name / Item S-8211DAB-I6T1G S-8211DAE-I6T1G S-8211DAF-I6T1G S-8211DAG-I6T1G *1. Refer to the Table 3 about the details of the delay time combinations (1) and (2). Remark Please contact our sales office for the products with detection voltage value other than those specified above. 4 Seiko Instruments Inc. Rev.4.5_00 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Table 3 Delay Time Combination (1) (2) Remark Overcharge Detection Delay Time tCU 1.2 s 1.2 s Overdischarge Detection Delay Time tDL 150 ms 75 ms Discharge Overcurrent Detection Delay Time tDIOV 9 ms 9 ms Load Short-circuiting Detection Delay Time tSHORT 300 µs 300 µs The delay times can be changed within the range listed Table 4. For details, please contact our sales office. Table 4 Delay Time Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time Remark Symbol tCU tDL tDIOV tSHORT Selection Range 143 ms 38 ms 4.5 ms − 573 ms 150 ms 9 ms 300 µs 1.2 s 300 ms 18 ms 560 µs Remark Select a value from the left. Select a value from the left. Select a value from the left. Select a value from the left. The value surrounded by bold lines is the delay time of the standard products. Seiko Instruments Inc. 5 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Pin Configurations SOT-23-5 Top view 5 4 Table 5 Pin No. 1 2 3 4 Symbol VM VDD VSS DO CO Rev.4.5_00 1 2 Figure 2 3 5 Description Voltage detection between VM pin and VSS pin (Overcurrent / charger detection pin) Connection for positive power supply input Connection for negative power supply input Connection of discharge control FET gate (CMOS output) Connection of charge control FET gate (CMOS output) SNT-6A Top v iew 1 2 3 6 5 4 Pin No. 1 Symbol NC*1 Table 6 Description No connection Connection of charge control FET gate 2 CO (CMOS output) Connection of discharge control FET gate 3 DO (CMOS output) 4 VSS Connection for negative power supply input 5 VDD Connection for positive power supply input Voltage detection between VM pin and VSS pin 6 VM (Overcurrent / charger detection pin) *1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. Figure 3 6 Seiko Instruments Inc. Rev.4.5_00 Absolute Maximum Ratings BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Table 7 (Ta = 25 °C unless otherwise specified) Item Input voltage between VDD pin and VSS pin VM pin input voltage DO pin output voltage CO pin output voltage Power dissipation SOT-23-5 Symbol VDS VVM VDO VCO PD Topr Applied pin VDD VM DO CO − − − − Absolute Maximum Ratings VSS − 0.3 to VSS + 12 VDD − 28 to VDD + 0.3 VSS − 0.3 to VDD + 0.3 VVM − 0.3 to VDD + 0.3 250 (When not mounted on board) 600*1 400*1 − 40 to + 85 − 55 to + 125 Unit V V V V mW mW mW °C °C SNT-6A Operating ambient temperature Storage temperature Tstg − *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 700 Power Dissipation (P D) [mW] 600 500 SOT-23-5 SNT-6A 400 300 200 100 0 0 100 150 50 Ambient Temperature ( Ta) [° C] Figure 4 Power Dissipation of Package (When Mounted on Board) Seiko Instruments Inc. 7 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Electrical Characteristics 1. Except Detection Delay Time (25 °C) Table 8 Rev.4.5_00 Item DETECTION VOLTAGE Overcharge detection voltage Symbol Condition (Ta = 25 °C unless otherwise specified) Test Test Min. Typ. Max. Unit CondiCircuit tion VCU −0.025 VCU −0.03 VCL −0.05 VCL −0.05 VDL −0.05 VDU −0.10 VDU −0.05 VCU VCU VCL VCL VDL VDU VDU VCU +0.025 VCU +0.03 VCL +0.05 VCL +0.025 VDL +0.05 VDU +0.10 VDU +0.05 VCU 3.90 to 4.40 V, Adjustable 3.90 to 4.40 V, Adjustable, *1 Ta = −5 to +55 °C 3.80 to 4.40 V, Adjustable VCL ≠ VCU VCL = VCU V V V V V V V V V V V V kΩ kΩ V V µA µA µA µA kΩ kΩ kΩ kΩ 1 1 1 1 2 2 2 3 3 4 10 11 5 5 − − 4 4 4 4 6 6 7 7 1 1 1 1 2 2 2 2 2 2 2 2 3 3 − − 2 2 2 2 4 4 4 4 Overcharge release voltage VCL Overdischarge detection voltage VDL 2.00 to 3.00 V, Adjustable VDU ≠ VDL VDU = VDL Overdischarge release voltage VDU 2.00 to 3.40 V, Adjustable Discharge overcurrent detection voltage Load short-circuiting detection voltage*2 Charger detection voltage 0 V BATTERY CHARGE FUNCTION 0 V battery charge starting charger voltage INTERNAL RESISTANCE Resistance between VM pin and VDD pin Resistance between VM pin and VSS pin [INPUT VOLTAGE] Operating voltage between VDD pin and VSS pin Operating voltage between VDD pin and VM pin VDIOV VSHORT VCHA V0CHA 0.05 to 0.30 V, Adjustable − − 0 V battery charging function “available” 0 V battery charging function “unavailable” VDD = 1.8 V, VVM = 0 V VDD = 3.5 V, VVM = 1.0 V − − VDD = 3.5 V, VVM = 0 V VDD = VVM = 1.5 V VDD = 3.5 V, VVM = 0 V VDD = VVM = 1.5 V VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V VDO = 0.5 V, VDD =VVM = 1.8 V VDIOV VDIOV VDIOV −0.015 +0.015 0.30 −1.0 1.2 − 100 10 1.5 1.5 1.0 − 1.0 0.3 2.5 2.5 2.5 2.5 0.50 −0.7 − − 300 20 − − 3.0 − 3.0 2.0 5 5 5 5 0.70 −0.4 − 0.5 900 40 8 28 5.5 0.2 5.5 3.5 10 10 10 10 0 V battery charge inhibition battery voltage V0INH RVMD RVMS VDSOP1 VDSOP2 INPUT CURRENT (Shutdown Function Yes) IOPE Current consumption during operation Current consumption at power-down IPDN INPUT CURRENT (Shutdown Function No) IOPE Current consumption during operation Current consumption during overdischarge OUTPUT RESISTANCE CO pin resistance “H” CO pin resistance “L” DO pin resistance “H” DO pin resistance “L” RCOH RCOL RDOH RDOL IOPED *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *2. In any conditions, Load short-circuiting detection voltage (VSHORT) is higher Discharge overcurrent detection voltage (VDIOV). 8 Seiko Instruments Inc. Rev.4.5_00 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series 2. Except Detection Delay Time (−40 to +85°C *1) Table 9 (−40 to +85°C Item DETECTION VOLTAGE Overcharge detection voltage VCU 3.90 to 4.40 V, Adjustable VCL ≠ VCU VCL = VCU VCU − 0.060 VCL − 0.08 VCL − 0.08 VDL − 0.11 VDU − 0.15 VDU − 0.11 VCU VCL VCL VDL VDU VDU VCU V + 0.040 VCL V + 0.065 VCL + 0.04 VDL + 0.13 VDU + 0.19 VDU + 0.13 V V V V 1 1 1 2 2 2 3 3 4 10 11 5 5 − − 4 4 4 4 6 6 7 7 1 1 1 2 2 2 2 2 2 2 2 3 3 − − 2 2 2 2 4 4 4 4 Symbol Condition Min. Typ. *1 unless otherwise specified) Test Test Max. Unit CondiCircuit tion Overcharge release voltage VCL 3.80 to 4.40 V, Adjustable Overdischarge detection voltage VDL 2.00 to 3.00 V, Adjustable VDU ≠ VDL VDU = VDL Overdischarge release voltage VDU 2.00 to 3.40 V, Adjustable Discharge overcurrent detection voltage Load short-circuiting detection voltage*2 Charger detection voltage 0 V BATTERY CHARGE FUNCTION 0 V battery charge starting charger voltage 0 V battery charge inhibition battery voltage INTERNAL RESISTANCE Resistance between VM pin and VDD pin Resistance between VM pin and VSS pin INPUT VOLTAGE VDIOV VSHORT VCHA V0CHA V0INH RVMD RVMS 0.05 to 0.30 V, Adjustable − − 0 V battery charging function “available” 0 V battery charging function “unavailable” VDD = 1.8 V, VVM = 0 V VDD = 3.5 V, VVM = 1.0 V − − VDD = 3.5 V, VVM = 0 V VDD = VVM = 1.5 V VDD = 3.5 V, VVM = 0 V VDD = VVM = 1.5 V VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V VDO = 0.5 V, VDD = VVM = 1.8 V VDIOV VDIOV VDIOV V − 0.021 + 0.024 0.16 −1.2 1.7 − 78 7.2 1.5 1.5 0.7 − 0.7 0.2 1.2 1.2 1.2 1.2 0.50 −0.7 − − 300 20 − − 3.0 − 3.0 2.0 5 5 5 5 0.84 −0.2 − 0.3 1310 44 8 28 6.0 0.3 6.0 3.8 15 15 15 15 V V V V kΩ kΩ V V µA µA µA µA kΩ kΩ kΩ kΩ Operating voltage between VDD pin and VSS pin VDSOP1 Operating voltage between VDD pin and VM pin VDSOP2 INPUT CURRENT (Shutdown Function Yes) IOPE Current consumption during operation Current consumption at power-down IPDN INPUT CURRENT (Shutdown Function No) IOPE Current consumption during operation Current consumption during overdischarge OUTPUT RESISTANCE CO pin resistance “H” CO pin resistance “L” DO pin resistance “H” DO pin resistance “L” RCOH RCOL RDOH RDOL IOPED *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *2. In any conditions, Load short-circuiting detection voltage (VSHORT) is higher Discharge overcurrent detection voltage (VDIOV). Seiko Instruments Inc. 9 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series 3. Detection Delay Time Rev.4.5_00 (1) S-8211DAB, S-8211DAE, S-8211DAG, S-8211DAH, S-8211DAI, S-8211DAJ, S-8211DAK, S-8211DAL, S-8211DAM Table 10 Item DELAY TIME (Ta = 25°C) Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time DELAY TIME (Ta = −40 to +85°C) *1 Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time tCU tDL tDIOV tSHORT − − − − 0.7 83 5 150 1.2 150 9 300 2.0 255 15 540 s ms ms µs 8 8 9 9 5 5 5 5 tCU tDL tDIOV tSHORT − − − − 0.96 120 7.2 240 1.2 150 9 300 1.4 180 11 360 s ms ms µs 8 8 9 9 5 5 5 5 Symbol Condition Min. Typ. Max. Test Test Unit CondiCircuit tion *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. (2) S-8211DAF Table 11 Item DELAY TIME (Ta = 25°C) Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time DELAY TIME (Ta = −40 to +85°C) *1 Overcharge detection delay time Overdischarge detection delay time Discharge overcurrent detection delay time Load short-circuiting detection delay time tCU tDL tDIOV tSHORT − − − − 0.7 41 5 150 1.2 75 9 300 2.0 128 15 540 s ms ms µs 8 8 9 9 5 5 5 5 tCU tDL tDIOV tSHORT − − − − 0.96 61 7.2 240 1.2 75 9 300 1.4 90 11 360 s ms ms µs 8 8 9 9 5 5 5 5 Symbol Condition Min. Typ. Max. Test Test Unit CondiCircuit tion *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. 10 Seiko Instruments Inc. Rev.4.5_00 Test Circuits BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. (1) Overcharge Detection Voltage, Overcharge Release Voltage (Test Condition 1, Test Circuit 1) Overcharge detection voltage (VCU) is defined as the voltage between the VDD pin and VSS pin at which VCO goes from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. Overcharge release voltage (VCL) is defined as the voltage between the VDD pin and VSS pin at which VCO goes from “L” to “H” when the voltage V1 is then gradually decreased. Overcharge hysteresis voltage (VHC) is defined as the difference between overcharge detection voltage (VCU) and overcharge release voltage (VCL). (2) Overdischarge Detection Voltage, Overdischarge Release Voltage (Test Condition 2, Test Circuit 2) Overdischarge detection voltage (VDL) is defined as the voltage between the VDD pin and VSS pin at which VDO goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V, V2 = 0 V. Overdischarge release voltage (VDU) is defined as the voltage between the VDD pin and VSS pin at which VDO goes from “L” to “H” when the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference between overdischarge release voltage (VDU) and overdischarge detection voltage (VDL). (3) Discharge Overcurrent Detection Voltage (Test Condition 3, Test Circuit 2) Discharge overcurrent detection voltage (VDIOV) is defined as the voltage between the VM pin and VSS pin whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of discharge overcurrent delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition of V1 = 3.5 V, V2 = 0 V. (4) Load Short-circuiting Detection Voltage (Test Condition 3, Test Circuit 2) Load short-circuiting detection voltage (VSHORT) is defined as the voltage between the VM pin and VSS pin whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of load short-circuiting delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition of V1 = 3.5 V, V2 = 0 V. (5) Operating Current Consumption (Test Condition 4, Test Circuit 2) The operating current consumption (IOPE) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = 3.5 V and V2 = 0 V (normal status). (6) Charger detection voltage (= the detection voltage for irregular charging current) (Test Condition 4, Test Circuit 2) The charger detection voltage (VCHA) is the voltage between the VM and VSS pin; when gradually increasing V1 at V1 = 1.8 V, V2 = 0 V to set V1 = VDL+(VHD/2), after that, decreasing V2 gradually from 0 V so that VDO goes “L” to “H”. Measurement of the charger detection voltage is available for the product with overdischarge hysteresis VHD ≠ 0 only. The detection voltage for irregular charging current is the voltage between the VM and VSS pin; when gradually decreasing V2 at V1 = 3.5 V, V2 = 0 V and VCO goes “H” to “L”. The value of the detection voltage for irregular charging current is equal to the charger detection voltage (VCHA). Seiko Instruments Inc. 11 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Rev.4.5_00 (7) Power-down Current Consumption, Overdischarge Current Consumption (Test Condition 4, Test Circuit 2) Shutdown function yes product The power-down current consumption (IPDN) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = V2 = 1.5 V (overdischarge status). Shutdown function no product The overdischarge current consumption (IOPED) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = V2 = 1.5 V (overdischarge status). (8) Resistance between VM Pin and VDD Pin (Test Condition 5, Test Circuit 3) The resistance between VM pin and VDD pin (RVMD) is the resistance between VM pin and VDD pin under the set conditions of V1 = 1.8 V, V2 = 0 V. (9) Resistance between VM Pin and VSS Pin (Test Condition 5, Test Circuit 3) The resistance between VM pin and VSS pin (RVMS) is the resistance between VM pin and VSS pin under the set conditions of V1 = 3.5 V, V2 = 1.0 V. (10) CO Pin Resistance “H” (Test Condition 6, Test Circuit 4) The CO pin resistance “H” (RCOH) is the resistance at the CO pin under the set conditions of V1 = 3.5 V, V2 = 0 V, V3 = 3.0 V. (11) CO Pin Resistance “L” (Test Condition 6, Test Circuit 4) The CO pin resistance “L” (RCOL) is the resistance at the CO pin under the set conditions of V1 = 4.5 V, V2 = 0 V, V3 = 0.5 V. (12) DO Pin Resistance “H” (Test Condition 7, Test Circuit 4) The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 = 3.5 V, V2 = 0 V, V4 = 3.0 V. (13) DO Pin Resistance “L” (Test Condition 7, Test Circuit 4) The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 = 1.8 V, V2 = 0 V, V4 = 0.5 V. (14) Overcharge Detection Delay Time (Test Condition 8, Test Circuit 5) The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage V1 momentarily increases (within 10 µs) from overcharge detection voltage (VCU) −0.2 V to overcharge detection voltage (VCU) +0.2 V under the set conditions of V2 = 0 V. (15) Overdischarge Detection Delay Time (Test Condition 8, Test Circuit 5) The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage V1 momentarily decreases (within 10 µs) from overcharge detection voltage (VDL) +0.2 V to overcharge detection voltage (VDL) −0.2 V under the set condition of V2 = 0 V. 12 Seiko Instruments Inc. Rev.4.5_00 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (16) Discharge Overcurrent Detection Delay Time (Test Condition 9, Test Circuit 5) Discharge overcurrent detection delay time (tDIOV) is the time needed for VDO to go to “L” after the voltage V2 momentarily increases (within 10 µs) from 0 V to 0.35 V under the set conditions of V1 = 3.5 V, V2 = 0 V. (17) Load Short-circuiting Detection Delay Time (Test Condition 9, Test Circuit 5) Load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to “L” after the voltage V2 momentarily increases (within 10 µs) from 0 V to 1.6 V under the set conditions of V1 = 3.5 V, V2 = 0 V. (18) 0 V Battery Charge Starting Charger Voltage (Products with 0 V Battery Charging Function Is “Available”) (Test Condition 10, Test Circuit 2) The 0 V charge starting charger voltage (V0CHA) is defined as the voltage between the VDD pin and VM pin at which VCO goes to “H” (VVM +0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = 0 V. (19) 0 V Battery Charge Inhibition Battery Voltage (Products with 0 V Battery Charging Function Is “Unavailable”) (Test Condition 11, Test Circuit 2) The 0 V charge inhibition charger voltage (V0INH) is defined as the voltage between the VDD pin and VSS pin at which VCO goes to “H” (VVM +0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 = 0 V, V2 = −4 V. Seiko Instruments Inc. 13 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series R1 = 220 Ω V1 VSS DO CO Rev.4.5_00 VDD S-8211D Series VM IDD A V1 VDD S-8211D Series VSS DO CO VM V VDO COM V VCO COM V VDO V VCO V2 Figure 5 Test Circuit 1 Figure 6 Test Circuit 2 IDD A V1 VDD S-8211D Series VSS DO CO VM A IVM V2 V1 VDD S-8211D Series VSS DO A IDO V4 CO A ICO V3 VM V2 COM COM Figure 7 Test Circuit 3 Figure 8 Test Circuit 4 VDD V1 VSS DO CO S-8211D Series VM Oscilloscope COM Oscilloscope V2 Figure 9 Test Circuit 5 14 Seiko Instruments Inc. Rev.4.5_00 Operation BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Remark Refer to the “Battery Protection IC Connection Example”. 1. Normal Status This IC monitors the voltage of the battery connected between the VDD pin and VSS pin and the voltage difference between the VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from overdischarge detection voltage (VDL) to overcharge detection voltage (VCU), and the VM pin voltage is not more than the discharge overcurrent detection voltage (VDIOV), the IC turns both the charging and discharging control FETs on. This condition is called the normal status, and in this condition charging and discharging can be carried out freely. The resistance (RVMD) between the VM pin and VDD pin, and the resistance (RVMS) between the VM pin and VSS pin are not connected in the normal status. Caution When the battery is connected for the first time, discharging may not be enabled. In this case, short the VM pin and VSS pin or connect the charger to restore the normal status. 2. Overcharge Status When the battery voltage becomes higher than overcharge detection voltage (VCU) during charging in the normal status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8211D Series turns the charging control FET off to stop charging. This condition is called the overcharge status. The resistance (RVMD) between the VM pin and VDD pin, and the resistance (RVMS) between the VM pin and VSS pin are not connected in the overcharge status. The overcharge status is released in the following two cases ( (1) and (2) ). (1) In the case that the VM pin voltage is higher than or equal to charger detection voltage (VCHA), and is lower than the discharge overcurrent detection voltage (VDIOV), S-8211D Series releases the overcharge status when the battery voltage falls below the overcharge release voltage (VCL). (2) In the case that the VM pin voltage is higher than or equal to the discharge overcurrent detection voltage (VDIOV), S-8211D Series releases the overcharge status when the battery voltage falls below the overcharge detection voltage (VCU). When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises more than the voltage at VSS pin due to the Vf voltage of the parasitic diode. This is because the discharge current flows through the parasitic diode in the charging control FET. If this VM pin voltage is higher than or equal to the discharge overcurrent detection voltage (VDIOV), S-8211D Series releases the overcharge status when the battery voltage is lower than or equal to the overcharge detection voltage (VCU). Cautions 1. If the battery is charged to a voltage higher than overcharge detection voltage (VCU) and the battery voltage does not fall below overcharge detection voltage (VCU) even when a heavy load is connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below overcharge detection voltage (VCU). Since an actual battery has an internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load shortcircuiting detection function. 2. When a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below overcharge release voltage (VCL). The overcharge status is released when the VM pin voltage goes over charger detection voltage (VCHA) by removing the charger. Seiko Instruments Inc. 15 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series 3. Overdischarge Status Rev.4.5_00 With shutdown function When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8211D Series turns the discharging control FET off to stop discharging. This condition is called the overdischarge status. Under the overdischarge status, the VM pin voltage is pulled up by the resistor between the VM pin and VDD pin in the IC (RVMD). When voltage difference between the VM pin and VDD pin then is 1.3 V (Typ.) or lower, the current consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down status. The resistance (RVMS) between the VM pin and VSS pin is not connected in the power-down status and the overdischarge status. The power-down status is released when a charger is connected and the voltage difference between the VM pin and VDD pin becomes 1.3 V (typ.) or higher. When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status and turns the discharging FET on when the battery voltage reaches overdischarge detection voltage (VDL) or higher. When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status when the battery voltage reaches overdischarge release voltage (VDU) or higher. Without shutdown function When the battery voltage falls below overdischarge detection voltage (VDL) during discharging in the normal status and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8211D Series turns the discharging control FET off to stop discharging. This condition is called the overdischarge status. Under the overdischarge status, the VM pin voltage is pulled up by the resistor between the VM pin and VDD pin in the IC (RVMD). The resistance (RVMS) between the VM pin and VSS pin is not connected in the overdischarge status. When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status and turns the discharging FET on when the battery voltage reaches overdischarge detection voltage (VDL) or higher. When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not lower than charger detection voltage (VCHA), the S-8211D Series releases the overdischarge status when the battery voltage reaches overdischarge release voltage (VDU) or higher. 4. Discharge Overcurrent Status (Discharge Overcurrent, Load Short-circuiting) When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the discharge overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for the discharge overcurrent detection delay time, the discharge control FET is turned off and discharging is stopped. This status is called the discharge overcurrent status. In the discharge overcurrent status, the VM pin and VSS pin are shorted by the resistor between VM pin and VSS pin (RVMS) in the IC. However, the voltage of the VM pin is at the VDD potential due to the load as long as the load is connected. When the load is disconnected, the VM pin returns to the VSS potential. This IC detects the status when the impedance between the EB+ pin and EB− pin (Refer to the Figure 13) increases and is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to discharge overcurrent detection voltage (VDIOV) or lower, the discharge overcurrent status is restored to the normal status. Even if the connected impedance is smaller than automatic restoration level, the S-8211D Series will be restored to the normal status from discharge overcurrent detection status when the voltage at the VM pin becomes the discharge overcurrent detection voltage (VDIOV) or lower by connecting the charger. The resistance (RVMD) between the VM pin and VDD pin is not connected in the discharge overcurrent detection status. 16 Seiko Instruments Inc. Rev.4.5_00 5. Detection for irregular charging current BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series During charging a battery which is in the normal status, if the VM pin voltage becomes lower than the charger detection voltage (VCHA) and this status is held longer than the overcharge detection delay time (tCU), S-8211D turns off the charge-control FET to stop charging. This is detection for irregular charging current. This function works in the case that the DO pin voltage is in “H”, and the VM pin voltage becomes lower than the charger detection voltage (VCHA). Thus if the irregular charger current flows in the battery in the overdischarge status, S-8211D turns off the charge-control FET to stop charging; the DO pin voltage goes in “H” so that the battery voltage becomes higher than the overdischarge detection voltage, and after the overcharge detection delay time (tcu). The status irregular charging current detection is released by the lower potential difference between the VM and VSS pin than the charger detection voltage (VCHA). 6. 0 V Battery Charging Function “Available” This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by connecting a charger, the charging control FET gate is fixed to the VDD pin voltage. When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turnon voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than overdischarge release voltage (VDU), the S8211D Series enters the normal status. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charging function. 7. 0 V Battery Charging Function “Unavailable” This function inhibits recharging when a battery that is internally short-circuited (0 V battery) is connected. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET gate is fixed to the EB− pin voltage to inhibit charging. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or higher, charging can be performed. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charging function. Seiko Instruments Inc. 17 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series 9. Delay Circuit The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter. Rev.4.5_00 Remark1. The discharge overcurrent detection delay time (tDIOV) and the load short-circuiting detection delay time (tSHORT) start when the discharge overcurrent detection voltage (VDIOV) is detected. When the load shortcircuiting detection voltage (VSHORT) is detected over the load short-circuiting detection delay time (tSHORT) after the detection of discharge overcurrent detection voltage (VDIOV), the S-8211D turns the discharging control FET off within tSHORT from the time of detecting VSHORT. VDD DO Pin tD VSS Load short-circuiting detection delay time (tSHORT) VDD VSHORT VM Pin VDIOV VSS Time 0 ≤ tD ≤ tSHORT Time Figure 10 2. With shutdown function When any overcurrent is detected and the overcurrent continues for longer than the overdischarge detection delay time (tDL) without the load being released, the status changes to the power-down status at the point where the battery voltage falls below overdischarge detection voltage (VDL). When the battery voltage falls below overdischarge detection voltage (VDL) due to overcurrent, the S8211D Series turns the discharging control FET off via overcurrent detection. In this case, if the recovery of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time is still lower than the overdischarge detection voltage, S-8211D Series shifts to the power-down status. Without shutdown function When any overcurrent is detected and the overcurrent continues for longer than the overdischarge detection delay time (tDL) without the load being released, the status changes to the overdischarge status at the point where the battery voltage falls below overdischarge detection voltage (VDL). When the battery voltage falls below overdischarge detection voltage (VDL) due to overcurrent, the S8211D Series turns the discharging control FET off via overcurrent detection. In this case, if the recovery of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time is still lower than the overdischarge detection voltage, S-8211D Series shifts to the overdischarge status. 18 Seiko Instruments Inc. Rev.4.5_00 Timing Chart BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (1) Overcharge Detection, Overdischarge Detection VCU VCL (VCU − VHC) Battery voltage VDU (VDL + VHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VEB− VDD VM pin voltage VDIOV VSS VEB− Charger connection Load connection Overcharge detection delay time (tCU) Mode*1 (1) (2) Overdischarge detection delay time (tDL) (1) (3) (1) *1. (1) : Normal mode (2) : Overcharge mode (3) : Overdischarge mode Remark The charger is assumed to charge with a constant current. Figure 11 Seiko Instruments Inc. 19 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (2) Discharge Overcurrent Detection Rev.4.5_00 VCU VCL ( VCU − VHC) B attery voltage VDU ( VDL + VHD) VDL VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VSHORT VDIOV VSS Load connection Discharge overcurrent detection delay time (tDIOV) *1 Load short-circuiting detection delay time (tSHORT) (1) (2) (1) (1) (2) Mode *1. (1) : Normal mode (2) : Discharge overcurrent mode Remark The charger is assumed to charge with a constant current. Figure 12 20 Seiko Instruments Inc. Rev.4.5_00 (3) Charger Detection VCU VCL (VCU − VHC) Battery voltage VDU (VDL + VHD) VDL BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VSS VCHA Charger connection Load connection Overdischarge detection delay time (tDL) *1 In case VM pin voltage < VCHA Overdischarge is released at the overdischarge detection voltage (V DL) (1) (2) (1) Mode *1. (1) : Normal mode (2) : Overdischarge mode Remark The charger is assumed to charge with a constant current. Figure 13 Seiko Instruments Inc. 21 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (4) Detection for irregular charging current VCU VCL (VCU − VHC ) Battery voltage VDU (VDL + VHD ) VDL Rev.4.5_00 VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VSS VCHA Charger connection Load connection Overdischarge detection delay time (tDL) Mode *1 Abnormal charging current detection delay time ( = Overcharge detection delay time (tCU)) (2) (1) (3) (1) (1) *1. (1) : Normal mode (2) : Overdischarge mode (3) : Overcharge mode Remark The charger is assumed to charge with a constant current. Figure 14 22 Seiko Instruments Inc. Rev.4.5_00 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Battery Protection IC Connection Example R1 VDD Battery C1 S-8211D Series EB+ VSS DO CO VM R2 EB− FET1 FET2 Figure 15 Table 12 Constants for External Components Symbol FET1 Part N-channel MOS FET Purpose Discharge control Typ.  Min.  Max.  Remark Threshold voltage ≤ Overdischarge detection *1 voltage Gate to source withstanding voltage ≥ *2 Charger voltage Threshold voltage ≤ Overdischarge detection voltage *1 Gate to source withstanding voltage ≥ *2 Charger voltage Resistance should be as small as possible to avoid lowering the overcharge detection accuracy due to current consumption. *3 Connect a capacitor of 0.022 µF or higher between VDD pin and VSS pin. *4 Select as large a resistance as possible to prevent current when a charger is connected in reverse. *5 FET2 N-channel MOS FET Charge control    R1 C1 R2 Resistor Capacitor Resistor ESD protection, For power fluctuation For power fluctuation Protection for reverse connection of a charger 220 Ω 0.1 µF 2 kΩ 100 Ω 0.022 µF 300 Ω 330 Ω 1.0 µF 4 kΩ *1. If the threshold voltage of an FET is low, the FET may not cut the charging current. If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stopped before overdischarge is detected. *2. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may be destroyed. *3. If R1 has a high resistance, the voltage between VDD pin and VSS pin may exceed the absolute maximum rating when a charger is connected in reverse since the current flows from the charger to the IC. Insert a resistor of 100 Ω or higher as R1 for ESD protection. *4. If a capacitor of less than 0.022 µF is connected to C1, DO pin may oscillate when load short-circuiting is detected. Be sure to connect a capacitor of 0.022 µF or higher to C1. *5. If R2 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-voltage charger is connected. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. Seiko Instruments Inc. 23 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Precautions Rev.4.5_00 • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 24 Seiko Instruments Inc. Rev.4.5_00 Characteristics (Typical Data) 1. Current Consumption (1) IOPE vs. Ta BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (2) IPDN vs. Ta 6 IOPE [µA] IPDN [µA] 5 4 3 2 1 0 −40 −25 0 25 Ta [°C] 50 75 85 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 −40 −25 0 25 Ta [°C] 50 7585 (3) IOPE vs. VDD 6 5 4 3 2 1 0 IOPE [µA] 0 2 4 VDD [V] 6 8 2. Overcharge Detection / Release Voltage, Overdischarge Detection / Release Voltage, Overcurrent Detection Voltage, and Delay Time (1) VCU vs. Ta (2) VCL vs. Ta 4.350 4.345 4.340 4.335 4.330 4.325 4.320 4.315 4.310 4.305 4.300 −40 −25 0 25 Ta [°C] 50 75 85 4.125 4.115 4.105 4.095 4.085 4.075 4.065 4.055 4.045 4.035 4.025 −40 −25 VCU [V] VCL [V] 0 25 Ta [°C] 50 75 85 (3) VDU vs. Ta 2.95 2.94 2.93 2.92 2.91 2.90 2.89 2.88 2.87 2.86 2.85 −40 −25 (4) VDL vs. Ta 0 25 50 Ta [°C] 75 85 2.60 2.58 2.56 2.54 2.52 2.50 2.48 2.46 2.44 2.42 2.40 −40 −25 VDU [V] VDL [V] 0 25 Ta [°C] 50 75 85 Seiko Instruments Inc. 25 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Rev.4.5_00 (5) tCU vs. Ta (6) tCL vs. Ta 1.50 1.45 1.40 1.35 1.30 1.25 1.20 1.15 1.10 1.05 1.00 −40 −25 0 25 Ta [°C] 50 7585 50 48 46 44 42 40 38 36 34 32 30 −40 −25 tCU [s] tCL [s] 0 25 Ta [°C] 50 7585 (7) tDU vs. Ta 2.85 2.75 2.65 2.55 2.45 2.35 2.25 2.15 2.05 1.95 1.85 −40 −25 (8) tDL vs. Ta 0 25 Ta [°C] 50 7585 200 190 180 170 160 150 140 130 120 110 100 −40 −25 tDU [ms] tDL [ms] 0 25 Ta [°C] 50 7585 (9) VDIOV vs. Ta 0.175 0.170 0.165 0.160 0.155 0.150 0.145 0.140 0.135 0.130 0.125 −40 −25 (10) tDIOV vs. VDD 0 25 Ta [°C] 50 75 85 14 13 12 11 10 9 8 7 6 5 4 3.0 VDIOV [V] tDIOV [ms] 3.5 VDD [V] 4.0 4.5 (11) tDIOV vs. Ta 14 13 12 11 10 9 8 7 6 5 4 −40 −25 tDIOV [ms] 0 25 Ta [°C] 50 75 85 26 Seiko Instruments Inc. Rev.4.5_00 (12) VSHORT vs. Ta BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series (13) tSHORT vs. VDD 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 −40 −25 0 25 50 Ta [°C] 7585 0.65 0.63 0.61 0.59 0.57 0.55 0.53 0.51 0.49 0.47 0.45 3.0 tSHORT [ms] VSHORT [V] 3.5 VDD [V] 4.0 4.5 (14) tSHORT vs. Ta 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −40 −25 tSHORT [ms] 0 25 50 Ta [°C] 7585 3. CO pin / DO pin (1) ICOH vs. VCO 0 (2) ICOL vs. VCO 0.5 0.4 0.3 0.2 0.1 −0.1 ICOH [mA] −0.2 −0.3 −0.4 −0.5 0 1 2 VCO [V] (3) IDOH vs. VDO ICOL [mA] 3 4 0 0 1 2 VCO [V] 3 4 IDOH [mA] −0.15 −0.20 −0.25 −0.30 0 1 2 VDO [V] 3 4 IDOL [mA] 0 −0.05 −0.10 (4) IDOL vs. VDO 0.20 0.15 0.10 0.05 0 0 0.5 1.0 VDO [V] 1.5 Seiko Instruments Inc. 27 BATTERY PROTECTION IC FOR 1-CELL PACK S-8211D Series Marking Specifications (1) SOT-23-5 SOT-23-5 Top view Rev.4.5_00 5 4 (1) to (3): (4) : Product Code (refer to Product Name vs. Product Code) Lot number (1) (2) (3) (4) 1 2 3 Product Name vs. Product Code Product Name Product Code (1) (2) (3) S-8211DAB-M5T1G R 2 B S-8211DAE-M5T1G R 2 E S-8211DAH-M5T1G R 2 H S-8211DAI-M5T1G R 2 I S-8211DAJ-M5T1G R 2 J S-8211DAK-M5T1G R 2 K S-8211DAL-M5T1G R 2 L S-8211DAM-M5T1G R 2 M Remark Please contact our sales office for the products other than those specified above. (2) SNT-6A SNT-6A Top view 1 (4) (5) (6) (1) (2) (3) 6 5 4 (1) to (3): (4) to (6): Product Code (refer to Product Name vs. Product Code) Lot number 2 3 Product Name vs. Product Code Product Code (1) (2) (3) S-8211DAB-I6T1G R 2 B S-8211DAE-I6T1G R 2 E S-8211DAF-I6T1G R 2 F S-8211DAG-I6T1G R 2 G Remark Please contact our sales office for the products other than those specified above. Product Name 28 Seiko Instruments Inc. 2.9±0.2 1.9±0.2 5 4 1 2 3 0.16 -0.06 +0.1 0.95±0.1 0.4±0.1 No. MP005-A-P-SD-1.2 TITLE No. SCALE UNIT SOT235-A-PKG Dimensions MP005-A-P-SD-1.2 mm Seiko Instruments Inc. 4.0±0.1(10 pitches:40.0±0.2) +0.1 ø1.5 -0 2.0±0.05 0.25±0.1 ø1.0 -0 +0.2 4.0±0.1 1.4±0.2 3.2±0.2 321 4 5 Feed direction No. MP005-A-C-SD-2.1 TITLE No. SCALE UNIT SOT235-A-Carrier Tape MP005-A-C-SD-2.1 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. MP005-A-R-SD-1.1 TITLE No. SCALE UNIT mm SOT235-A-Reel MP005-A-R-SD-1.1 QTY. 3,000 Seiko Instruments Inc. 1.57±0.03 6 5 4 1 2 3 +0.05 0.08 -0.02 0.48±0.02 0.5 0.2±0.05 No. PG006-A-P-SD-2.0 TITLE No. SCALE UNIT SNT-6A-A-PKG Dimensions PG006-A-P-SD-2.0 mm Seiko Instruments Inc. ø1.5 -0 +0.1 2.0±0.05 4.0±0.1 0.25±0.05 1.85±0.05 5° ø0.5 -0 +0.1 4.0±0.1 0.65±0.05 321 4 56 Feed direction No. PG006-A-C-SD-1.0 TITLE No. SCALE UNIT SNT-6A-A-Carrier Tape PG006-A-C-SD-1.0 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. PG006-A-R-SD-1.0 TITLE No. SCALE UNIT mm SNT-6A-A-Reel PG006-A-R-SD-1.0 QTY. 5,000 Seiko Instruments Inc. 0.52 1.36 0.52 0.3 0.2 0.3 0.2 0.3 Caution Making the wire pattern under the package is possible. However, note that the package may be upraised due to the thickness made by the silk screen printing and of a solder resist on the pattern because this package does not have the standoff. No. PG006-A-L-SD-3.0 TITLE No. SCALE UNIT SNT-6A-A-Land Recommendation PG006-A-L-SD-3.0 mm Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.