S-8242BAU-I8T1G

Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series The S-8242B Series are protection ICs for 2-serial-cell lithium-ion/lithium polymer rechargeable batteries and include high-accuracy voltage detectors and delay circuits. These ICs are suitable for protecting 2-cell rechargeable lithium-ion / lithium polymer battery packs from overcharge, overdischarge, and overcurrent. Features High-accuracy voltage detection for each cell • Overcharge detection voltage n (n = 1, 2) 3.9 V to 4.5 V (50 mV steps) Accuracy ±25 mV • Overcharge release voltage n (n = 1, 2) 3.8 V to 4.5 V*1 Accuracy ±50 mV • Overdischarge detection voltage n (n = 1, 2) 2.0 V to 3.0 V (100 mV steps) Accuracy ±50 mV *2 Accuracy ±100 mV • Overdischarge release voltage n (n = 1, 2) 2.0 V to 3.4 V *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (Overcharge hysteresis voltage n (n = 1, 2) can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV steps.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (Overdischarge hysteresis voltage n (n = 1, 2) can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV steps.) (2) Two-level overcurrent detection (overcurrent 1, overcurrent 2) • Overcurrent detection voltage 1 0.05 V, 0.08 V to 0.30 V (10 mV steps) Accuracy ±15 mV • Overcurrent detection voltage 2 1.2 V (fixed) Accuracy ±300 mV (3) Delay times (overcharge, overdischarge, overcurrent) are generated by an internal circuit (external capacitors are unnecessary). (4) 0 V battery charge function available/unavailable are selectable. (5) Charger detection function • The overdischarge hysteresis is released by detecting negative voltage at the VM pin (−0.7 V typ.) (Charger detection function). (6) High-withstanding-voltage devices Absolute maximum rating: 28 V (7) Wide operating temperature range −40°C to +85 °C (8) Low current consumption Operation mode 10 µA max. (+25°C) Power-down mode 0.1 µA max. (+25°C) (9) Small package SNT-8A, 8-Pin TSSOP (10) Lead-free products (1) Applications • Lithium-ion rechargeable battery packs • Lithium polymer rechargeable battery packs Packages Package Name SNT-8A 8-Pin TSSOP Package PH008-A FT008-A Drawing Code Tape Reel PH008-A PH008-A FT008-E FT008-E Land PH008-A  Seiko Instruments Inc. 1 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Block Diagram Rev.1.4_00 DO Delay circuit, controller, 0 V battery charge/ charge inhibition circuit − + + − VDD CO + − + − VC − + + − 300 kΩ VM 10 kΩ Charger detector VSS Remark All the diodes in the figure are parasitic diodes. Figure 1 2 Seiko Instruments Inc. Rev.1.4_00 Product Name Structure 1. Product Name S-8242B xx xxxx BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series G Package name (abbreviation) and IC packing specifications *1 I8T1: SNT-8A, Tape T8T1: 8-Pin TSSOP, Tape Serial code Sequentially set from AA to ZZ *1. Refer to the taping drawing. 2. Product Name List (1) SNT-8A Package Table 1 Overcharge Detection Voltage (VCU) 4.325 V 4.350 V 4.430 V 4.300 V 4.300 V 4.350 V 4.350 V 4.350 V 4.300 V 4.300 V 4.350 V 4.350 V 4.300 V 4.210 V 4.190 V 4.350 V 4.270 V Overcharge Release Voltage (VCL) 4.075 V 4.350 V 4.200 V 4.100 V 4.100 V 4.150 V 4.150 V 4.150 V 4.100 V 4.100 V 4.150 V 4.150 V 4.100 V 4.210 V 4.190 V 4.150 V 4.070 V Overdischarge Detection Voltage (VDL) 2.2 V 2.3 V 2.3 V 2.4 V 2.6 V 2.3 V 2.3 V 2.3 V 2.6 V 2.4 V 2.2 V 2.2 V 2.4 V 2.0 V 2.3 V 3.0 V 2.3 V Overdischarge Release Voltage (VDU) 2.9 V 2.9 V 2.9 V 3.0 V 3.0 V 2.9 V 2.9 V 2.9 V 3.0 V 3.0 V 2.9 V 2.9 V 3.0 V 2.0 V 2.9 V 3.4 V 2.3 V Overcurrent Detection Voltage 1 (VIOV1) 0.21 V 0.08 V 0.08 V 0.20 V 0.28 V 0.25 V 0.10 V 0.20 V 0.21 V 0.28 V 0.20 V 0.25 V 0.21 V 0.20 V 0.10 V 0.25 V 0.20 V 0 V Battery Charge Unavailable Available Available Unavailable Unavailable Unavailable Available Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable Available Unavailable Available Product Name / Item S-8242BAB-I8T1G S-8242BAD-I8T1G S-8242BAE-I8T1G S-8242BAH-I8T1G S-8242BAM-I8T1G S-8242BAN-I8T1G S-8242BAO-I8T1G S-8242BAQ-I8T1G S-8242BAR-I8T1G S-8242BAU-I8T1G S-8242BAV-I8T1G S-8242BAW-I8T1G S-8242BAX-I8T1G S-8242BAY-I8T1G S-8242BAZ-I8T1G S-8242BBA-I8T1G S-8242BBB-I8T1G Remark Please contact our sales office for the products with detection voltage value other than those specified above. (2) 8-Pin TSSOP Package Table 2 Overcharge Detection Voltage (VCU) 4.350 V 4.300 V 4.250 V 4.100 V 4.300 V Overcharge Release Voltage (VCL) 4.150 V 4.100 V 4.050 V 3.800 V 4.100 V Overdischarge Detection Voltage (VDL) 2.3 V 2.4 V 2.4 V 2.2 V 2.6 V Overdischarge Release Voltage (VDU) 3.0 V 3.0 V 3.0 V 2.4 V 3.0 V Overcurrent Detection Voltage 1 (VIOV1) 0.30 V 0.20 V 0.15 V 0.30 V 0.21 V 0 V Battery Charge Available Unavailable Available Unavailable Unavailable Product Name / Item S-8242BAC-T8T1G S-8242BAH-T8T1G S-8242BAI-T8T1G S-8242BAP-T8T1G S-8242BAR-T8T1G Remark Please contact our sales office for the products with detection voltage value other than those specified above. Seiko Instruments Inc. 3 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Pin Configurations Table 3 SNT-8A Top view 1 2 3 4 8 7 6 5 Rev.1.4_00 Pin No. 1 Symbol CO Description Figure 2 Connection of charge control FET gate (CMOS output) Connection of discharge control FET gate 2 DO (CMOS output) NC*1 3 No connection Connection for negative power supply input 4 VSS and negative voltage of battery 2 Connection for negative voltage of battery 1 5 VC and positive voltage of battery 2 Connection for positive power supply input 6 VDD and positive voltage of battery 1 NC*1 7 No connection Voltage detection between VM and VSS 8 VM (overcurrent/charger detection pin) *1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. Remark For the external views, refer to the package drawings. Table 4 8-Pin TSSOP Top view 1 2 3 4 8 7 6 5 Pin No. 1 Symbol CO Description Figure 3 Connection of charge control FET gate (CMOS output) Connection of discharge control FET gate 2 DO (CMOS output) NC*1 3 No connection Connection for negative power supply input 4 VSS and negative voltage of battery 2 Connection for negative voltage of battery 1 5 VC and positive voltage of battery 2 Connection for positive power supply input 6 VDD and positive voltage of battery 1 NC*1 7 No connection Voltage detection between VM and VSS 8 VM (overcurrent/charger detection pin) *1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS. Remark For the external views, refer to the package drawings. 4 Seiko Instruments Inc. Rev.1.4_00 Absolute Maximum Ratings BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Table 5 (Ta=25°C unless otherwise specified) Item Input voltage between VDD and VSS VC input pin voltage VM pin input voltage DO pin output voltage CO pin output voltage SNT-8A Power dissipation 8-Pin TSSOP Operating ambient temperature Storage temperature Symbol VDS VVC VVM VDO VCO PD Topr Tstg Applied pin VDD VC VM DO CO    Absolute Maximum Ratings VSS−0.3 to VSS+12 VSS−0.3 to VDD+0.3 VDD−28 to VDD+0.3 VSS−0.3 to VDD+0.3 VVM−0.3 to VDD+0.3 450*1 700*1 −40 to +85 −55 to +125 Unit V V V V V mW mW °C °C *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 800 Power Dissipation (PD) [mW] 600 8-Pin TSSOP 400 200 SNT-8A 100 150 50 Ambient Temperature (Ta) [°C] 0 0 Figure 4 Power Dissipation of Package (When mounted on board) Seiko Instruments Inc. 5 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Electrical Characteristics Table 6 Rev.1.4_00 (Ta=25°C unless otherwise specified) Item [DETECTION VOLTAGE] Overcharge detection voltage n Overcharge release voltage n Overdischarge detection voltage n Overdischarge release voltage n Overcurrent detection voltage 1 VCUn VCLn VDLn VDUn VIOV1 3.90 to 4.50 V, Adjustable 3.80 to 4.50 V, Adjustable 2.0 to 3.0 V, Adjustable 2.0 to 3.40 V, Adjustable 0.05 to 0.30 V, Adjustable VCUn –0.025 VCLn –0.05 VDLn –0.05 VDUn –0.10 VIOV1 –0.015 0.9 –1.0 –1.0 –0.5 0.92 115 7.2 220 1.2  100 5 1.5 1.5   –0.3 2 2 2 2 VCUn VCLn VDLn VDUn VIOV1 1.2 –0.7 0 0 1.15 144 9 300   300 10   5  0 4 4 4 4 VCUn +0.025 VCLn +0.05 VDLn +0.05 VDUn +0.10 VIOV1 +0.015 1.5 –0.4 1.0 0.5 1.38 173 11 380  0.5 900 20 10 28 10 0.1 0.3 8 8 8 8 V V V V V V V mV/°C mV/°C s ms ms µs V V kΩ kΩ V V µA µA µA kΩ kΩ kΩ kΩ 1 1 2 2 3 3 4   9 9 10 10 11 12 6 6   5 5 5 7 7 8 8 1 1 2 2 2 2 2   2 2 2 2 2 2 3 3   3 3 3 4 4 4 4 Symbol Condition Min. Typ. Max. Unit Test condition Test circuit Overcurrent detection voltage 2 VIOV2  Charger detection voltage VCHA  *1 Temperature coefficient 1 TCOE1 Ta=0 to 50°C *2 Temperature coefficient 2 TCOE2 Ta=0 to 50°C [DELAY TIME] Overcharge detection delay time tCU  Overdischarge detection delay time tDL  Overcurrent detection delay time 1 tIOV1  Overcurrent detection delay time 2 tIOV2 FET gate capacitance =2000 pF [0 V BATTERY CHARGE FUNCTION] 0 V charge starting charger voltage V0CHA 0 V charge available 0 V battery charge inhibition battery voltage V0INH 0 V charge unavailable [INTERNAL RESISTANCE] Resistance between VM and VDD RVMD V1=V2=1.5 V, VVM=0 V Resistance between VM and VSS RVMS V1=V2=3.5 V, VVM=1.0 V [INPUT VOLTAGE] Operating voltage between VDD and VSS VDSOP1 Internal circuit operating voltage Operating voltage between VDD and VM VDSOP2 Internal circuit operating voltage [INPUT CURRENT] Current consumption during operation IOPE V1=V2=3.5 V, VVM=0 V Current consumption at power down IPDN V1=V2=1.5 V, VVM=3.0 V VC pin current IVC V1=V2=3.5 V, VVM=0 V [OUTPUT RESISTANCE] CO pin H resistance RCOH VCO=VDD–0.5 V CO pin L resistance RCOL VCO=VVM+0.5 V DO pin H resistance RDOH VDO=VDD–0.5 V DO pin L resistance RDOL VDO=VSS +0.5 V *1. Voltage temperature coefficient 1: Overcharge detection voltage *2. Voltage temperature coefficient 2: Overcurrent detection voltage 1 6 Seiko Instruments Inc. Rev.1.4_00 Test Circuits BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Caution Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. 1. Overcharge Detection Voltage, Overcharge Release Voltage (Test Condition 1, Test Circuit 1) Overcharge detection voltage 1 (VCU1) is defined as the voltage between the VDD pin and VC pin at which VCO goes from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = V2 = VCU–0.05 V, V3 = 0 V. Overcharge release voltage 1 (VCL1) is defined as the voltage between the VDD and VC pins at which VCO goes from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually decreased. Overcharge hysteresis voltage 1 (VHC1) is defined as the difference between overcharge detection voltage 1 (VCU1) and overcharge release voltage 1 (VCL1). Overcharge detection voltage 2 (VCU2) is defined as the voltage between the VC pin and VSS pin at which VCO goes from “H” to “L” when the voltage V2 is gradually increased from the starting condition of V1 = V2 = VCU–0.05 V, V3 = 0 V. Overcharge release voltage 2 (VCL2) is defined as the voltage between the VC and VSS pins at which VCO goes from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually decreased. Overcharge hysteresis voltage 2 (VHC2) is defined as the difference between overcharge detection voltage 2 (VCU2) and overcharge release voltage 2 (VCL2). 2. Overdischarge Detection Voltage, Overdischarge Release Voltage (Test Condition 2, Test Circuit 2) Overdischarge detection voltage 1 (VDL1) is defined as the voltage between the VDD pin and VC pin at which VDO goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. Overdischarge release voltage 1 (VDU1) is defined as the voltage between the VDD pin and VC pin at which VDO goes from “L” to “H” when setting V2 = 3.5 V and the voltage V1 is then gradually increased. Overdischarge hysteresis voltage 1 (VHD1) is defined as the difference between overdischarge release voltage 1 (VDU1) and overdischarge detection voltage 1 (VDL1). Overdischarge detection voltage 2 (VDL2) is defined as the voltage between the VC pin and VSS pin at which VDO goes from “H” to “L” when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. Overdischarge release voltage 2 (VDU2) is defined as the voltage between the VC pin and VSS pin at which VDO goes from “L” to “H” when setting V1 = 3.5 V and the voltage V2 is then gradually increased. Overdischarge hysteresis voltage 2 (VHD2) is defined as the difference between overdischarge release voltage 2 (VDU2) and overdischarge detection voltage 2 (VDL2). 3. Overcurrent Detection Voltage 1, Overcurrent Detection Voltage 2 (Test Condition 3, Test Circuit 2) Overcurrent detection voltage 1 (VIOV1) is defined as the voltage between the VM pin and VSS pin whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 1 when the voltage V3 is increased rapidly within 10 µs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. Overcurrent detection voltage 2 (VIOV2) is defined as the voltage between the VM pin and VSS pin whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of overcurrent delay time 2 when the voltage V3 is increased rapidly within 10 µs from the starting condition of V1 = V2 = 3.5 V, V3 = 0 V. 4. Charger Detection Voltage (Test Condition 4, Test Circuit 2) The charger detection voltage (VCHA) is defined as the voltage between the VM pin and VSS pin at which VDO goes from “L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually increased from the starting condition of V1 = 1.8 V, V2 = 3.5 V, V3 = 0 V until the voltage V1 becomes VDL1 + (VHD1/2). The charger detection voltage can be measured only in a product whose overdischarge hysteresis VHD ≠ 0 V. Seiko Instruments Inc. 7 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Rev.1.4_00 5. Operating Current Consumption, VC Pin Current, Power-down Current Consumption (Test Condition 5, Test Circuit 3) The operating current consumption (IOPE) is the current ISS that flows through the VSS pin and the VC pin current (IVC) is the current IC that flows through the VC pin under the set conditions of V1 = V2 = 3.5 V and S1:OFF, S2:ON (normal status). The power-down current consumption (IPDN) is the current ISS that flows through the VSS pin under the set conditions of V1 = V2 = 1.5 V and S1:ON, S2:OFF (overdischarge status). 6. Resistance between VM and VDD, Resistance between VM and VSS (Test Condition 6, Test Circuit 3) The resistance between VM and VDD (RVMD) is the resistance between VM and VDD pins under the set conditions of V1 = V2 = 1.5 V and S1:OFF, S2:ON. The resistance between VM and VSS (RVMS) is the resistance between VM and VSS pins under the set conditions of V1 = V2 = 3.5 V and S1:ON, S2:OFF. 7. CO Pin H Resistance, CO Pin L Resistance (Test Condition 7, Test Circuit 4) The CO pin H resistance (RCOH) is the resistance at the CO pin under the set conditions of V1 = V2 = 3.5 V, V4 = 6.5 V. The CO pin L resistance (RCOL) is the resistance at the CO pin under the set conditions of V1 = V2 = 4.5 V, V4 = 0.5 V. 8. DO Pin H Resistance, DO Pin L Resistance (Test Condition 8, Test Circuit 4) The DO pin H resistance (RDOH) is the resistance at the DO pin under the set conditions of V1 = V2 = 3.5 V, V5 = 6.5 V. The DO pin L resistance (RDOL) is the resistance at the DO pin under the set conditions of V1 = V2 = 1.8 V, V5 = 0.5 V. 9. Overcharge Detection Delay Time, Overdischarge Detection Delay Time (Test Condition 9, Test Circuit 2) The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage V1 momentarily increases within 10 µs from overcharge detection voltage 1 (VCU1) − 0.2 V to overcharge detection voltage 1 (VCU1) + 0.2 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage V1 momentarily decreases within 10 µs from overdischarge detection voltage 1 (VDL1) + 0.2 V to overdischarge detection voltage 1 (VDL1) − 0.2 V under the set condition of V1 = V2 = 3.5 V, V3 = 0 V. 10. Overcurrent Detection Delay Time 1, Overcurrent Detection Delay Time 2 (Test Condition 10, Test Circuit 2) Overcurrent detection delay time 1 (tIOV1) is the time needed for VDO to go to “L” after the voltage V3 momentarily increases within 10 µs from 0 V to VIOV1 + 0.1 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. Overcurrent detection delay time 2 (tIOV2) is the time needed for VDO to go to “L” after the voltage V3 momentarily increases within 10 µs from 0 V to 2.0 V under the set conditions of V1 = V2 = 3.5 V, V3 = 0 V. 11. 0 V Charge Starting Charger Voltage (Products in Which 0 V Charge Is Available) (Test Condition 11, Test Circuit 2) The 0 V charge starting charger voltage (V0CHA) is defined as the voltage between the VDD pin and VM pin at which VCO goes to “H” (VVM + 0.1 V or higher) when the voltage V3 is gradually decreased from the starting condition of V1 = V2 = V3 = 0 V. 8 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series 12. 0 V Charge Inhibition Battery Voltage (Products in Which 0 V Charge Is Unavailable) (Test Condition 12, Test Circuit 2) The 0 V charge inhibition charger voltage (V0INH) is defined as the voltage between the VDD pin and VSS pin at which VCO goes to “H” (VVM + 0.1 V or higher) when the voltages V1 and V2 are gradually increased from the starting condition of V1 = V2 = 0 V, V3 = −4 V. R1=100 Ω VDD S-8242B Series CO VC VM V V3 V DO VSS C1=1 µF V1 V2 Figure 5 Test circuit 1 VDD S-8242B Series VC CO VM V V3 V DO VSS A A V1 V2 Figure 6 Test circuit 2 S1 A S2 VDD VM S-8242B Series CO VC DO VSS A A V1 V2 Figure 7 Test circuit 3 A V4 A V5 VM VDD S-8242B Series CO VC DO VSS A A V1 V2 Figure 8 Test circuit 4 Seiko Instruments Inc. 9 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Operation Remark Refer to “ 1. Normal Status Battery Protection IC Connection Example”. Rev.1.4_00 This IC monitors the voltage of the battery connected between the VDD and VSS pins and the voltage difference between the VM and VSS pins to control charging and discharging. When the battery voltage is in the range from overdischarge detection voltage n (VDLn) to overcharge detection voltage n (VCUn), and the VM pin voltage is in the range from the charger detection voltage (VCHA) to overcurrent detection voltage 1 (VIOV1), the IC turns both the charging and discharging control FETs on. This condition is called the normal status, and in this condition charging and discharging can be carried out freely. Caution When the battery is connected for the first time, discharging may not be enabled. In this case, short the VM pin and VSS pin or connect the charger to restore the normal status. 2. Overcharge Status When the battery voltage becomes higher than overcharge detection voltage n (VCUn) during charging in the normal status and detection continues for the overcharge detection delay time (tCU) or longer, the S-8242B Series turns the charging control FET off to stop charging. This condition is called the overcharge status. The overcharge status is released in the following two cases ((1) and (2)). (1) (2) When the battery voltage falls below overcharge release voltage n (VCLn), the S-8242B Series turns the charging control FET on and returns to the normal status. When a load is connected and discharging starts, the S-8242B Series turns the charging control FET on and returns to the normal status. Just after the load is connected and discharging starts, the discharging current flows through the parasitic diode in the charging control FET. At this moment the VM pin potential becomes Vf, the voltage for the parasitic diode, higher than the VSS level. When the battery voltage goes under overcharge detection voltage n (VCUn) and provided that the VM pin voltage is higher than overcurrent detection voltage 1, the S-8242B Series releases the overcharge condition. Caution 1. If the battery is charged to a voltage higher than overcharge detection voltage n (VCUn) and the battery voltage does not fall below overcharge detection voltage n (VCUn) even when a heavy load is connected, overcurrent 1 and overcurrent 2 do not function until the battery voltage falls below overcharge detection voltage n (VCUn). Since an actual battery has an internal impedance of tens of mΩ, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and overcurrent 1 and overcurrent 2 function. 2. When a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below overcharge release voltage n (VCLn). The overcharge status is released when the VM pin voltage goes over the charger detection voltage (VCHA) by removing the charger. 10 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series 3. Overdischarge Status When the battery voltage falls below overdischarge detection voltage n (VDLn) during discharging in the normal status and detection continues for the overdischarge detection delay time (tDL) or longer, the S-8242B Series turns the discharging control FET off to stop discharging. This condition is called the overdischarge status. When the discharging control FET is turned off, the VM pin voltage is pulled up by the resistor between the VM and VDD pins in the IC (RVMD). When the voltage difference between the VM and VDD pins then is 1.3 V (typ.) or lower, the current consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down status. The power-down status is released when a charger is connected and the voltage difference between the VM and VDD pins becomes 1.3 V (typ.) or higher. Moreover, when the battery voltage becomes overdischarge detection voltage n (VDLn) or higher, the S-8242B Series turns the discharging FET on and returns to the normal status. 4. Charger Detection When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is lower than the charger detection voltage (VCHA), the overdischarge hysteresis is released via the charge detection function; therefore, the S-8242B Series releases the overdischarge status and turns the discharging control FET on when the battery voltage becomes equal to or higher than overdischarge detection voltage n (VDLn) since the charger detection function works. This action is called charger detection. When a battery in the overdischarge status is connected to a charger and provided that the VM pin voltage is not lower than the charger detection voltage (VCHA), the S-8242B Series releases the overdischarge status when the battery voltage reaches overdischarge release voltage n (VDUn) or higher. 5. Overcurrent Status When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for the overcurrent detection delay time, the discharge control FET is turned off and discharging is stopped. This status is called the overcurrent status. In the overcurrent status, the VM and VSS pins are shorted by the resistor between VM and VSS (RVMS) in the IC. However, the voltage of the VM pin is at the VDD potential due to the load as long as the load is connected. When the load is disconnected, the VM pin returns to the VSS potential. This IC detects the status when the impedance between the EB+ pin and EB− pin (Refer to Figure 13) increases and is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to overcurrent detection voltage 1 (VIOV1) or lower and the overcurrent status is restored to the normal status. Caution The impedance that enables automatic restoration varies depending on the battery voltage and the set value of overcurrent detection voltage 1. Seiko Instruments Inc. 11 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Rev.1.4_00 6. 0 V Battery Charge Function This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB+ and EB− pins by connecting a charger, the charging control FET gate is fixed to the VDD pin voltage. When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turnon voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than overdischarge release voltage n (VDUn), the S-8242B Series enters the normal status. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 7. 0 V Battery Charge Inhibition Function This function inhibits recharging when a battery that is internally short-circuited (0 V) is connected. When the battery voltage (The voltage between VDD and VSS pins) is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET gate is fixed to the EB− pin voltage to inhibit charging. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or higher, charging can be performed. Caution Some battery providers do not recommend charging for a completely self-discharged battery. Please ask the battery provider to determine whether to enable or inhibit the 0 V battery charge function. 12 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series 8. Delay Circuit The detection delay times are determined by dividing a clock of approximately 3.5 kHz by the counter. Remark1. The overcurrent detection delay time 2 (tIOV2) starts when the overcurrent detection voltage 1 (VIOV1) is detected. When the overcurrent detection voltage 2 (VIOV2) is detected over the overcurrent detection delay time 2 (tIOV2) after the detection of overcurrent detection voltage 1 (VIOV1), the S-8242B turns the discharging control FET off within tIOV2 from the time of detecting VIOV2. VDD DO pin tD VSS Overcurrent detection delay time 2 (tIOV2) VDD VIOV2 VM pin VIOV1 VSS Time 0≦tD≦tIOV2 Time Figure 9 2. When the overcurrent is detected and continues for longer than the overdischarge detection delay time (tDL) without releasing the load, the condition changes to the power-down condition when the battery voltage falls below the overdischarge detection voltage n (VDLn). When the battery voltage falls below the overdischarge detection voltage n (VDLn) due to the overcurrent, the S-8242B Series turns the discharging control FET off by the overcurrent detection. In this case the recovery of the battery voltage is so slow that if the battery voltage after the overdischarge detection delay time (tDL) is still lower than the overdischarge detection voltage n (VDLn), the S-8242B Series shifts to the power-down condition. Seiko Instruments Inc. 13 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Timing Chart 1. Overcharge Detection, Overdischarge Detection Rev.1.4_00 Battery voltage VCUn VCLn VDUn VDLn (n= 1, 2) VDD DO pin voltage VSS VDD CO pin voltage VSS VEB− VDD VM pin voltage VIOV1 VSS VCHA VEB− Charger connection Load connection Overcharge detection delay time(tCU) (1) (2) Overdischarge detection delay time (tDL) (1) (3) (1) Mode *1 *1. (1) : Normal mode (2) : Overcharge mode (3) : Overdischarge mode Remark The charger is assumed to charge with a constant current. Figure 10 14 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series 2. Overcurrent Detection VCUn VCLn Battery voltage VDUn VDLn (n= 1, 2) VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VIOV2 VIOV1 VSS Overcurrent detection delay time 1 (tIOV1) (1) (2) (1) Overcurrent detection delay time 2 (tIOV2) (2) (1) Charger connection Mode *1 *1. (1) : Normal mode (2) : Overcurrent mode Remark The charger is assumed to charge with a constant current. Figure 11 Seiko Instruments Inc. 15 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Rev.1.4_00 3. Charger Detection Battery voltage VCUn VCLn VDUn VDLn (n= 1, 2) VDD DO pin voltage VSS VDD CO pin voltage VSS VDD VM pin voltage VSS VCHA Charger connection Load connection Overdischarge detection delay time (tDL) (1) (2) VM pin vodltage < VCHA Overdischarge detection (VDL) (1) Mode *1 *1. (1) : Normal mode (2) : Overdischarge mode Remark The charger is assumed to charge with a constant current. Figure 12 16 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Battery Protection IC Connection Example R1 VDD Battery 1 R2 VC Battery 2 C1 S-8242B Series EB+ C2 VSS DO CO VM R3 EB− FET1 FET2 Figure 13 Table 7 Constants for External Components Symbol FET1 FET2 R1 C1 R2 Parts Purpose Typ.   Min.   Max.   N-channel Discharge control MOS FET N-channel Charge control MOS FET Resistor ESD protection, For power fluctuation 100 Ω 1 µF 10 Ω *1 220 Ω 10 µF *1 Capacitor For power fluctuation Resistor 0.47 µF *1 *1 Remark *2 Threshold voltage≤Overdischarge detection voltage *3 Gate to source withstanding voltage≥Charger voltage *2 Threshold voltage≤Overdischarge detection voltage *3 Gate to source withstanding voltage≥Charger voltage Resistance should be as small as possible to avoid lowering the overcharge detection accuracy due to current *4 consumption. Connect a capacitor of 0.47 µF or higher between VDD and *5 VSS. ESD protection, *1 *1 300 Ω 1 kΩ  1 kΩ For power fluctuation *1 *1 0.022 µF 1.0 µF C2 Capacitor For power fluctuation 0.1 µF  Protection for reverse Select as large a resistance as possible to prevent current R3 Resistor 300 Ω 4 kΩ 2 kΩ *6 when a charger is connected in reverse. connection of a charger *1. Please set up a filter constant to be R2 × C2 ≥ 20 µF • Ω, and to be R1 × C1 = R2 × C2. *2. If the threshold voltage of a FET is low, the FET may not cut the charging current. If a FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stopped before overdischarge is detected. *3. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may be destroyed. *4. If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a charger is connected in reverse since the current flows from the charger to the IC. Insert a resistor of 10 Ω or higher to R1 for ESD protection. *5. If a capacitor of less than 0.47 µF is connected to C1, DO pin may oscillate when load short-circuiting is detected. Be sure to connect a capacitor of 0.47 µF or higher to C1. *6. If R3 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-voltage charger is connected. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. Seiko Instruments Inc. 17 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Precautions Rev.1.4_00 • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • When connecting a battery and the protection circuit, the output voltage of the DO pin (VDO) may become “L” (initial state). In this case, short the VM and VSS pins or connect the battery charger to make the output voltage of the DO pin (VDO) “H” (normal state). • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 18 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Characteristics (Typical Data) (1) Current consumption 1. IOPE − VDD 12 10 8 2. IOPE − Ta 12 10 8 IOPE [µA] IOPE [µA] 6 4 2 0 2 3 4 5 6 7 8 9 10 6 4 2 0 −40 −25 0 25 50 75 85 VDD [V] 3. IPDN − VDD 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 Ta [°C] 4. IPDN − Ta 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 −40 −25 IPDN [µA] IPDN [µA] 2 3 4 5 6 7 8 9 10 0 25 50 75 85 VDD [V] Ta [°C] (2) Overcharge detection/release voltage, overdischarge detection/release voltage, overcurrent detection voltage, and delay time 1. VCU − Ta 2. VCL − Ta 4.350 4.345 4.340 4.335 4.330 4.325 4.320 4.315 4.310 4.305 4.300 −40 −25 4.125 4.115 4.105 4.095 4.085 4.075 4.065 4.055 4.045 4.035 4.025 −40 −25 VCU [V] VCL [V] 0 25 50 75 85 0 25 50 75 85 Ta [°C] 3. VDU − Ta 3.00 2.95 Ta [°C] 4. VDL − Ta 2.25 2.24 2.23 2.22 2.21 2.20 2.19 2.18 2.17 2.16 2.15 −40 −25 VDU [V] 2.85 2.80 −40 −25 0 25 50 75 85 VDL [V] 2.90 0 25 50 75 85 Ta [°C] Ta [°C] Seiko Instruments Inc. 19 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Rev.1.4_00 5. tCU − Ta 1.42 1.37 1.32 1.27 1.22 1.17 1.12 1.07 1.02 0.97 0.92 −40 −25 6. tDL − Ta 185 175 165 tDL [ms] tCU [s] 155 145 135 125 0 25 50 75 85 115 −40 −25 0 25 50 75 85 Ta [°C] 7. VIOV1 − VDD 0.225 0.220 0.215 Ta [°C] 8. VIOV1 − Ta 0.225 0.220 0.215 VIOV1 [V] 0.210 0.205 0.200 0.195 4 5 6 7 8 9 VIOV1 [V] 0.210 0.205 0.200 0.195 −40 −25 0 25 50 75 85 VDD [V] 9. VIOV2 − VDD 1.5 1.4 1.3 Ta [°C] 10. VIOV2 − Ta 1.5 1.4 1.3 VIOV2 [V] VIOV2 [V] 1.2 1.1 1.0 0.9 4 5 6 7 8 9 1.2 1.1 1.0 0.9 −40 −25 0 25 50 75 85 VDD [V] 11. tIOV1 − VDD 10.8 10.4 10.0 9.6 9.2 8.8 8.4 8.0 7.6 7.2 Ta [°C] 12. tIOV1 − Ta 10.8 10.4 10.0 9.6 9.2 8.8 8.4 8.0 7.6 7.2 −40 −25 tIOV1 [ms] 4 5 6 7 8 9 tIOV1 [ms] 0 25 50 75 85 VDD [V] Ta [°C] 20 Seiko Instruments Inc. Rev.1.4_00 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series 13. tIOV2 − VDD 0.38 0.36 0.34 0.32 0.30 0.28 0.26 0.24 0.22 4 5 6 7 8 9 14. tIOV2 − Ta 0.38 0.36 0.34 0.32 0.30 0.28 0.26 0.24 0.22 −40 −25 0 25 50 75 85 tIOV2 [ms] tIOV2 [ms] VDD [V] (3) CO/DO pin 1. ICOH − VCO 0 −0.2 −0.4 −0.6 −0.8 −1.0 −1.2 −1.4 −1.6 0 1 2 3 4 5 6 7 Ta [°C] 2. ICOL − VCO 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 6 7 8 9 ICOH [mA] VCO [V] 3. IDOH − VDO 0 −0.2 −0.4 ICOL [mA] VCO [V] 4. IDOL − VDO 0.30 0.25 IDOH [mA] IDOL [mA] −0.6 −0.8 −1.0 −1.2 −1.4 0 1 2 3 4 5 6 7 0.20 0.15 0.10 0.05 0 0 1 2 3 VDO [V] VDO [V] Seiko Instruments Inc. 21 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8242B Series Marking Specifications (1) SNT-8A SNT-8A Top view 1 (9) (10) (11) 8 (5) (6) (7) (8) (1) (2) (3) (4) Rev.1.4_00 (1) (2) to (4) (5), (6) (7) to (11) Blank Product code (Refer to Product name vs. Product code) Blank Lot number 4 5 Product Name vs. Product Code Product Code (2) (3) (4) S-8242BAB-I8T1G Q N B S-8242BAD-I8T1G Q N D S-8242BAE-I8T1G Q N E S-8242BAH-I8T1G Q N H S-8242BAM-I8T1G Q N M S-8242BAN-I8T1G Q N N S-8242BAO-I8T1G Q N O S-8242BAQ-I8T1G Q N Q S-8242BAR-I8T1G Q N R S-8242BAU-I8T1G Q N U S-8242BAV-I8T1G Q N V S-8242BAW-I8T1G Q N W S-8242BAX-I8T1G Q N X S-8242BAY-I8T1G Q N Y S-8242BAZ-I8T1G Q N Z S-8242BBA-I8T1G Q O A S-8242BBB-I8T1G Q O B Remark Please contact our sales office for the products with detection voltage value other than those specified above. Product Name (2) 8-Pin TSSOP 8-Pin TSSOP Top view 1 (1) (2) (3) (4) (5) (6) (7) (8) 4 (9) (10) (11) (12) (13) (14) 5 8 (1) to (5): (6) to (8): (9) to (14): Product Name : S8242 (Fixed) Function Code (refer to Product Name vs. Function Code) Lot number Product Name vs. Function Code Function Code (6) (7) (8) S-8242BAC-T8T1G B A C S-8242BAH-T8T1G B A H S-8242BAI-T8T1G B A I S-8242BAP-T8T1G B A P S-8242BAR-T8T1G B A R Remark Please contact our sales office for the products with detection voltage value other than those specified above. Product Name 22 Seiko Instruments Inc. 1 .97±0.03 8 7 6 5 1 0.5 2 3 4 0.08 -0.02 +0.05 0.48±0.02 0.2±0.05 No. PH008-A-P-SD-2.0 TITLE No. SCALE UNIT SNT-8A-A-PKG Dimensions PH008-A-P-SD-2.0 mm Seiko Instruments Inc. ø1.5 -0 +0.1 2.0±0.05 4.0±0.1 0.25±0.05 5° 2.25±0.05 ø0.5±0.1 4.0±0.1 0.65±0.05 4 321 5 6 78 Feed direction No. PH008-A-C-SD-1.0 TITLE No. SCALE UNIT SNT-8A-A-Carrier Tape PH008-A-C-SD-1.0 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. PH008-A-R-SD-1.0 TITLE No. SCALE UNIT mm SNT-8A-A-Reel PH008-A-R-SD-1.0 QTY. 5,000 Seiko Instruments Inc. 0.52 2.01 0.52 0.3 0.2 0.3 0.2 0.3 0.2 0.3 Caution Making the wire pattern under the package is possible. However, note that the package may be upraised due to the thickness made by the silk screen printing and of a solder resist on the pattern because this package does not have the standoff. No. PH008-A-L-SD-3.0 TITLE No. SCALE UNIT SNT-8A-A-Land Recommendation PH008-A-L-SD-3.0 mm Seiko Instruments Inc. 3.00 -0.2 8 5 +0.3 1 4 0.17±0.05 0.2±0.1 0.65 No. FT008-A-P-SD-1.1 TITLE No. SCALE UNIT TSSOP8-E-PKG Dimensions FT008-A-P-SD-1.1 mm Seiko Instruments Inc. 4.0±0.1 2.0±0.05 ø1.55±0.05 0.3±0.05 8.0±0.1 ø1.55 -0.05 +0.1 (4.4) 6.6 -0.2 +0.4 1 4 8 5 Feed direction No. FT008-E-C-SD-1.0 TITLE No. SCALE UNIT TSSOP8-E-Carrier Tape FT008-E-C-SD-1.0 mm Seiko Instruments Inc. 13.4±1.0 Enlarged drawing in the central part ø21±0.8 2±0.5 ø13±0.5 17.5±1.0 No. FT008-E-R-SD-1.0 TITLE No. SCALE UNIT mm TSSOP8-E-Reel FT008-E-R-SD-1.0 QTY. 3,000 Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.