S-8244

Rev.3.3_00 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) S-8244 Series The S-8244 Series is used for secondary protection of lithium-ion batteries with from one to four cells, and incorporates a highprecision voltage detector circuit and a delay circuit. Short-circuits between cells accommodate series connection of one to four cells. Features (1) Internal high-precision voltage detector circuit • Overcharge detection voltage range : 3.70 to 4.50 V : Accuracy of ± 25 mV (at +25 °C) (at a 5 mV/step) Accuracy of ± 50 mV (at -40 to +85 °C) • Hysteresis : 5 optional models available and selectable: 0.38±0.1 V, 0.25±0.07 V, 0.13±0.04 V, 0.045±0.02 V, None (2) High withstand voltage device : Absolute maximum rating : 26 V (3) Wide operating voltage range : 3.6 V to 24 V (refers to the range in which the delay circuit can operate normally after overvoltage is detected) (4) Delay time during detection : Can be set by an external capacitor. (5) Low current consumption : At 3.5 V for each cell : 3.0 µA max. (+25 °C) At 2.3 V for each cell : 2.4 µA max. (+25 °C) (6) Output logic and form : 4 types CMOS output active “H” CMOS output active “L” Pch open drain output active “L” Nch open drain output active “H” (only CMOS output for 0.045 V hysteresis models) (7) Lead-free products Applications • Lithium ion rechargeable battery packs (secondary protection) Packages Package name SNT-8A 8-Pin MSOP Drawing code Package PH008-A FN008-A Tape PH008-A FN008-A Reel PH008-A FN008-A Land PH008-A  Seiko Instruments Inc. 1 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Block Diagram VCC SENSE Overcharge detection comparator 1 + - Reference voltage 1 VC1 Overcharge detection comparator 2 + - Overcharge detection delay circuit ICT Control logic Reference voltage 2 VC2 Overcharge detection comparator 3 + - Reference voltage 3 VC3 CO Overcharge detection comparator 4 + - Reference voltage 4 VSS Remark In the case of Nch open-drain output, only the Nch transistor will be connected to the CO pin. In the case of Pch open-drain output, only the Pch transistor will be connected to the CO pin. Figure 1 2 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Product Name Structure 1. Product Name S-8244A xx xx xxx xx G IC direction of tape specifications*1 TF: SNT-8A T2: 8-Pin MSOP Product name (abbreviation)*2 Package abbreviation PH: SNT-8A FN: 8-Pin MSOP Serial code Sequentially set from AA to ZZ *1. *2. Refer to the taping specifications at the end of this book. Refer to the Product Name List. Seiko Instruments Inc. 3 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series 2. Product Name List (1) SNT-8A Table 1 Overcharge Overcharge hysteresis voltage Output form detection voltage [VCD] [VCU] S-8244AAAPH-CEATFG CMOS output active “H” 4.45 ± 0.025 V 0.38 ± 0.1 V S-8244AABPH-CEBTFG 0V Nch open drain active “H” 4.20 ± 0.025 V S-8244AAFPH-CEFTFG CMOS output active “H” 4.35 ± 0.025 V 0.045 ± 0.02 V S-8244AAGPH-CEGTFG CMOS output active “H” 4.45 ± 0.025 V 0.045 ± 0.02 V S-8244AAVPH-CEVTFG CMOS output active “H” 4.275 ± 0.025 V 0.045 ± 0.02 V S-8244AAYPH-CEYTFG CMOS output active “H” 4.300 ± 0.025 V 0.25 ± 0.07 V S-8244AAZPH-CEZTFG CMOS output active “H” 4.280 ± 0.025 V 0.25 ± 0.07 V Remark Please contact our sales office for the products with the detection voltage value other than those specified above. Product name/Item (2) 8-Pin MSOP Table 2 Overcharge Overcharge detection voltage hysteresis voltage Output form [VCU] [VCD] S-8244AAAFN-CEAT2G CMOS output active “H” 4.45 ± 0.025 V 0.38 ± 0.1 V S-8244AABFN-CEBT2G 0V Nch open drain active “H” 4.20 ± 0.025 V S-8244AACFN-CECT2G CMOS output active “H” 4.115 ± 0.025 V 0.13 ± 0.04 V S-8244AADFN-CEDT2G 0V Pch open drain active “L” 4.20 ± 0.025 V S-8244AAEFN-CEET2G 0V Nch open drain active “H” 4.225 ± 0.025 V S-8244AAFFN-CEFT2G CMOS output active “H” 4.35 ± 0.025 V 0.045 ± 0.02 V S-8244AAGFN-CEGT2G CMOS output active “H” 4.45 ± 0.025 V 0.045 ± 0.02 V S-8244AAHFN-CEHT2G CMOS output active “H” 4.30 ± 0.025 V 0.25 ± 0.07 V S-8244AAIFN-CEIT2G CMOS output active “H” 4.40 ± 0.025 V 0.045 ± 0.02 V S-8244AAJFN-CEJT2G CMOS output active “H” 4.50 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H” S-8244AAKFN-CEKT2G 4.475 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H” S-8244AALFN-CELT2G 4.35 ± 0.025 V 0.25 ± 0.07 V CMOS output active “L” S-8244AAMFN-CEMT2G 4.30 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H” S-8244AANFN-CENT2G 4.15 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H” S-8244AAOFN-CEOT2G 4.25 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H” S-8244AAPFN-CEPT2G 4.05 ± 0.025 V 0.25 ± 0.07 V Nch open drain active “H” S-8244AAQFN-CEQT2G 0V 4.15 ± 0.025 V Nch open drain active “H” S-8244AARFN-CERT2G 4.30 ± 0.025 V 0.25 ± 0.07 V Remark Please contact our sales office department for the products with the detection voltage value other than those specified above. Product name/Item 4 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Pin Configurations Table 3 SNT-8A Top view CO 1 ICT 2 VSS 3 VC3 4 8 VCC 7 SENSE 6 VC1 5 VC2 Pin No. 1 2 3 4 5 6 Symbol CO ICT VSS VC3 VC2 VC1 SENSE VCC Figure 2 7 8 Description FET gate connection pin for charge control Capacitor connection pin for overcharge detection delay Negative power input pin Negative voltage connection pin of Battery 4 Negative voltage connection pin of Battery 3 Positive voltage connection pin of Battery 4 Negative voltage connection pin of Battery 2 Positive voltage connection pin of Battery 3 Negative voltage connection pin of Battery 1 Positive voltage connection pin of Battery 2 Positive voltage connection pin of Battery 1 Positive power input pin Table 4 8-Pin MSOP Top view VCC SENSE VC1 VC2 1 2 3 4 8 7 6 5 CO ICT VSS VC3 Pin No. 1 2 3 4 5 6 7 Symbol VCC SENSE VC1 VC2 VC3 VSS ICT CO Figure 3 8 Description Positive power input pin Positive voltage connection pin of Battery 1 Negative voltage connection pin of Battery 1 Positive voltage connection pin of Battery 2 Negative voltage connection pin of Battery 2 Positive voltage connection pin of Battery 3 Negative voltage connection pin of Battery 3 Positive voltage connection pin of Battery 4 Negative power input pin Negative voltage connection pin of Battery 4 Capacitor connection pin for overcharge detection delay FET gate connection pin for charge control Seiko Instruments Inc. 5 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Absolute Maximum Ratings Table 5 Item Input voltage between VCC and VSS Delay capacitor connection pin voltage Input pin voltage CO output pin voltage Power dissipation (CMOS output) (Nch open drain output) (Pch open drain output) SNT-8A 8-Pin MSOP Symbol VDS VICT VIN VCO Applied pin VCC ICT SENSE, VC1, VC2, VC3 CO (Ta = 25 °C unless otherwise specified) Rating Unit V VSS−0.3 to VSS+26 V VSS −0.3 to VCC +0.3 VSS −0.3 to VCC +0.3 VSS −0.3 to VCC +0.3 VSS −0.3 to 26 VCC −26 to VCC +0.3 450*1 300 (When not mounted on board) 500*1 −40 to +85 −40 to +125 V V V V mW mW mW °C °C PD    Operating ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size : 114.3 mm × 76.2 mm × t1.6 mm (2) Name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 600 8-Pin MSOP Power Dissipation (PD) [ mW] 400 SNT-8A 200 0 0 100 150 50 Ambient Temperature (Ta) [°C] Figure 4 Power Dissipation of Package (When Mounted on Board) 6 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Electrical Characteristics Table 6 (Ta = 25 °C unless otherwise specified) Item DETECTION VOLTAGE Overcharge detection voltage 1 *1 Overcharge detection voltage 2 *1 Overcharge detection voltage 3 *1 Overcharge detection voltage 4 *1 Overcharge hysteresis voltage 1 Overcharge hysteresis voltage 2 *2 Overcharge hysteresis voltage 3 *2 Overcharge hysteresis voltage 4 *2 Detection voltage temperature coefficient *3 DELAY TIME Overcharge detection delay time OPERATING VOLTAGE Operating voltage between VCC and VSS *4 CURRENT CONSUMPTION Current consumption during normal operation Current consumption at power down VC1 sink current VC2 sink current VC3 sink current OUTPUT VOLTAGE*5 CO “H” voltage CO “L” voltage *1. *2. *3. *4. *5. *2 Symbol Conditions Min. Typ. Max. VCU1 +0.025 VCU2 +0.025 VCU3 +0.025 VCU4 +0.025 0.48 0.48 0.48 0.48 +0.4 2.0 24 Unit Test conditions 1 2 3 4 1 2 3 4  5  6 6 6 6 6 7 7 Test circuit 1 1 1 1 1 1 1 1  2  3 3 3 3 3 4 4 VCU1 VCU2 VCU3 VCU4 VCD1 VCD2 VCD3 VCD4 TCOE tCU VDSOP VCU1 −0.025 VCU2 3.7 to 4.5 V Adjustment −0.025 VCU3 3.7 to 4.5 V Adjustment −0.025 VCU4 3.7 to 4.5 V Adjustment −0.025 0.28  0.28  0.28  0.28  3.7 to 4.5 V Adjustment Ta=−40 to +85 °C C=0.1 µF  V1=V2=V3=V4=3.5 V V1=V2=V3=V4=2.3 V V1=V2=V3=V4=3.5 V V1=V2=V3=V4=3.5 V V1=V2=V3=V4=3.5 V at IOUT = 10 µA at IOUT = 10 µA −0.4 1.0 3.6 VCU1 VCU2 VCU3 VCU4 0.38 0.38 0.38 0.38 0.0 1.5  1.5 1.2      V V V V V V V V mV/°C s V IOPE IPDN IVC1 IVC2 IVC3 VCO(H) VCO(L)   −0.3 −0.3 −0.3 VCC −0.05  3.0 2.4 0.3 0.3 0.3  VSS +0.05 µA µA µA µA µA V V ±50 mV when Ta = −40 to +85 °C. 0.25±0.07 V, 0.13±0.04 V, 0.045±0.02 V except for 0.38 V hysteresis models. Overcharge detection voltage or overcharge hysteresis voltage. After detecting the overcharge, the delay circuit operates normally in the range of operating voltage. Output logic and CMOS or open drain output can be selected. Seiko Instruments Inc. 7 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Test Circuits (1) Test Condition 1, Test Circuit 1 Conditions: • Set switches 1 and 2 to OFF for CMOS output models. • Set switch 1 to ON and switch 2 to OFF for Nch open drain models. • Set switch 1 to OFF and switch 2 to ON for Pch open drain models. Definitions: • Set V1, V2, V3 and V4 to 3.5 V and gradually increase V1: Overcharge detection voltage 1 (VCU1) is defined as V1 voltage when CO is turned to “H” (for CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open drain). • Next, gradually decrease V1: Overcharge hysteresis voltage (VCD1) is defined as a difference between VCU1 and V1 when CO is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active “L” or Pch open drain). (2) Test Condition 2, Test Circuit 1 Conditions: • Set switches 1 and 2 to OFF for CMOS output models. • Set switch 1 to ON and switch 2 to OFF for Nch open drain models. • Set switch 1 to OFF and switch 2 to ON for Pch open drain models. Definitions: • Set V1, V2, V3 and V4 to 3.5 V and gradually increase V2. Overcharge detection voltage 2 (VCU2) is defined as V2 voltage when CO is turned to “H” (for CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open drain). • Next, gradually decrease V2. Overcharge hysteresis voltage (VCD2) is defined as a difference between VCU2 and V2 when CO is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active “L” or Pch open drain). (3) Test Condition 3, Test Circuit 1 Conditions: • Set switches 1 and 2 to OFF for CMOS output models. • Set switch 1 to ON and switch 2 to OFF for Nch open drain models. • Set switch 1 to OFF and switch 2 to ON for Pch open drain models. Definitions: • Set V1, V2, V3 and V4 to 3.5 V and gradually increase V3. Overcharge detection voltage 3 (VCU3) is defined as V3 voltage when CO is turned to “H” (for CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open drain). • Next gradually decrease V3. Overcharge hysteresis voltage (VCD3) is defined as a difference between VCU3 and V3 when CO is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active “L” or Pch open drain). 8 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (4) Test Condition 4, Test Circuit 1 Conditions: • Set switches 1 and 2 to OFF for CMOS output models. • Set switch 1 to ON and switch 2 to OFF for Nch open drain models. • Set switch 1 to OFF and switch 2 to ON for Pch open drain models. Definitions: • Set V1, V2, V3 and V4 to 3.5 V and gradually increase V4. Overcharge detection voltage 4 (VCU4) is defined as V4 voltage when CO is turned to “H” (for CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open drain). • Next, gradually decrease V4. Overcharge hysteresis voltage (VCD4) is defined as a difference between VCU4 and V4 when CO is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active “L” or Pch open drain). (5) Test Condition 5, Test Circuit 2 Conditions: • Set switches 1 and 2 to OFF for CMOS output models. • Set switch 1 to ON and switch 2 to OFF for Nch open drain models. • Set switch 1 to OFF and switch 2 to ON for Pch open drain models. Definition: • Set V1, V2, V3 and V4 to 3.5 V and momentarily rise V1 to 4.7 V within 10 µs. Overcharge detection delay time (tCU) is the period from when V1 goes 4.7 V to when CO is turned to “H” (for CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open drain). (6) Test Condition 6, Test Circuit 3 Conditions: • Set V1, V2, V3 and V4 to 2.3 V. • Measure current consumption (I1). Definition: • The current consumption (I1) is defined as current consumption at power down (IPDN). Conditions: • Set V1, V2, V3 and V4 to 3.5 V. • Measure current consumption I1, I2, I3, and I4. Definition: •The current consumption (I1) is defined as current consumption during normal operation (IOPE), the current consumption (I2) as VC1 sink current (IVC1), the current consumption (I3) as VC2 sink current (IVC2), and the current consumption (I4) as VC3 sink current (IVC3), respectively. Seiko Instruments Inc. 9 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (7) Test Condition 7, Test Circuit 4 Conditions: • Set switch 1 to OFF and switch 2 to ON. Definitions: • Set V1, V2, V3 and V4 to 4.6 V and gradually decrease V6 from VCC (for CMOS output active “H” models). V6 voltage is defined as VCO (H) when I2 (= -10 µA) flows. • Set V1, V2, V3 and V4 to 3.5 V and gradually decrease V6 from VCC (for CMOS output active “L” or Pch open drain models). V6 voltage is defined as VCO (H) when I2 (= -10 µA) flows. • Set V1, V2, V3 and V4 to 4.6 V and gradually increase V6 from 0 V (for CMOS output active “L” models). V6 voltage is defined as VCO (L) when I2 (= 10 µA) flows. • Set V1, V2, V3 and V4 to 3.5 V and gradually increase V6 from 0 V (for CMOS output active “H” or Nch open drain models). V6 voltage is defined as VCO (L) when I2 (= 10 µA) flows. 10 M Ω S-8244 VCC SENSE CO ICT VSS VC3 SW1 VCC 10 MΩ S-8244 CO ICT VSS VC3 SW1 SW2 V V4 10 M Ω V1 VC1 SENSE SW2 0.1 µF V4 10 MΩ V V1 VC1 V2 VC2 V2 VC2 V3 V3 Test Circuit 1 Test Circuit I1 V5 2 SW1 S-8244 VCC SENSE CO ICT VSS VC3 S-8244 VCC SENSE CO ICT VSS VC3 SW2 V V4 I2 V6 I1 V1 V2 V3 I2 I3 VC1 VC2 V1 I4 V4 VC1 V2 VC2 V3 Test Circuit 3 Figure 5 Test Circuit 4 10 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Operation Overcharge Detection CO is turned to “H” (for CMOS output active “H” or Nch open drain models) or “L” (for CMOS output active “L” or Pch open drain models) when the voltage of one of the batteries exceeds the overcharge detection voltage (VCU) during charging under normal conditions beyond the overcharge detection delay time (tCU). This state is called “overcharge.” Attaching FET to the CO pin provides charge control and a second protection. At that time, the overcharge state is maintained until the voltage of all batteries decreases from the overcharge detection voltage (VCU) by the equivalent to the overcharge hysteresis voltage (VCD). Delay Circuit The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a specified voltage when the voltage of one of the batteries exceeds the overcharge detection voltage (VCU). Then, the delay circuit gradually discharges the capacitor at 100 nA and inverts the CO output when the voltage at the delay capacitor connection pin goes below a specified level. Overcharge detection delay time (tCU) varies depending upon the external capacitor. Each delay time is calculated using the following equation. tCU[s] = Delay Coefficient Min. (10, Typ. 15, Max. 20) × CICT [µF] Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference between the maximum voltage and the specified value of delay capacitor pin (ICT pin). This will cause a deviation between the calculated delay time and the resultant delay time. Also, delay time is internally set in this IC to prevent the CO output from inverting until the charge to delay capacitor pin is reached to the specified voltage. If large capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay time. Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1 µF. Seiko Instruments Inc. 11 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Timing Chart VCD V1 battery V2 battery V3 battery V4 battery VCU Battery voltage VSS VCC CO pin voltage VSS VCC CO pin voltage VSS CMOS output active “L” and Pch open drain models CMOS output active “H” and Nch open drain models ICT pin voltage VSS Delay Figure 6 12 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Battery Protection IC Connection Example (1) Connection Example 1 SC PROTECTOR EB+ RVCC SENSE BAT1 R1 C1 VC1 BAT2 R2 C2 VC2 BAT3 R3 C3 VC3 BAT4 R4 C4 VSS CO EBFET ICT CICT VCC CVCC Figure 7 Table 7 Constants for External Components 1 Symbol Min. Typ. Max. R1 to R4 0 1k 10 k C1 to C4 0 0.1 1 RVCC 0 100 1k CVCC 0 0.1 1 CICT 0 0.1 1 Unit Ω µF Ω µF µF Caution1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. 3. In the case of Nch open drain output, pull up CO pin by external resistor. [For SC PROTECTOR, contact] Sony Chemicals Corporation Electronic Devices Business Group 1-11-2 Osaki, Shinagawa-ku, Tokyo, 141-0032 Japan TEL: +81-3-5435-3943 FAX: +81-3-5435-3072 Seiko Instruments Inc. 13 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (2) Connection Example 2 EB+ RVCC SENSE BAT1 R1 C1 VC1 BAT2 R2 C2 VC2 BAT3 R3 C3 VC3 BAT4 R4 C4 VSS CO FET ICT CICT VCC CVCC EB- SC PROTECTOR Figure 8 Table 8 Constants for External Components 2 Symbol Min. Typ. Max. R1 to R4 0 1k 10 k C1 to C4 0 0.1 1 RVCC 0 100 1k CVCC 0 0.1 1 CICT 0 0.1 1 Unit Ω µF Ω µF µF Caution1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. 3. In the case of Nch open drain output, pull up CO pin by external resistor. 14 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (3) Connection Example 3 (for 3-cells) SC PROTECTOR EB+ RVCC SENSE BAT1 R1 C1 VC1 BAT2 R2 C2 VC2 BAT3 R3 C3 VC3 FET VSS CO EBICT CICT VCC CVCC Figure 9 Table 9 Constants for External Components 3 Symbol Min. Typ. Max. R1 to R3 0 1k 10 k C1 to C3 0 0.1 1 RVCC 0 100 1k CVCC 0 0.1 1 CICT 0 0.1 1 Unit Ω µF Ω µF µF Caution1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. 3. In the case of Nch open drain output, pull up CO pin by external resistor. Seiko Instruments Inc. 15 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (4) Connection Example 4 (for 2-cells) SC PROTECTOR EB+ RVCC SENSE BAT1 R1 C1 VC1 BAT2 R2 C2 VC2 ICT CICT VC3 FET VSS CO EBVCC CVCC Figure 10 Table 10 Constants for External Components 4 Symbol Min. Typ. Max. Unit R1, R2 0 1k 10 k Ω C1, C2 0 0.1 1 µF RVCC 0 100 1k Ω CVCC 0 0.1 1 µF CICT 0 0.1 1 µF Caution1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. 3. In the case of Nch open drain output, pull up CO pin by external resistor. 16 Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series (5) Connection Example 5 (for 1-cell) SC PROTECTOR EB+ RVCC SENSE BAT1 R1 C1 VC1 VCC CVCC VC2 ICT CICT VC3 FET VSS CO EB- Figure 11 Table 11 Constants for External Components 5 Symbol Min. Typ. Max. Unit R1 0 1k 10 k Ω C1 0 0.1 1 µF RVCC 0 100 1k Ω CVCC 0 0.1 1 µF CICT 0 0.1 1 µF Caution1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. 3. In the case of Nch open drain output, pull up CO pin by external resistor. Seiko Instruments Inc. 17 BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Precautions • This IC charges the delay capacitor through the delay capacitor pin (ICT pin) immediately when the voltage of one of batteries V1 to V4 reaches the overcharge voltage. Therefore, setting the resistor connected to the VCC pin to any value greater than the recommended level causes a reduction in the IC power supply voltage because of charge current of the delay capacitor. This may lead to a malfunction. Set up the resistor NOT to exceed the typical value. If you change the resistance, please consult us. DO NOT connect any of overcharged batteries. Even if only one overcharged battery is connected to this IC, the IC detects overcharge, then charge current flows to the delay capacitor through the parasitic diode between pins where the battery is not connected yet. This may lead to a malfunction. Please perform sufficient evaluation in the case of use. Depending on an application circuit, even when the fault charge battery is not contained, the connection turn of a battery may be restricted in order to prevent the output of CO detection pulse at the time of battery connection. CMOS output active “H” and Nch open drain models • VCD VCU Battery voltage V1 battery V2 battery V3 battery V4 battery VSS VCC CO pin voltage VSS CICT high CICT low CICT low Setting voltage ICT pin voltage VSS CICT high Internal delay Delay • • • • • 18 In this IC, the output logic of the CO pin is inverted after several milliseconds of internal delay if this IC is under the overcharge condition even ICT pin is either “VSS-short circuit,” “VDD-short circuit” or “Open” status. Any position from V1 to V4 can be used when applying this IC for a one to three-cell battery. However, be sure to short circuit between pins not in use (SENSE-VC1, VC1-VC2, VC2-VC3, or VC3-VSS). The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products including this IC upon patents owned by a third party. Seiko Instruments Inc. BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION) Rev.3.3_00 S-8244 Series Characteristics (Typical Data) 1. Detection Voltage vs. Temperature Overcharge Detection Voltage vs. Temperature VCU= 4.45(V) S-8244AAAFN 4.55 Overcharge Release Voltage vs. Temperature S-8244AAAFN 4.17 VCU-VCD(V) VCD=0.38(V) VCU(V) 4.45 4.07 4.35 -40 -20 0 20 40 Ta(°C) 60 80 100 3.97 -40 -20 0 20 40 Ta(°C) 60 80 100 2. Current Consumption vs. Temperature Current Consumption during Normal Operation vs. Temperature S-8244AAAFN VCC =14.0(V) 3 Current Consumption at Power Down vs. Temperature VCC= 9.2(V) S-8244AAAFN 3 ICPE(µA) 1 IPDN(µA) -40 -20 0 20 40 Ta(°C) 60 80 100 2 2 1 0 0 -40 -20 0 20 40 Ta(°C) 60 80 100 3. Delay Time vs. Temperature Overcharge Detection Delay Time vs. Temperature S-8244AAAFN VCC =15.2(V) 3 2 tCU(s) 1 0 -40 -20 0 20 40 Ta(°C) 60 80 100 Caution Please design all applications of the S-8244 Series with safety in mind. Seiko Instruments Inc. 19 1 .97±0.03 8 7 6 5 1 0.5 2 3 4 0.08 -0.02 +0.05 0.48±0.02 0.2±0.05 No. PH008-A-P-SD-2.0 TITLE No. SCALE UNIT SNT-8A-A-PKG Dimensions PH008-A-P-SD-2.0 mm Seiko Instruments Inc. ø1.5 -0 +0.1 2.0±0.05 4.0±0.1 0.25±0.05 5° 2.25±0.05 ø0.5±0.1 4.0±0.1 0.65±0.05 4 321 5 6 78 Feed direction No. PH008-A-C-SD-1.0 TITLE No. SCALE UNIT SNT-8A-A-Carrier Tape PH008-A-C-SD-1.0 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. PH008-A-R-SD-1.0 TITLE No. SCALE UNIT mm SNT-8A-A-Reel PH008-A-R-SD-1.0 QTY. 5,000 Seiko Instruments Inc. 0.52 2.01 0.52 0.3 0.2 0.3 0.2 0.3 0.2 0.3 Caution Making the wire pattern under the package is possible. However, note that the package may be upraised due to the thickness made by the silk screen printing and of a solder resist on the pattern because this package does not have the standoff. No. PH008-A-L-SD-3.0 TITLE No. SCALE UNIT SNT-8A-A-Land Recommendation PH008-A-L-SD-3.0 mm Seiko Instruments Inc. 2.95±0.2 8 5 1 4 0.13±0.1 0.2±0.1 0.65±0.1 No. FN008-A-P-SD-1.1 TITLE No. SCALE UNIT MSOP8-A-PKG Dimensions FN008-A-P-SD-1.1 mm Seiko Instruments Inc. 2.0±0.05 4.0±0.1 4.0±0.1 1.35±0.15 1.55±0.05 1.05±0.05 0.3±0.05 3.1±0.15 4 1 5 8 Feed direction No. FN008-A-C-SD-1.1 TITLE No. SCALE UNIT MSOP8-A-Carrier Tape FN008-A-C-SD-1.1 mm Seiko Instruments Inc. 16.5max. Enlarged drawing in the central part 13±0.2 13.0±0.3 (60°) (60°) No. FN008-A-R-SD-1.1 TITLE No. SCALE UNIT mm MSOP8-A-Reel FN008-A-R-SD-1.1 QTY. 3,000 Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.