S-8261AAJMD

Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series The S-8261 series are lithium-ion / lithium polymer rechargeable battery protection ICs incorporating highaccuracy voltage detection circuit and delay circuit. The S-8261 series are suitable for protection of single-cell lithium ion/lithium polymer battery packs from overcharge, overdischarge and overcurrent. Features (1) Internal high accuracy voltage detection circuit • Overcharge detection voltage 3.9 V to 4.4 V (applicable in 5 mV step) Accuracy: ±25 mV (+25 °C) and ±30 mV (−5 °C to +55 °C) • Overcharge hysteresis voltage 0.0 V to 0.4 V*1 Accuracy: ±25 mV The overcharge hysteresis voltage can be selected from the range 0.0 V to 0.4 V in 50 mV step. • Overdischarge detection voltage 2.0 V to 3.0 V (applicable in 10 mV step) Accuracy: ±50 mV • Overdischarge hysteresis voltage 0.0 V to 0.7 V*2 Accuracy: ±50 mV The overdischarge hysteresis voltage can be selected from the range 0.0 V to 0.7 V in 100 mV step. • Overcurrent 1 detection voltage 0.05 V to 0.3 V (applicable in 10 mV step) Accuracy: ±15 mV • Overcurrent 2 detection voltage 0.5 V (fixed) Accuracy: ±100 mV (2) High voltage device is used for charger connection pins (VM and CO pins: absolute maximum rating = 28 V) (3) Delay times (overcharge: tCU, overdischarge: tDL, overcurrent 1: tlOV1, overcurrent 2: tlOV2) are generated by an internal circuit. No external capacitor is necessary. Accuracy: ±20% (4) Three-step overcurrent detection circuit is included. (overcurrent 1, overcurrent 2 and load short-circuiting) (5) 0 V battery charge function “available” / “unavailable” are selectable. (6) Charger detection function and abnormal charge current detection function • The overdischarge hysteresis is released by detecting negative voltage at the VM pin (−0.7 V typ.). (Charger detection function) • When the output voltage of the DO pin is high and the voltage at the VM pin is equal to or lower than the charger detection voltage (−0.7 V typ.), the output voltage of the CO pin goes low. (Abnormal charge current detection function) (7) Low current consumption • Operation mode 3.5 µA typ., 7.0 µA max. • Power-down mode 0.1 µA max. (8) Wide operating temperature range −40 °C to +85 °C (9) Small package SOT-23-6, 6-Pin SNB(B) *1. Overcharge release voltage = Overcharge detection voltage − Overcharge hysteresis voltage (where overcharge release voltage < 3.8 V is prohibited.) *2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage (where overdischarge release voltage > 3.4 V is prohibited.) Applications • Lithium-ion rechargeable battery packs • Lithium polymer rechargeable battery packs Seiko Instruments Inc. 1 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Packages Package name SOT-23-6 6-Pin SNB(B) Package MP006-A BD006-A Drawing code Tape MP006-A BD006-A Rev.1.9_00 Reel MP006-A BD006-A 2 Seiko Instruments Inc. Rev.1.9_00 Block Diagrams BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 1. Product with 0 V Battery Charge Function DP Output control circuit Oscillator control circuit VDD Divider control logic 0 V battery charge circuit DO + − Overcharge detection comparator Charger detection circuit CO + − Overcurrent 1 detection comparator RVMD + − Overcurrent 2 detection comparator + Load short-circuiting detection comparator − RVMS VM Overdischarge detection comparator + − VSS Remark All the diodes shown in the figure are parasitic diodes. Figure 1 2. Product with 0 V Battery Charge Inhibition Function DP Output control circuit Oscillator control circuit VDD Divider control logic 0 V battery charge inhibition circuit DO + − Overcharge detection comparator Charger detection circuit CO + − Overcurrent 1 detection comparator RVMD + − Overcurrent 2 detection comparator + Load short-circuiting detection comparator − RVMS VM Overdischarge detection comparator + − VSS Remark All the diodes shown in the figure are parasitic diodes. Figure 2 Seiko Instruments Inc. 3 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Product Name Structure 1. Product Name S−8261A xx xx − xxx − xx IC direction in tape specifications*1 T2: SOT-23-6 TF: 6-Pin SNB(B) Product name (abbreviation)*2 Package name (abbreviation) MD: SOT-23-6 BD: 6-Pin SNB(B) Rev.1.9_00 Serial code Assigned from AA to ZZ in alphabetical order *1. Refer to the taping specifications. *2. Refer to the Product Name List. 4 Seiko Instruments Inc. Rev.1.9_00 2. Product Name List BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 1 (1 / 2) Model No. S-8261AAGMD-G2G-T2 S-8261AAHMD-G2H-T2 S-8261AAJBD-G2J-TF S-8261AAJMD-G2J-T2 S-8261AALMD-G2L-T2 S-8261AAMMD-G2M-T2 S-8261AANMD-G2N-T2 S-8261AAOMD-G2O-T2 S-8261AAPMD-G2P-T2 S-8261AARBD-G2R-TF S-8261AARMD-G2R-T2 S-8261AASMD-G2S-T2 S-8261AAUMD-G2U-T2 S-8261AAVBD-G2V-TF S-8261AAXMD-G2X-T2 S-8261AAZMD-G2Z-T2 S-8261ABAMD-G3A-T2 S-8261ABBMD-G3B-T2 S-8261ABCMD-G3C-T2 S-8261ABDBD-G3D-TF S-8261ABEBD-G3E-TF S-8261ABGBD-G3G-TF S-8261ABHBD-G3H-TF S-8261ABIBD-G3I-TF S-8261ABJMD-G3J-T2 S-8261ABKMD-G3K-T2 S-8261ABLBD-G3L-TF S-8261ABMMD-G3M-T2 S-8261ABNMD-G3N-T2 S-8261ABOBD-G3O-TF S-8261ABPMD-G3P-T2 S-8261ABRMD-G3R-T2 S-8261ABSMD-G3S-T2 Overcharge detection voltage [VCU] 4.28 V 4.28 V 4.325 V 4.325 V 4.30 V 4.30 V 4.275 V 4.28 V 4.325 V 4.28 V 4.28 V 4.28 V 4.275 V 4.3 V 4.35 V 4.28 V 4.35 V 4.275 V 4.30 V 4.28 V 4.275 V 4.275 V 4.20 V 4.275 V 4.28 V 4.10 V 4.275 V 4.28 V 4.30 V 4.28 V 4.20 V 4.275 V 4.28 V Overcharge Overdischarge Overdischarge Overcurrent 1 hysteresis hysteresis detection detection voltage [VHC] voltage [VDL] voltage [VHD] voltage [VIOV1] 0.2 V 2.3 V 0V 0.16 V 0.2 V 2.3 V 0V 0.08 V 0.25 V 2.5 V 0.4 V 0.15 V 0.25 V 2.5 V 0.4 V 0.15 V 0.1 V 2.3 V 0V 0.08 V 0.1 V 2.3 V 0V 0.2 V 0.1 V 2.3 V 0.1 V 0.1 V 0.2 V 2.3 V 0V 0.13 V 0.25 V 2.5 V 0.4 V 0.1 V 0.2 V 2.3 V 0V 0.1 V 0.2 V 2.3 V 0V 0.1 V 0.2 V 2.3 V 0V 0.15 V 0.1 V 2.3 V 0.1 V 0.1 V 0.2 V 2.3 V 0V 0.13 V 0.1 V 2.3 V 0.1 V 0.1 V 0.25 V 2.5 V 0.4 V 0.1 V 0.2 V 2.5 V 0V 0.2 V 0.2 V 2.3 V 0V 0.13 V 0.2 V 2.3 V 0V 0.13 V 0.2 V 2.3 V 0V 0.13 V 0.2 V 2.3 V 0V 0.1 V 0.2 V 2.3 V 0V 0.1 V 0V 2.3 V 0V 0.1 V 0.2 V 2.3 V 0V 0.2 V 0.2 V 3.0 V 0V 0.08 V 0.25 V 2.5 V 0.4 V 0.15 V 0.2 V 2.3 V 0V 0.05 V 0.2 V 2.8 V 0V 0.1 V 0.2 V 2.3 V 0V 0.06 V 0.2 V 2.3 V 0V 0.04 V 0.1 V 2.8 V 0.1 V 0.15 V 0.2 V 2.5 V 0.4 V 0.15 V 0.1 V 2.5 V 0.5 V 0.18 V 0 V battery charge function Available Available Unavailable Unavailable Unavailable Unavailable Available Unavailable Unavailable Available Available Unavailable Available Available Available Unavailable Available Available Available Available Available Unavailable Available Unavailable Available Unavailable Unavailable Available Available Available Unavailable Unavailable Unavailable Seiko Instruments Inc. 5 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 1 (2 / 2) Rev.1.9_00 Overcharge Overdischarge Overcurrent 1 detection delay time detection delay time detection delay time S-8261AAGMD-G2G-T2 1.2 s 144 ms 9 ms S-8261AAHMD-G2H-T2 1.2 s 144 ms 9 ms S-8261AAJBD-G2J-TF 1.2 s 144 ms 9 ms S-8261AAJMD-G2J-T2 1.2 s 144 ms 9 ms S-8261AALMD-G2L-T2 1.2 s 144 ms 9 ms S-8261AAMMD-G2M-T2 1.2 s 144 ms 9 ms S-8261AANMD-G2N-T2 1.2 s 144 ms 9 ms S-8261AAOMD-G2O-T2 1.2 s 144 ms 9 ms S-8261AAPMD-G2P-T2 1.2 s 144 ms 9 ms S-8261AARBD-G2R-TF 1.2 s 144 ms 9 ms S-8261AARMD-G2R-T2 1.2 s 144 ms 9 ms S-8261AASMD-G2S-T2 1.2 s 144 ms 4.5 ms S-8261AAUMD-G2U-T2 4.6 s 144 ms 9 ms S-8261AAVBD-G2V-TF 4.6 s 144 ms 9 ms S-8261AAXMD-G2X-T2 4.6 s 144 ms 9 ms S-8261AAZMD-G2Z-T2 1.2 s 144 ms 9 ms S-8261ABAMD-G3A-T2 4.6 s 144 ms 9 ms S-8261ABBMD-G3B-T2 1.2 s 144 ms 9 ms S-8261ABCMD-G3C-T2 1.2 s 144 ms 9 ms S-8261ABDBD-G3D-TF 1.84 s 115 ms 7.2 ms S-8261ABEBD-G3E-TF 1.2 s 144 ms 9 ms S-8261ABGBD-G3G-TF 1.2 s 36 ms 9 ms S-8261ABHBD-G3H-TF 0.3 s 36 ms 18 ms S-8261ABIBD-G3I-TF 1.2 s 36 ms 9 ms S-8261ABJMD-G3J-T2 1.2 s 144 ms 9 ms S-8261ABKMD-G3K-T2 1.2 s 144 ms 9 ms S-8261ABLBD-G3L-TF 1.2 s 36 ms 9 ms S-8261ABMMD-G3M-T2 1.2 s 144 ms 9 ms S-8261ABNMD-G3N-T2 1.2 s 144 ms 9 ms S-8261ABOBD-G3O-TF 1.2 s 144 ms 9 ms S-8261ABPMD-G3P-T2 1.2 s 144 ms 9 ms S-8261ABRMD-G3R-T2 1.2 s 144 ms 9 ms S-8261ABSMD-G3S-T2 1.2 s 144 ms 9 ms Remark It is possible to change the detection voltages of the product other than above. The delay times can also be changed within the range listed bellow. For details, please contact SII marketing department. Model No. Delay time Symbol Selection range Remarks Overcharge detection delay time tCU 0.15 s 1.2 s 4.6 s Choose from the left. Overdischarge detection delay time tDL 36 ms 144 ms 290 ms Choose from the left. Overcurrent 1 detection delay time tlOV1 4.5 ms 9 ms 18 ms Choose from the left. Remark The values surrounded by bold lines are the delay time of the standard products. 6 Seiko Instruments Inc. Rev.1.9_00 Pin Configurations SOT-23-6 Top view 654 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 2 Pin No. 1 2 3 Symbol DO VM CO DP VDD VSS Pin description FET gate control pin for discharge (CMOS output) Voltage detection pin between VM and VSS (Overcurrent detection pin) FET gate control pin for charge (CMOS output) Test pin for delay time measurement Positive power input pin Negative power input pin 1 2 3 Figure 3 6-Pin SNB(B) Top view 654 4 5 6 Table 3 Pin No. 1 2 3 Symbol CO VM DO VSS DP VDD Pin description FET gate control pin for charge (CMOS output) Voltage detection pin between VM and VSS (Overcurrent detection pin) FET gate control pin for discharge (CMOS output) Negative power input pin Test pin for delay time measurement Positive power input pin 1 2 3 Bottom view 123 4 5 6 *1 6 *1. 5 4 Connect the heatsink of back side at shadowed area to the board, and set electric potential open or VDD. However, do not use it as the function of electrode. Figure 4 Seiko Instruments Inc. 7 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Absolute Maximum Ratings Table 4 Rev.1.9_00 (Ta = 25 °C unless otherwise specified) Parameter Symbol Applied pin Rating Unit Input voltage between VDD and VSS*1 VDS VDD V VSS −0.3 to VSS +12 Input pin voltage for VM VVM VM V VDD −28 to VDD +0.3 Output pin voltage for CO VCO CO V VVM −0.3 to VDD+0.3 Output pin voltage for DO VDO DO V VSS −0.3 to VDD +0.3 Power dissipation SOT-23-6 PD 250 mW  6-pin SNB(B) PD 90 mW  Operating temperature range Topr  −40 to +85 °C Storage temperature range Tstg  −55 to +125 °C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. *1. Even pulse (µs) noise exceeding the above input voltage (VSS + 12 V) may damage the IC, so do not allow such noise to be applied. 8 Seiko Instruments Inc. Rev.1.9_00 Electrical Characteristics BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 1. Except Detection Delay Time (25 °C) Table 5 Parameter [DETECTION VOLTAGE] Overcharge detection voltage VCU = 3.9 V to 4.4 V, 5 mV Step Test Symbol condition VCU 1 Remark (Ta = 25 °C unless otherwise specified) Test Min. Typ. Max. Unit circuit VCU VCU −0.025 VCU VCU −0.030 VHC VHC −0.025 VDL VDL −0.050 VHD VHD −0.050 VIOV1 VIOV1 −0.015 0.4 0.5 0.9 −1.0 1.5 1.5 1.2 −0.7   3.5  5 5 5 VCU +0.025 VCU +0.030 VHC +0.025 VDL +0.050 VHD +0.050 VIOV1 +0.015 0.6 1.5 −0.4 8 28 V 1  Ta = −5 °C to 55 °C*1 Overcharge hysteresis voltage VHC VHC = 0.0 V to 0.4 V, 50 mV Step Overdischarge detection voltage VDL VDL = 2.0 V to 3.0 V, 10 mV Step Overdischarge hysteresis voltage VHD VHD = 0.0 V to 0.7 V, 100 mV Step Overcurrent 1 detection voltage VIOV1 VIOV1 = 0.05 V to 0.3 V, 10 mV Step Overcurrent 2 detection voltage VIOV2 Load short-circuiting detection VSHORT voltage Charger detection voltage VCHA [INPUT VOLTAGE, OPERATION VOLTAGE] Operation voltage between VDD VDSOP1 and VSS Operation voltage between VDD VDSOP2 and VM [CURRENT CONSUMPTION] Current consumption in normal I OPE operation Current consumption at power I PDN down [OUTPUT RESISTANCE] CO pin resistance “H” RCOH CO pin resistance “L” RCOL DO pin resistance “H” RDOH 1 2 2 3 3 3 4   5 5 7 7 8        Internal circuit operating voltage Internal circuit operating voltage V V V V V V V V V 1 2 2 2 2 2 2   2 2 4 4 4 VDD = 3.5 V, VVM = 0 V VDD = VVM = 1.5 V VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V 1.0  2.5 2.5 2.5 7.0 0.1 10 10 10 µA µA kΩ kΩ kΩ DO pin resistance “L” RDOL 8 2.5 5 10 4 VDO = 0.5 V, VDD = VVM = 1.8 V kΩ [VM INTERNAL RESISTANCE] Internal resistance between VM RVMD 6 100 300 900 3 VDD = 1.8 V, VVM = 0 V kΩ and VDD Internal resistance between VM RVMS 6 10 20 40 3 VDD = 3.5 V, VVM = 1.0 V kΩ and VSS [0 V BATTERY CHARGING FUNCTION] 0 V battery charge starting charger V0CHA 11 0 V battery charging available 1.2 V 2   voltage 0 V battery charge inhibition battery V0INH 12 0 V battery charging unavailable 0.5 V 2   voltage *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Seiko Instruments Inc. 9 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 2. Except Detection Delay Time (−40 to +85 °C*1) Table 6 Parameter Symbol Test condition Remark Rev.1.9_00 (Ta = −40 to +85 °C*1 unless otherwise specified) Test Min. Typ. Max. Unit circuit [DETECTION VOLTAGE] VCU Overcharge detection voltage VCU VCU VCU V 1 1  −0.055 +0.040 VCU = 3.9 V to 4.4 V, 5 mV Step VHC Overcharge hysteresis voltage VHC VHC VHC V 1 1  VHC = 0.0 V to 0.4 V, 50 mV Step −0.025 +0.025 VDL Overdischarge detection voltage VDL VDL VDL V 2 2  VDL = 2.0 V to 3.0 V, 10 mV Step −0.080 +0.080 VHD Overdischarge hysteresis voltage VHD VHD VHD V 2 2  −0.050 +0.050 VHD = 0.0 V to 0.7 V, 100 mV Step VIOV1 VIOV1 VIOV1 Overcurrent 1 detection voltage VIOV1 V 2 3  VIOV1 = 0.05 V to 0.3 V, 10 mV Step −0.021 +0.021 Overcurrent 2 detection voltage VIOV2 3 0.37 0.5 0.63 V 2  Load short-circuiting detection VSHORT 3 0.7 1.2 1.7 V 2  voltage Charger detection voltage VCHA 4 V 2  −1.2 −0.7 −0.2 [INPUT VOLTAGE, OPERATION VOLTAGE] Operation voltage between VDD VDSOP1 Internal circuit operating voltage 1.5 8 V    and VSS Operation voltage between VDD Internal circuit operating voltage 1.5 28 V VDSOP2    and VM [CURRENT CONSUMPTION] Current consumption in normal 5 0.7 3.5 8.0 2 I OPE VDD = 3.5 V, VVM = 0 V µA operation Current consumption at power 5 0.1 2 I PDN VDD = VVM = 1.5 V µA   down [OUTPUT RESISTANCE] CO pin resistance “H” RCOH 7 1.2 5 15 4 VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V kΩ CO pin resistance “L” RCOL 7 1.2 5 15 4 VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V kΩ DO pin resistance “H” RDOH 8 1.2 5 15 4 VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V kΩ DO pin resistance “L” RDOL 8 1.2 5 15 4 VDO = 0.5 V, VDD = VVM = 1.8 V kΩ [VM INTERNAL RESISTANCE] Internal resistance between VM RVMD 6 78 300 1310 kΩ 3 VDD = 1.8 V, VVM = 0 V and VDD Internal resistance between VM RVMS 6 7.2 20 44 3 VDD = 3.5 V, VVM = 1.0 V kΩ and VSS [0 V BATTERY CHARGING FUNCTION] 0 V battery charge starting charger 11 0 V battery charging available 1.7 V 2 V0CHA   voltage 0 V battery charge inhibition battery V0INH 12 0 V battery charging unavailable 0.3 V 2   voltage *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. 10 Seiko Instruments Inc. Rev.1.9_00 3. Detection Delay Time BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 7 S-8261AAG, S-8261AAH, S-8261AAJ, S-8261AAL, S-8261AAM, S-8261AAN, S-8261AAO, S-8261AAP, S-8261AAR, S-8261AAZ, S-8261ABB, S-8261ABC, S-8261ABE, S-8261ABJ, S-8261ABK, S-8261ABM, S-8261ABN, S-8261ABO, S-8261ABP, S-8261ABR, S-8261ABS Test Test Parameter Symbol Remark Min. Typ. Max. Unit condition circuit [DELAY TIME] 25 °C Overcharge detection delay time tCU 9 0.96 1.2 1.4 s 5  Overdischarge detection delay time tDL 9 115 144 173 ms 5  Overcurrent 1 detection delay time tlOV1 10 7.2 9 11 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.8 2.24 2.7 ms 5  Load short-circuiting detection delay tSHORT 10 220 320 380 5 µs  time [DELAY TIME] −40 °C to +85 °C*1 Overcharge detection delay time tCU 9 0.7 1.2 2.0 s 5  Overdischarge detection delay time tDL 9 80 144 245 ms 5  Overcurrent 1 detection delay time tlOV1 10 5 9 15 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.2 2.24 3.8 ms 5  Load short-circuiting detection delay 10 150 320 540 5 tSHORT µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Table 8 S-8261AAS Parameter Symbol Test condition Remark Min. Typ. Max. Unit Test circuit [DELAY TIME] 25 °C Overcharge detection delay time tCU 9 0.96 1.2 1.4 s 5  Overdischarge detection delay time tDL 9 115 144 173 ms 5  Overcurrent 1 detection delay time tlOV1 10 3.6 4.5 5.4 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.8 2.24 2.7 ms 5  Load short-circuiting detection delay tSHORT 10 220 320 380 5 µs  time [DELAY TIME] −40 °C to +85 °C*1 Overcharge detection delay time tCU 9 0.7 1.2 2.0 s 5  Overdischarge detection delay time tDL 9 80 144 245 ms 5  Overcurrent 1 detection delay time tlOV1 10 2.5 4.5 7.7 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.2 2.24 3.8 ms 5  Load short-circuiting detection delay tSHORT 10 150 320 540 5 µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Seiko Instruments Inc. 11 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 9 S-8261AAU, S-8261AAX, S-8261ABA Parameter Symbol Test condition Remark Min. Typ. Max. Rev.1.9_00 Unit Test circuit [DELAY TIME] 25 °C Overcharge detection delay time tCU 9 3.7 4.6 5.5 s 5  Overdischarge detection delay time tDL 9 115 144 173 ms 5  Overcurrent 1 detection delay time tlOV1 10 7.2 9 11 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.8 2.24 2.7 ms 5  Load short-circuiting detection delay tSHORT 10 220 320 380 5 µs  time *1 [DELAY TIME] −40 °C to +85 °C Overcharge detection delay time tCU 9 2.5 4.6 7.8 s 5  Overdischarge detection delay time tDL 9 80 144 245 ms 5  Overcurrent 1 detection delay time tlOV1 10 5 9 15 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.2 2.24 3.8 ms 5  Load short-circuiting detection delay 10 150 320 540 5 tSHORT µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Table 10 S-8261AAV Parameter Symbol Test condition Remark Min. Typ. Max. Unit Test circuit [DELAY TIME] 25 °C Overcharge detection delay time tCU 9 3.7 4.6 5.5 s 5  Overdischarge detection delay time tDL 9 115 144 173 ms 5  Overcurrent 1 detection delay time tlOV1 10 7.2 9 11 ms 5  Overcurrent 2 detection delay time tlOV2 10 3.6 4.5 5.4 ms 5  Load short-circuiting detection delay 10 450 600 720 5 tSHORT µs  time *1 [DELAY TIME] −40 °C to +85 °C Overcharge detection delay time tCU 9 2.5 4.6 7.8 s 5  Overdischarge detection delay time tDL 9 80 144 245 ms 5  Overcurrent 1 detection delay time tlOV1 10 5 9 15 ms 5  Overcurrent 2 detection delay time tlOV2 10 2.5 4.5 7.7 ms 5  Load short-circuiting detection delay 10 310 600 1020 µs 5 tSHORT  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. 12 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 11 S-8261ABD Parameter Symbol Test condition Remark Min. Typ. Max. Unit Test circuit [DELAY TIME] 25°C Overcharge detection delay time tCU 9 1.48 1.84 2.2 s 5  Overdischarge detection delay time tDL 9 92 115 138 ms 5  Overcurrent 1 detection delay time tlOV1 10 5.76 7.2 8.8 ms 5  Overcurrent 2 detection delay time tlOV2 10 2.88 3.6 4.32 ms 5  Load short-circuiting detection delay tSHORT 10 358 488 586 5 µs  time *1 [DELAY TIME] −40°C to +85°C Overcharge detection delay time tCU 9 1.11 1.84 2.89 s 5  Overdischarge detection delay time tDL 9 68.9 115 182.3 ms 5  Overcurrent 1 detection delay time tlOV1 10 4.31 7.2 11.59 ms 5  Overcurrent 2 detection delay time tlOV2 10 2.16 3.6 5.68 ms 5  Load short-circuiting detection delay 10 268 488 770 5 tSHORT µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Table 12 S-8261ABG, S-8261ABI, S-8261ABL Parameter Symbol Test condition Remark Min. Typ. Max. Unit Test circuit [DELAY TIME] 25°C Overcharge detection delay time tCU 9 0.96 1.2 1.4 s 5  Overdischarge detection delay time tDL 9 29 36 43 ms 5  Overcurrent 1 detection delay time tlOV1 10 7.2 9 11 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.8 2.24 2.7 ms 5  Load short-circuiting detection delay 10 220 320 380 5 tSHORT µs  time *1 [DELAY TIME] −40°C to +85°C Overcharge detection delay time tCU 9 0.7 1.2 2.0 s 5  Overdischarge detection delay time tDL 9 20 36 61 ms 5  Overcurrent 1 detection delay time tlOV1 10 5 9 15 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.2 2.24 3.8 ms 5  Load short-circuiting detection delay tSHORT 10 150 320 540 5 µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. Seiko Instruments Inc. 13 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Table 13 S-8261ABH Parameter Symbol Test condition Remark Min. Typ. Max. Rev.1.9_00 Unit Test circuit [DELAY TIME] 25°C Overcharge detection delay time tCU 9 0.24 0.3 0.36 s 5  Overdischarge detection delay time tDL 9 29 36 43 ms 5  Overcurrent 1 detection delay time tlOV1 10 14 18 22 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.8 2.24 2.7 ms 5  Load short-circuiting detection delay 10 220 320 380 5 tSHORT µs  time *1 [DELAY TIME] −40°C to +85°C Overcharge detection delay time tCU 9 0.17 0.3 0.51 s 5  Overdischarge detection delay time tDL 9 20 36 61 ms 5  Overcurrent 1 detection delay time tlOV1 10 10 18 31 ms 5  Overcurrent 2 detection delay time tlOV2 10 1.2 2.24 3.8 ms 5  Load short-circuiting detection delay 10 150 320 540 5 tSHORT µs  time *1. Since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by design, not tested in production. 14 Seiko Instruments Inc. Rev.1.9_00 Test Circuits BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Remark Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (VCO) and DO pin (VDO) are judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. (1) Test Condition 1, Test Circuit 1 〈〈 Overcharge Detection Voltage, Overcharge Hysteresis Voltage〉〉 The overcharge detection voltage (VCU) is defined by the voltage between VDD and VSS at which VCO goes from “H” to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. The overcharge hysteresis voltage (VHC) is then defined as the difference between the overcharge detection voltage (VCU) and the voltage between VDD and VSS at which VCO goes from “H” to “L” when the voltage V1 is gradually decreased. (2) Test Condition 2, Test Circuit 2 〈〈Overdischarge Detection Voltage, Overdischarge Hysteresis Voltage〉〉 The overdischarge detection voltage (VDL) is defined as the voltage between VDD and VSS at which VDO goes from “H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V and V2 = 0 V. The overdischarge hysteresis voltage (VHD) is then defined as the difference between the overdischarge detection voltage (VDL) and the voltage between VDD and VSS at which VDO goes from “H” to “L” when the voltage V1 is gradually increased. (3) Test Condition 3, Test Circuit 2 〈〈 Overcurrent 1 Detection Voltage, Overcurrent 2 Detection Voltage, Load Short-Circuiting Detection Voltage 〉〉 The overcurrent 1 detection voltage (VIOV1) is defined as the voltage between VM and VSS whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of the overcurrent 1 detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition V1 = 3.5 V and V2 = 0 V. The overcurrent 2 detection voltage (VIOV2) is defined as the voltage between VM and VSS whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of the overcurrent 2 detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition V1 = 3.5 V and V2 = 0 V. The load short-circuiting detection voltage (VSHORT) is defined as the voltage between VM and VSS whose delay time for changing VDO from “H” to “L” lies between the minimum and the maximum value of the load short-circuiting detection delay time when the voltage V2 is increased rapidly (within 10 µs) from the starting condition V1 = 3.5 V and V2 = 0 V. (4) Test Condition 4, Test Circuit 2 〈〈 Charger Detection Voltage, Abnormal Charge Current Detection Voltage 〉〉 The charger detection voltage (VCHA) is defined as the voltage between VM and VSS at which VDO goes from “L” to “H” when the voltage V3 is gradually decreased from 0 V after the voltage V1 is gradually increased from the starting condition of V1 = 1.8 V and V2 = 0 V until the voltage V1 becomes V1 = VDL + (VHD / 2). The charger detection voltage can be measured only in the product whose overdischarge hysteresis VHD ≠ 0. Set V1 = 3.5 V and V2 = 0 V. Decrease V2 from 0 V gradually. The voltage between VM and VSS when VCO goes from “H” to “L” is the abnormal charge current detection voltage. The abnormal charge current detection voltage has the same value as the charger detection voltage (VCHA). (5) Test Condition 5, Test Circuit 2 〈〈 Normal Operation Current Consumption, Power-Down Current Consumption〉〉 The operating current consumption (IOPE) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = 3.5 V and V2 = 0 V (Normal condition). The power-down current consumption (IPDN) is the current that flows through the VDD pin (IDD) under the set conditions of V1 = V2 = 1.5 V (Overdischarge condition). Seiko Instruments Inc. 15 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series (6) Test Condition 6, Test Circuit 3 〈〈 Internal Resistance between VM and VDD, Internal Resistance between VM and VSS 〉〉 Rev.1.9_00 The resistance between VM and VDD (RVMD) is the internal resistance between VM and VDD under the set conditions of V1 = 1.8 V and V2 = 0 V. The resistance between VM and VSS (RVMS) is the internal resistance between VM and VDD under the set conditions of V1 = 3.5 V and V2 = 1.0 V. (7) Test Condition 7, Test Circuit 4 〈〈 CO Pin Resistance “H”, CO Pin Resistance “L” 〉〉 The CO pin resistance “H” (RCOH) is the resistance t the CO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V3 = 3.0 V. The CO pin resistance “L” (RCOL) is the resistance t the CO pin under the set condition of V1 = 4.5 V, V2 = 0 V and V3 = 0.5 V. (8) Test Condition 8, Test Circuit 4 〈〈 DO Pin Resistance “H”, DO Pin Resistance “L” 〉〉 The DO pin resistance “H” (RDOH) is the resistance t the DO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V4 = 3.0 V. The DO pin resistance “L” (RDOL) is the resistance t the DO pin under the set condition of V1 = 1.8 V, V2 = 0 V and V4 = 0.5 V. (9) Test Condition 9, Test Circuit 5 〈〈 Overcharge Detection Delay Time, Overdischarge Detection Delay Time 〉〉 The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the voltage V1 momentarily increases (within 10 µs) from the overcharge detection voltage (VCU) − 0.2 V to the overcharge detection voltage (VCU) + 0.2 V under the set condition of V2 = 0 V. The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the voltage V1 momentarily decreases (within 10 µs) from the overdischarge detection voltage (VDL) +0.2 V to the overdischarge detection voltage (VDL) − 0.2 V under the set condition of V2 = 0 V. (10) Test Condition 10, Test Circuit 5 〈〈 Overcurrent 1 Detection Delay Time, Overcurrent 2 Detection Delay Time, Load Short-circuiting Detection Delay Time, Abnormal Charge Current Detection Delay Time 〉〉 The overcurrent 1 detection delay time (tIOV1) is the time needed for VDO to go “L” after the voltage V2 momentarily increases (within 10 µs) from 0 V to 0.35 V under the set condition of V1 = 3.5 V and V2=0 V. The overcurrent 2 detection delay time (tIOV2) is the time needed for VDO to go “L” after the voltage V2 momentarily increases (within 10 µs) from 0 V to 0.7 V under the set condition of V1 = 3.5 V and V2 = 0 V. The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go “L” after the voltage V2 momentarily increases (within 10 µs) from 0 V to 1.6 V under the set condition of V1 = 3.5 V and V2 = 0 V. The abnormal charge current detection delay time is the time needed for VCO to go from “H” to “L” after the voltage V2 momentarily decreases (within 10 µs) from 0 V to −1.1 V under the set condition of V1 = 3.5 V and V2 = 0 V. The abnormal charge current detection delay time has the same value as the overcharge detection delay time. (11) Test Condition 11, Test Circuit 2 (Product with 0 V battery charge function) 〈〈 0 V Battery Charge Starting Charger Voltage 〉〉 The 0 V battery charge starting charger voltage (V0CHA) is defined as the voltage between VDD and VM at which VCO goes “H” (VVM + 0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = 0 V. 16 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series (12) Test Condition 12, Test Circuit 2 (Product with 0 V battery charge inhibition function) 〈〈 0 V Battery Charge Inhibition Battery Voltage 〉〉 The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage between VDD and VSS at which VCO goes “H” (VVM + 0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 = 0 V and V2 = −4 V. R1 = 470 Ω VDD DP V1 IDD A V1 VM VDD DP S-8261 series VSS DO CO S-8261 series VSS DO VDO V VM CO VCO V V2 V VDO VCO V COM COM Test Circuit 1 Test Circuit 2 VDD IDD A V1 VDD DP DP V1 S-8261 series VSS DO VM CO A IVM V2 S-8261 series VSS DO IDO A V4 V3 Test Circuit 4 VM CO A ICO V2 COM Test Circuit 3 VDD DP V1 COM S-8261 series VSS DO VM CO V2 Oscilloscope Oscilloscope COM Test Circuit 5 Figure 5 Seiko Instruments Inc. 17 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Operation Remark Refer to the “Battery Protection IC Connection Example”. 1. Normal Condition Rev.1.9_00 The S-8261 Series monitors the voltage of the battery connected between VDD pin and VSS pin and the voltage difference between VM pin and VSS pin to control charging and discharging. When the battery voltage is in the range from the overdischarge detection voltage (VDL) to the overcharge detection voltage (VCU), and the VM pin voltage is in the range from the charger detection voltage (VCHA) to the overcurrent 1 detection voltage (VIOV1), the IC turns both the charging and discharging control FETs on. This condition is called the normal condition, and in this condition charging and discharging can be carried out freely. Remark When a battery is connected to the IC for the first time, discharging may not be enabled. In this case, short the VM pin and VSS pin or connect the charger to restore the normal condition. 2. Overcurrent Condition (Detection of Overcurrent 1, Overcurrent 2 and Load Short-circuiting) When a battery in the normal status is in the status where the voltage of the VM pin is equal to or higher than the overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for the overcurrent detection delay time, the discharge control FET is turned off and discharging is stopped. This status is called the overcurrent status. In the overcurrent status, the VM and VSS pins are shorted by the resistor between VM and VSS (RVMS) in the IC. However, the voltage of the VM pin is at the VDD potential due to the load as long as the load is connected. When the load is disconnected, the VM pin returns to the VSS potential. This IC detects the status when the impedance between the EB+ pin and EB− pin (Refer to Figure 11) increases and is equal to the impedance that enables automatic restoration and the voltage at the VM pin returns to overcurrent detection voltage 1 (VIOV1) or lower and the overcurrent status is restored to the normal status. Remark The impedance that enables automatic restoration varies depending on the battery voltage and the set value of overcurrent 1 detection voltage. 3. Overcharge Condition When the battery voltage becomes higher than the overcharge detection voltage (VCU) during charging under the normal condition and the detection continues for the overcharge detection delay time (tCU) or longer, the S-8261 Series turns the charging control FET off to stop charging. This condition is called the overcharge condition. The overcharge condition is released by the following two cases ((1) and (2)): (1) When the battery voltage falls below the overcharge release voltage (VCU) − overcharge detection hysteresis voltage (VHC), the S-8261 Series turns the charging control FET on and turns to the normal condition. (2) When a load is connected and discharging starts, the S-8261 Series turns the charging control FET on and returns to the normal condition. Just after the load is connected and discharging starts, the discharging current flows through the parasitic diode in the charging control FET. At this moment the VM pin potential becomes Vf, the voltage for the parasitic diode, higher than VSS level. When the battery voltage goes under the overcharge detection voltage (VCU) and provided that the VM pin voltage is higher than the overcurrent 1 detection voltage, the S-8261 Series releases the overcharge condition. Remark 1. If the battery is charged to a voltage higher than the overcharge detection voltage (VCU) and the battery voltage does not fall below the overcharge detection voltage (VCU) even when a heavy load is connected, the detection of overcurrent 1, overcurrent 2 and load shortcircuiting do not function until the battery voltage falls below over charge detection voltage (VCU). Since an actual battery has an internal impedance of several dozens of mΩ, the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and the detection of overcurrent 1, overcurrent 2 and load short-circuiting function. When a charger is connected after the overcharge detection, the overcharge condition is not released even if the battery voltage is below the overcharge release voltage (VCL). The overcharge condition is released when the VM pin voltage goes over the charger detection voltage (VCHA) by removing the charger. 2. 18 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 4. Overdischarge Condition When the battery voltage falls below the overdischarge detection voltage (VDL) during discharging under the normal condition and the detection continues for the overdischarge detection delay time (tDL) or longer, the S-8261 Series turns the discharging control FET off to stop discharging. This condition is called the overdischarge condition. When the discharging control FET is turned off, the VM pin voltage is pulled up by the resistor between VM and VDD in the IC (RVMD). When the voltage difference between the VM and VDD then is 1.3 V (typ.) or lower, the current consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down condition. The power-down condition is released when a charger is connected and the voltage difference between the VM and VDD becomes 1.3 V (typ.) or higher. Moreover when the battery voltage becomes the overdischarge detection voltage (VDL) or higher, the S-8261 Series turns the discharging FET on and returns to the normal condition. 5. Charger Detection When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is lower than the charger detection voltage (VCHA), the S-8261 Series releases the overdischarge condition and turns the discharging control FET on when the battery voltage becomes equal to or higher than the overdischarge detection voltage (VDL) since the charger detection function works. This action is called charger detection. When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is not lower than the charger detection voltage (VCHA), the S-8261 Series releases the overdischarge condition when the battery voltage reaches the overdischarge detection voltage (VDL) + overdischarge hysteresis (VHD) or higher. 6. Abnormal Charge Current Detection If the VM pin voltage falls below the charger detection voltage (VCHA) during charging under normal condition and it continues for the overcharge detection delay time (tCU) or longer, the charging control FET turns off and charging stops. This action is called the abnormal charge current detection. Abnormal charge current detection works when the DO pin voltage is “H” and the VM pin voltage falls below the charger detection voltage (VCHA). Consequently, if an abnormal charge current flows to an over-discharged battery, the S-8261 Series turns the charging control FET off and stops charging after the battery voltage becomes higher than the overdischarge detection voltage which make the DO pin voltage “H”, and still after the overcharge detection delay time (tCU) elapses. Abnormal charge current detection is released when the voltage difference between VM pin and VSS pin becomes less than charger detection voltage (VCHA). Seiko Instruments Inc. 19 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 7. Delay Circuits Rev.1.9_00 The detection delay times are determined by dividing a clock of the approximately 3.5 kHz with the counter. Remark 1. The detection delay time for overcurrent 2 (tIOV2) and load short-circuiting (tSHORT) start when the overcurrent 1 (VIOV1) is detected. When the overcurrent 2 (VIOV2) or load short-circuiting (VSHORT) is detected over the detection delay time for each of them (= tIOV2 or tSHORT) after the detection of overcurrent 1 (VIOV1), the S-8261 Series turns the FET off within tIOV2 or tSHORT of each detection. VDD DO pin tD VSS Overcurrent 2 detection delay time (tIOV2) VDD VIOV2 VM pin VIOV1 VSS Time Figure 6 2. When the overcurrent is detected and continues for longer than the overdischarge detection delay time (tDL) without releasing the load, the condition changes to the power-down condition when the battery voltage falls below the overdischarge detection voltage (VDL). When the battery voltage falls below the overdischarge detection voltage (VDL) due to the overcurrent, the S-8261 Series turns the discharging control FET off by the overcurrent detection. In this case the recovery of the battery voltage is so slow that if the battery voltage after the overdischarge detection delay time (tDL) is still lower than the over discharge detection voltage (VDL), the S-8261 Series shifts to the power-down condition. 8. DP Pin The DP pin is a test pin for delay time measurement and it should be open in the actual application. If a capacitor whose capacitance is larger than 1000 pF or a resister whose resistance is less than 1 MΩ is connected to this pin, error may occur in the delay times or in the detection voltages. 9. 0 V Battery Charging Function “Available” This function is used to recharge the connected battery whose voltage is 0 V due to the self-discharge. When the 0 V battery charge starting charger voltage (V0CHA) or higher is applied between EB+ pin and EB− pin by connecting a charger, the charging control FET gate is fixed to VDD pin voltage. When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turn-on voltage due to the charger voltage, the charging control FET is turned on to start charging. At this time, the discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than the overdischarge release voltage (VDU), the S-8261 Series enters the normal condition. Caution Some battery providers do not recommend charging for completely self-discharged battery. Please ask battery providers before determine whether to enable or inhibit the 0 V battery charging function. The 0 V battery charge function has higher priority than the abnormal charge current detection function. Consequently, a product with the 0 V battery charging function is enabled charges a battery forcibly and abnormal charge current cannot be detected when the battery voltage is low. Seiko Instruments Inc. 0≦tD≦tIOV2 Time Remark 20 Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 10. 0 V Battery Charging Function “Unavailable” This function inhibits the recharging when a battery that is short-circuited (0 V battery) internally is connected. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charging control FET gate is fixed to EB− pin voltage to inhibit charging. When the battery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or higher, charging can be performed. Caution Some battery providers do not recommend charging for completely self-discharged battery. Please ask battery providers before determining the 0 V battery charging function. Seiko Instruments Inc. 21 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Operation Timing Chart 1. Overcharge and Overdischarge Detection VCU VCU–VHC VDL+VHD VDL Rev.1.9_00 Battery voltage VDD DO pin VSS CO pin VDD VSS VDD VM pin VIOV1 VSS VCHA Charger connection Load connection Overcharge detection delay time (tCU) Mode (1) (2) (1) Overdischarge detection delay time (tDL) (3) (1) Remark (1) Normal condition, (2) Overcharge condition, (3) Overdischarge condition, (4) Overcurrent condition The charger is supposed to charge with constant current. Figure 7 2. Overcurrent Detection Battery voltage VCU VCU−VHC VDL+VHD VDL VDD DO pin VSS VDD CO pin VSS VDD VSHORT VIOV2 VIOV1 VSS Charger connection Load connection Overcurrent 1 detection delay time (tIOV1) Mode (1) (4) (1) Overcurrent 2 detection delay time (tIOV2) (4) (1) Load short-circuiting detection delay time (tSHORT) (4) VM pin (1) Remark (1) Normal condition, (2) Overcharge condition, (3) Overdischarge condition, (4) Overcurrent condition The charger is supposed to charge with constant current. Figure 8 22 Seiko Instruments Inc. Rev.1.9_00 3. Charger Detection VCU VCU−VHC VDL+VHD VDL BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Battery voltage DO pin VDD VSS CO pin VDD VSS VM pin VDD VSS VCHA Charger connection Load connection Overdischarge detection delay time (tDL) Mode (1) In case VM pin voltage < VCHA Overdischarge is released at the overdischarge detection voltage (VDL) (1) (3) Remark (1) Normal condition, (2) Overcharge condition, (3) Overdischarge condition, (4) Overcurrent condition The charger is supposed to charge with constant current. Figure 9 4. Abnormal Charge Current Detection VCU VCU−VHC VDL+VHD VDL VDD DO pin Battery voltage VSS CO pin VDD VSS VDD VSS VCHA Charger connection Load connection Abnormal charging current detection delay time Overdischarge detection delay time (tDL) Mode (1) (3) (1) ( = Overcharge detection delay time (tCU)) (2) (1) VM pin Remark (1) Normal condition, (2) Overcharge condition, (3) Overdischarge condition, (4) Overcurrent condition The charger is supposed to charge with constant current. Figure 10 Seiko Instruments Inc. 23 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Battery Protection IC Connection Example EB+ Rev.1.9_00 R1 VDD 470 Ω Battery C1 0.1 µF S-8261 Series DP VSS DO CO VM FET1 FET2 R2 2 kΩ EB− Figure 11 Table 14 Symbol Part Purpose N-channel FET1 Discharge control MOS FET FET2 N-channel Charge control MOS FET Constant for External Components Typ.   Min.   Max.   Remarks Threshold voltage ≤ Overdischarge detection voltage*1 Gate to source withstanding voltage ≥ Charger voltage*2 Threshold voltage ≤ Overdischarge detection voltage*1 Gate to source withstanding voltage ≥ Charger voltage*2 Resistance should be as small as possible to avoid ESD protection, R1 Resistor 470 Ω 300 Ω 1 kΩ lowering of the overcharge detection accuracy caused For power fluctuation by VDD pin current.*3 Install a capacitor of 0.022 µF or higher between VDD C1 Capacitor For power fluctuation 0.1 µF 0.022 µF 1.0 µF and VSS.*4 Select as large a resistance as large as possible to Protection for reverse R2 Resistor 2 kΩ 300 Ω 4 kΩ prevent current when a charger is connected in connection of a charger reverse.*5 *1. If the threshold voltage of an FET is low, the FET may not cut the charging current. If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stoped before overdischarge is detected. *2. If the withstanding voltage between the gate and source is lower than the charger voltage, the FET may be destroyed. *3. If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a charger is connected in reverse since the current flows from the charger to the IC. Insert a resistor of 300 Ω or higher to R1 for ESD protection. *4. If a capacitor of less than 0.022 µF is connected to C1, DO may oscillate when load short-circuiting is detected. Be sure to connect a capacitor of 0.022 µF or higher to C1. *5. If R2 has a resistance higher than 4 kΩ, the charging current may not be cut when a high-voltage charger is connected. 24 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Caution1. The above constants may be changed without notice. 2. The DP pin should be open. 3. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform through evaluation using the actual application to set the constant. Precautions • • • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. Seiko Instruments Inc. 25 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Characteristics (Typical Data) 1. Detection / Release Voltage Temperature Characteristics Overcharge detection voltage vs. temperature 4.44 4.42 VCU [V] Rev.1.9_00 Overcharge release voltage vs. temperature 4.02 4.00 VCL [V] 3.98 3.96 3.94 4.40 4.38 4.36 4.34 −50 −25 0 25 50 Ta [°C] 75 100 3.92 −50 −25 0 25 50 Ta [°C] 75 100 Overdischarge detection voltage vs. temperature 3.04 3.02 Overdischarge release voltage vs. temperature 3.44 3.42 VDU [V] 3.40 3.38 3.36 VDL [V] 3.00 2.98 2.96 2.94 −50 −25 0 25 50 Ta [°C] 75 100 3.34 −50 −25 0 25 50 Ta [°C] 75 100 Overcurrent 1 detection voltage vs. temperature 0.45 0.40 VIOV1 [V] 0.35 0.30 0.25 0.20 0.15 −50 −25 0 25 50 Ta [°C] 75 100 Overcurrent 2 detection voltage vs. temperature 0.65 0.60 VIOV2 [V] 0.55 0.50 0.45 0.40 −50 −25 0 25 Ta [°C] 50 75 100 Load short-circuiting detection voltage vs.temperature 1.5 1.4 VSHORT [V] 1.3 1.2 1.1 1.0 −50 −25 0 25 50 Ta [°C] 75 100 26 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 2. Current Consumption Temperature Characteristics Current consumption vs. temperature in normal mode 5 4 IOPE [µA] 3 2 1 0 −50 −25 0 25 50 Ta [°C] 75 100 IPDN [µA] Current consumption vs. temperature in power-down mode 0.10 0.08 0.06 0.04 0.02 0 −50 −25 0 25 50 Ta [°C] 75 100 3. Current Consumption Power Voltage Characteristics (Ta=25°C) Current consumption power supply voltage dependency 6 5 IOPE [µA] 4 3 2 1 0 0 2 4 6 VDD [V] 8 10 12 4. Detection / Release Delay Time Temperature Characteristics Overcharge detection delay time vs. temperature 1.50 1.25 1.00 0.75 0.50 −50 Overcharge release delay time vs. temperature 60 50 tCL [ms] 40 30 20 tCU [s] −25 0 25 50 Ta [°C] 75 100 10 −50 −25 0 25 50 Ta [°C] 75 100 Overdischarge detection delay time vs. temperature 200 180 tDL [ms] 160 140 120 100 −50 −25 0 25 50 Ta [°C] 75 100 Seiko Instruments Inc. 27 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series Overcurrent 1 detection delay time vs. temperature 15 13 tIOV1 [ms] tIOV2 [ms] 11 9 7 5 −50 −25 0 25 50 Ta [°C] 75 100 Rev.1.9_00 Overcurrent 2 detection delay time vs. temperature 3.4 3.0 2.6 2.2 1.8 1.4 −50 −25 0 25 50 Ta [°C] 75 100 Load short-circuiting delay time vs. temperature 0.40 0.36 tSHORT [ms] 0.32 0.28 0.24 0.20 0.16 −50 −25 0 25 50 Ta [°C] 75 100 5. Delay Time Power-Voltage Characteristics (Ta=25°C) Overcurrent 1 detection delay time vs. power supply voltage dependency 15 13 tIOV1 [V] 11 9 7 5 2 2.5 3 3.5 VDD [V] 4 4.5 tIOV2 [ms] Overcurrent 2 detection delay time vs. power supply voltage dependency 3.4 3.0 2.6 2.2 1.8 1.4 2 2.5 3 3.5 VDD [V] 4 4.5 Load short-circuiting delay time vs. power supply voltage dependency 0.32 tSHORT [ms] 0.28 0.24 0.2 0.16 2.5 3 3.5 VDD [V] 4 4.5 28 Seiko Instruments Inc. Rev.1.9_00 BATTERY PROTECTION IC FOR SINGLE-CELL PACK S-8261 Series 6. CO Pin / DO Pin Output Current Characteristics (Ta = 25°C) CO pin source current characteristics VDD = 3.5 V, VM = VSS = 0 V −0.5 −0.4 ICO [mA] −0.3 −0.2 −0.1 0 0 1 2 VCO [V] 3 4 ICO [mA] CO pin sink current characteristics VDD = 4.5 V, VM = VSS = 0 V 0.5 0.4 0.3 0.2 0.1 0 0 1 2 3 VCO [V] 4 5 DO pin source current characteristics VDD = 3.5 V, VM = VSS = 0 V −0.5 −0.4 IDO [mA] −0.3 −0.2 −0.1 0 0 1 2 VDO [V] 3 4 DO pin sink current characteristics VDD = 1.8 V, VM = VSS = 0 V 0.5 0.4 IDO [mA] 0.3 0.2 0.1 0 0 0.5 1 VDO [V] 1.5 2 Seiko Instruments Inc. 29 2.9±0.2 1.9±0.2 6 5 4 0.95 1 2 3 0.95 0.15 -0.05 +0.1 0.35±0.15 No. MP006-A-P-SD-1.1 TITLE No. SCALE UNIT SOT236-A-PKG Dimensions MP006-A-P-SD-1.1 mm Seiko Instruments Inc. 4.0±0.1(10 pitches:40.0±0.2) +0.1 ø1.5 -0 2.0±0.05 0.25±0.1 ø1.0 -0 +0.2 4.0±0.1 1.4±0.2 3.2±0.2 321 456 Feed direction No. MP006-A-C-SD-3.1 TITLE No. SCALE UNIT SOT236-A-Carrier Tape MP006-A-C-SD-3.1 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. MP006-A-R-SD-2.1 TITLE No. SCALE UNIT mm SOT236-A-Reel MP006-A-R-SD-2.1 QTY 3,000 Seiko Instruments Inc. R(0.075) 6 5 4 1 2 3 (0.125) 0.8±0.05 0.14±0.05 0.2±0.08 0.5±0.1 0.2±0.08 0.5±0.1 1.8±0.15 The heatsink of back side has different electric potential depending on the product. Confirm specifications of each product. Do not use it as the function of electrode. No. BD006-A-P-SD-3.0 TITLE No. SCALE UNIT SNB6B-A-PKG Dimensions BD006-A-P-SD-3.0 mm Seiko Instruments Inc. ø1.5±0.1 2.0±0.05 4.0±0.1 ø1.1±0.1 4.0±0.1 0.25±0.05 1.1±0.1 2.2±0.1 321 456 Feed direction No. BD006-A-C-SD-2.1 TITLE No. SCALE UNIT SNB6B-A-Carrier Tape BD006-A-C-SD-2.1 mm Seiko Instruments Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 No. BD006-A-R-SD-1.1 TITLE No. SCALE UNIT mm SNB6B-A-Reel BD006-A-R-SD-1.1 QTY. 3,000 Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. 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