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S-8425AAGFT-TB-U

S-8425AAGFT-TB-U

  • 厂商:

    SII(精工半导体)

  • 封装:

    TSSOP8

  • 描述:

    IC POWER SUPPLY

  • 数据手册
  • 价格&库存
S-8425AAGFT-TB-U 数据手册
S-8425 Series BATTERY BACKUP SWITCHING IC www.ablicinc.com N Rev.3.1_02 DE SI G © ABLIC Inc., 2002-2015  NE W The S-8425 Series is a CMOS IC designed for use in the switching circuits of primary and backup power supplies on a single chip. It consists of three voltage regulators, two voltage detectors, a power supply switch and its controller, as well as other functions. In addition to the function for switching between the primary and backup power supply, the S-8425 Series can provide microcontrollers with two types of voltage detection output signals corresponding to the power supply voltage. Moreover, adopting a special sequence for switch control enables the effective use of the backup power supply, making this IC ideal for configuring a backup system. Features MM EN DE D FO R  Low power consumption Normal operation: 15 A max. (VIN  6 V) Backup: 2.1 A max.  Voltage regulator Output voltage tolerance : 2% Output voltage: Independently selectable in 0.1 V steps in the range of 2.3 V to 5.4 V  Two built-in voltage detectors (CS, RESET) Detection voltage tolerance: 2% Detection voltage: Selectable in 0.1 V steps in the range of 2.4 V to 5.3 V (CS voltage detector) Selectable in 0.1 V steps in the range of 1.7 V to 3.4 V (RESET voltage detector)  RESET release delay: 300 s min.  Switching circuit for primary power supply and backup power supply configurable on one chip  Efficient use of backup power supply possible  Special sequence Backup voltage is not output when the primary power supply voltage does not reach the initial voltage at which the switch unit operates.  Lead-free, Sn 100%, halogen-free*1 Packages RE  CO *1. Refer to “ Product Name Structure” for details.  8-Pin TSSOP  8-Pin SON(B) Applications NO T   Camcorders  Digital cameras  Memory cards  SRAM backup equipment 1 BATTERY BACKUP SWITCHING IC S-8425 Series  Rev.3.1_02 Product Name Structure 1. Product Name FT - TB - x DE SI G S-8425A xx N (1) 8-Pin TSSOP Environmental code U: Lead-free (Sn 100%), halogen-free G: Lead-free (for details, please contact our sales office) W IC direction in tape specification NE Package code FT: 8-Pin TSSOP R Serial code PA - TF - G D S-8425A xx FO (2) 8-Pin SON(B) DE Environmental code G: Lead-free (for details, please contact our sales office) MM EN IC direction in tape specification Package code PA: 8-Pin SON(B) CO Serial code 2. Packages RE Package Name 8-Pin TSSOP Environmental code = G Environmental code = U NO T 8-Pin SON(B) 2 Package FT008-A-P-SD FT008-A-P-SD PA008-B-P-SD Drawing Code Tape FT008-E-C-SD FT008-E-C-SD PA008-B-C-SD Reel FT008-E-R-SD FT008-E-R-S1 PA008-B-R-SD BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 Package 8-Pin TSSOP 8-Pin TSSOP 8-Pin SON(B) S-8425AAAFT-TB-x S-8425AAGFT-TB-U S-8425AAAPA-TF-G RESET Voltage (V) CS Voltage (V) Switch Voltage (V) VRO VOUT VCH VDET1 VDET1 VDET2 VDET2 VSW1 3.000 3.000 3.300 3.300 3.401 2.200 2.312 VDET1  0.85 3.000 2.800 2.800 4.300 4.441 1.800 1.880 VDET1  0.85 3.000 3.000 3.300 3.300 3.401 2.200 2.312 VDET1  0.85 W Set the CS voltage so that the switch voltage (VSW1) is equal to or greater than the RESET detection voltage (VDET2). NE Caution Output Voltage (V) DE SI G Product Name N 3. Product Name List Remark 1 The selection range is as follows. 2.3 to 5.4 V (0.1 V steps) VDET1: 2.4 to 5.3 V (0.1 V steps) VDET2: 1.7 to 3.4 V (0.1 V steps ) VSW1: VDET1  0.85 or VDET1  0.77 FO R VRO, VOUT, VCH: NO T RE CO MM EN DE D 2. Please contact our sales office for the products with a voltage other than those specified above. 3. x: G or U 4. Please select products of environmental code = U for Sn 100%, halogen-free products. 3 BATTERY BACKUP SWITCHING IC S-8425 Series  Rev.3.1_02 Block Diagram N VOUT DE SI G M1 VIN REG2 VBAT RESET Voltage detector V SW2 detector CS Delay circuit NE CS Voltage detector D FO R Switch controller DE VSS NO T RE CO MM EN Figure 1 4 RESET W V SW1 detector Block Diagram REG1 VRO REG3 VCH BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 VCH VBAT CS 1 2 8 7 VRO 3 4 6 5 VOUT VIN RESET VBAT CS 1 2 8 7 VRO 3 4 6 5 VOUT Ground Output pin of voltage regulator 3 Backup power supply input pin Output pin of CS voltage detector Output pin of RESET voltage detector Output pin of voltage regulator 2 Primary power supply input pin Output pin of voltage regulator 1 VI N RESET Pin Configurations Mount capacitors between VSS (GND) and the VIN, VBAT, VOUT, VRO, and VCH pins (see the Standard Circuit section). RE CO MM EN DE D *1. VSS VCH*1 VBAT*1 CS RESET VOUT*1 VIN*1 VRO*1 FO Figure 2 1 2 3 4 5 6 7 8 R VSS VCH Description NE 8-Pin SON(B) Top View Symbol DE SI G VSS Pin No. W 8-Pin TSSOP Top View N Pin Configurations NO T  5 BATTERY BACKUP SWITCHING IC S-8425 Series  Rev.3.1_02 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings Symbol Absolute Maximum Rating Primary power supply input voltage Backup power supply input voltage Output voltage of voltage regulator CS output voltage RESET output voltage VIN VBAT VRO, VOUT, VCH VCS VRESET VSS0.3 to VSS18 VSS0.3 to VSS18 VSS0.3 to VIN0.3 VSS0.3 to VSS18 300 (When not mounted on board) 700*1 300 (When not mounted on board) 750*1 40 to 85 40 to 125 W 8-Pin TSSOP Power dissipation PD NE 8-Pin SON(B) Operating ambient temperature Storage temperature Unit DE SI G Item N (Ta  25C, unless otherwise specified) Topr Tstg V V V V V mW mW mW mW C C FO R *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm  76.2 mm  t1.6 mm (2) Board name: JEDEC STANDARD51-7 DE 700 8-Pin SON(B) 600 500 400 CO 300 8-Pin TSSOP 200 100 0 0 50 100 150 NO T Ambient Temperature Ta (C) 6 Figure 3 Power Dissipation PD (mW) (2) MM EN When mounted on board 800 RE Power Dissipation PD (mW) (1) The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. D Caution When not mounted on board 400 300 8-Pin TSSOP 200 100 8-Pin SON(B) 0 0 50 100 150 Ambient Temperature Ta (C) Power Dissipation of Package BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02  Electrical Characteristics S-8425AAAFT, S-8425AAAPA Item VRO Dropout voltage 1 Vdrop1 IRO  3 mA VRO1 VIN 7.2 V, IRO  100 A to 20 mA Input stability 1 VRO2 VIN  4 V to 16 V, IRO  3 mA Output voltage temperature coefficient 1 VOUT VIN  7.2 V, IOUT  23 mA Vdrop2 IOUT  23 mA Max. Unit 2.940 3.000 3.060 V  41 59 mV  50 100 mV  5 20 mV 100  ppm/C 2.940 3.000 3.060 V  187 252 mV VOUT1 VIN  7.2 V, IOUT  100 A to 60 mA  50 100 mV Input stability 2 VOUT2 VIN  4 V to 16 V, IOUT  23 mA  5 20 mV 100  ppm/C 3.234 3.300 3.366 V  90 120 mV Ta  40C to 85C  R VOUT Ta  VOUT Output voltage temperature coefficient 2 NE Load stability 2 Output voltage 3 VCH Dropout voltage 3 Vdrop3 ICH  3 mA Load stability 3 VCH1 VIN  7.2 V, ICH  100 A to 10 mA  50 100 mV Input stability 3 VCH2 VIN  4.3 V to 16 V, ICH  3 mA  5 20 mV  100  ppm/C VDET1 CS detection voltage VDET1 RESET detection voltage VDET2 RESET release delay time Operating voltage D  VOUT voltage detection  tDELAY  VIN or VBAT 3.482 V 2.200 2.244 V 2.256 2.312 2.367 V 0.3 0.8  ms 1.7  16 V   VDET2 Ta  (  VDET2) Ta  40C to 85C  100  ppm/C ISINK ILEAK VDS  0.5 V RESET 1.50 2.30  mA VIN  VBAT  2.0 V CS 1.50 2.30  mA A VDS  16 V, VIN  16 V VBAT switch leakage current ILEAK VIN  3.6 V, VBAT  0 V RSW   0.1 VDET1 VDET1 VDET1  0.83  0.85  0.87 Test Circuit 1 2 9 2 3 V 4 V 5 VOUT VOUT VOUT  0.93  0.95  0.97   0.1 A 6  30 60  7 VIN  Open, VBAT  3 V, IOUT  10 A to 500 A VSW 1 Ta  VSW 1 Ta  40C to 85C  100  ppm/C 4 VSW 2 Ta  VSW 2 Ta  40C to 85C  100  ppm/C 5 ISS1 VIN  3.6 V,  7 15 A IBAT1 VBAT  3 V   0.1 A  1.0 2.1 A   3.5 A 2.0  4.0 V IBAT2 Backup power supply input voltage 3.401 ppm/C VBAT  3 V, VOUT voltage detection Current consumption 3.319 2.156  VSW2 CS output inhibit voltage temperature V V 100 CS output inhibit voltage Switch voltage temperature coefficient 16 3.366  VBAT  2.8 V, VIN voltage detection VBAT switch resistance  3.300 Ta  40C to 85C VSW1 Switch voltage  3.234   VDET1 Ta  (  VDET1) CO RE  VIN voltage detection VDET2 Vopr Detection voltage temperature coefficient Sink current Ta  40C to 85C MM EN CS release voltage RESET release voltage FO VIN  7.2 V, ICH  3 mA VCH Ta  VCH VIN coefficient T o t a l Ta  40C to 85C Dropout voltage 2 NO T u n i t Typ.  Output voltage 2 Leakage current S w i t c h Min. W VRO Ta  VRO Primary power input voltage d e t e c t o r VIN  7.2 V, IRO  3 mA Load stability 1 Output voltage temperature coefficient 3 V o l t a g e Condition DE r e g u l a t o r N Symbol Output voltage 1 V o l t a g e Electrical Characteristics (Ta  25C, Unless otherwise specified) DE SI G Table 2 VBAT Unload VIN  Open, VBAT  3 V Ta  25C Unload Ta  85C  8 7 Remark The number in the Test Circuit column corresponds to the circuit number in the Test Circuits section. 7 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 S-8425AAGFT Output voltage 1 VRO Dropout voltage 1 Vdrop1 IRO  3 mA Load stability 1 VRO1 VIN 7.2 V, IRO  100 A to 20 mA Input stability 1 VRO2 VIN  4 V to 16 V, IRO  3 mA Output voltage 2 VOUT VIN  7.2 V, IOUT  23 mA Dropout voltage 2 Vdrop2 IOUT  23 mA 3.060 V 41 59 mV  50 100 mV  5 20 mV 100  ppm/C 2.744 2.800 2.856 V  187 252 mV  50 100 mV Input stability 2 VOUT2 VIN  3.8 V to 16 V, IOUT  23 mA  5 20 mV 100  ppm/C 2.744 2.800 2.856 V  90 120 mV VOUT Ta  VOUT Output voltage temperature coefficient 2 Ta  40C to 85C NE VIN  7.2 V, IOUT  100 A to 60 mA  Output voltage 3 VCH Dropout voltage 3 Vdrop3 ICH  3 mA Load stability 3 VCH1 VIN  7.2 V, ICH  100 A to 10 mA  50 100 mV Input stability 3 VCH2 VIN  3.8 V to 16 V, ICH  3 mA  5 20 mV Ta  40C to 85C  100  ppm/C VCH Ta  VCH VDET1 CS release voltage VDET1 RESET detection voltage VDET2 RESET release voltage VDET2  VIN or VBAT V 1.764 1.800 1.836 V 1.835 1.880 1.925 V 0.3 0.8  ms 1.7  16 V Ta  40C to 85C  100  ppm/C ILEAK VDS  0.5 V RESET 1.50 2.30  mA VIN  VBAT  2.0 V CS 1.50 2.30  mA A VDS  16 V, VIN  16 V VBAT switch leakage current ILEAK VIN  3.6 V, VBAT  0 V RE 4.548   VDET2 Ta  (  VDET2) VBAT  3 V, VOUT voltage detection RSW   0.1 VDET1 VDET1 VDET1  0.83  0.85  0.87 1 2 9 2 3 V 4 V 5 VOUT VOUT VOUT  0.93  0.95  0.97   0.1 A 6  30 60  7 VIN  Open, VBAT  3 V, IOUT  10 A to 500 A Ta  40C to 85C  100  ppm/C 4 VSW 2 Ta  VSW 2 Ta  40C to 85C  100  ppm/C 5 ISS1 VIN  3.6 V,  7 15 A IBAT1 VBAT  3 V   0.1 A  1.0 2.1 A   3.5 A 2.0  4.0 V VBAT Unload VIN  Open, VBAT  3 V Ta  25C Unload Ta  85C  Remark The number in the Test Circuit column corresponds to the circuit number in the Test Circuits section. 8 Test Circuit VSW 1 Ta  VSW 1 IBAT2 Backup power supply input voltage 4.441 ppm/C VSW2 Current consumption 4.335  CS output inhibit voltage CS output inhibit voltage temperature V V 100 VBAT  2.8 V, VIN voltage detection Switch voltage temperature coefficient 16 4.386  VSW1 VBAT switch resistance  4.300 Ta  40C to 85C ISINK Switch voltage  4.214   VDET1 Ta  (  VDET1) CO Sink current  tDELAY Vopr Detection voltage temperature coefficient  VOUT voltage detection MM EN RESET release delay time Operating voltage  VIN voltage detection DE CS detection voltage R VIN  7.2 V, ICH  3 mA VIN coefficient T o t a l 3.000 VOUT1 NO T u n i t Unit Load stability 2 Leakage current S w i t c h Max.   Ta  40C to 85C Typ. 2.940 W Output voltage temperature coefficient 1 Primary power input voltage d e t e c t o r VIN  7.2 V, IRO  3 mA VRO Ta  VRO Output voltage temperature coefficient 3 V o l t a g e Min. FO r e g u l a t o r Condition D V o l t a g e Symbol N Item Electrical Characteristics (Ta  25C, Unless otherwise specified) DE SI G Table 3 8 7 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 Test Circuits 2. or VCH VIN VSS 100 k 100 k VRO, VOUT VIN N 1. ↓ 10 F V DE SI G  VBAT VOUT VIN VIN V RESET CS VSS 4. VSS RESET VIN A V A VBAT V VOUT V VSS R VBAT VOUT CS VIN VIN VBAT NE 3. W V FO VDS Measure the value after applying 6 V to VIN. 6. 100 k VSS DE F.G. Oscilloscope VOUT VIN Oscilloscope VBAT CS VIN VBAT VIN A VSS VIN IOUT ↓ VSS RE NO T VBAT VIN VOUT VBAT ISS V A A IBAT VSS VIN VBAT Leave open and measure the value after applying 6 V to VIN. 9. VIN 8. CO VBAT MM EN VBAT 7. D 5. To measure IBAT2, apply 6 V to VIN and then leave VIN open and measure IBAT. 100 k VOUT VIN VSS RESET Oscilloscope Figure 4 Test Circuits 9 BATTERY BACKUP SWITCHING IC S-8425 Series Timing Chart DE SI G N  Rev.3.1_02 VIN (V) NE W VRO, VCH (V) FO R VOUT (V) DE D VBAT (V) MM EN VCS (V) CO VRESET (V) tDELAY CS and RESET are pulled up to VOUT. The Y-axis is an arbitrary scale. NO T Remark RE tDELAY 10 Figure 5 Timing Chart tDELAY tDELAY BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 Operation DE SI G The internal configuration of the S-8425 Series is as follows.  Voltage regulator 1, which stabilizes input voltage VIN and outputs it to VRO  Voltage regulator 2, which stabilizes input voltage VIN and outputs it to VOUT  Voltage regulator 3, which stabilizes input voltage VIN and outputs it to VCH  CS voltage detector, which monitors input voltage VIN  RESET voltage detector, which monitors output voltage VOUT  Switch unit N  The functions and operations of the above-listed elements are described below. NE W 1. Voltage Regulators The S-8425 Series features on-chip voltage regulators with a small dropout voltage. The voltage of the VRO, VOUT, and VCH pins (the output pins of the voltage regulator) can separately be selected for the output voltage in 0.1 V steps between the range of 2.3 to 5.4 V. MM EN DE D FO R [Dropout voltage Vdrop1, Vdrop2, Vdrop3] Assume that the voltage output from the VRO pin is VRO(E) under the conditions of output voltage 1 described in the electrical characteristics table. VIN1 is defined as the input voltage at which the output voltage from the VRO pin becomes 98% of VRO(E) when the input voltage VIN is decreased. Then, the dropout voltage Vdrop1 is calculated by the following expression. Vdrop1  VIN1  VRO(E)  0.98 Similarly, assume that the voltage of the VOUT pin is VOUT(E), and VCH(E) respectively under the conditions of output voltage 2 and 3 described in the electrical characteristics table. VIN2 and VIN3 are defined as the input voltages at which the output voltage from the VOUT pin becomes 98% of VOUT(E) and VCH(E), respectively. Then, the dropout voltages Vdrop2 and Vdrop3 are calculated by the following expression. Vdrop2  VIN2  VOUT(E)  0.98 Vdrop3  VIN3  VCH(E)  0.98 CO 2. Voltage Detector The S-8425 Series incorporates two high-precision, low power consuming voltage detectors with hysteresis characteristics. The power of the CS voltage detector is supplied from the VIN and VBAT pins. Therefore, the output is stable as long as the primary or backup power supply is within the operating voltage range (1.7 to 16 V). All outputs are Nch open-drain, and need pull-up resistors of about 100 k. RE 2.1 CS Voltage Detector The CS voltage detector monitors the input voltage VIN (VIN pin voltage). The detection voltage can be selected from between 2.4 and 5.3 V in 0.1 V steps. The result of detection is output at the CS pin: “Low” for lower voltage than the detection level and “High” for higher voltage than the release level (however, when the VOUT pin voltage is the CS output inhibit voltage (VSW2), a low level is output). NO T Input voltage Release voltage Detection voltage Output voltage Figure 6 Definition of Detection and Release Voltages 11 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 DE SI G N 2.2 RESET Voltage Detector The RESET voltage detector monitors the output voltage VOUT (VOUT pin voltage). The detection voltage can be selected from between 1.7 V and 3.4 V in 0.1 V steps. The result of detection is output at the RESET pin: “Low” for a lower voltage than the detection level and “High” for a higher voltage than the release level. RESET outputs the normal logic if the VOUT pin voltage is 1.0 V or more. The S-8425 Series incorporates a RESET release delay circuit. [RESET release delay time (tDELAY)] The interval from when the VOUT pin voltage exceeds the RESET release voltage value (VDET2) until the output of the RESET pin is actually inverted is called the RESET release delay time. NE W VOUT V VDET2 FO R VRESET t Definition of RESET Release Delay Time (tDELAY) DE Figure 7 D tDELAY MM EN 3. Switch Unit The switch unit consists of the VSW1 and VSW2 VIN detectors, a switch controller, voltage regulator 2, and switch transistor M1 (see Figure 8 Switch Unit). NO T RE CO 3.1 VSW1 Detector The VSW1 detector monitors the power supply voltage VIN and sends the results of detection to the switch controller. The detection voltage (VSW1) can be set to 77 2% or 85 2% of the CS release voltage VDET1. 12 VOUT M1 REG2 Switch controller Figure 8 VBAT VSW1 detector Switch Unit VSW2 detector BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 DE SI G N 3.2 VSW2 Detector The VSW2 detector monitors the VOUT pin voltage and keeps the CS release voltage output low until the VOUT pin voltage rises to VSW2 voltage. The CS pin output then changes from low to high if the VIN pin voltage is more than the CS release voltage (VDET1) when the VOUT pin voltage rises to 95 2% of the output voltage of voltage regulator 2 (VOUT). The CS pin output changes from high to low regardless of the VSW2 voltage when the VIN pin voltage drops to less than the CS detection voltage (VDET1). The CS pin output remains high if the VIN pin voltage stays higher than the CS detection voltage (VDET1) when the VOUT pin voltage drops to less than the VSW2 voltage due to an undershoot. NE W 3.3 Switch Controller The switch controller controls voltage regulator 2 and switch transistor M1. There are two statuses corresponding to the power supply voltage VIN (or power supply voltage VBAT) sequence: a special sequence status and a normal sequence status. When the power supply voltage VIN rises and becomes equal to or exceeds the CS release voltage (VDET1), the normal sequence status is entered, but until then the special sequence status is maintained. D FO R (1) Special sequence status The switch controller sets voltage regulator 2 ON and switch transistor M1 OFF from the initial status until the primary power supply voltage VIN is connected and reaches more than the CS release voltage (VDET1) in order to prevent consumption of the backup power supply regardless of the VSW1 detector status. This status is called the special sequence status. CO MM EN DE (2) Normal sequence status The switch controller enters the normal sequence status from the special sequence status once the primary power supply voltage VIN reaches more than the CS release voltage (VDET1). Once the normal sequence is entered, the switch controller switches voltage regulator 2 and switch transistor M1 ON/OFF as shown in Table 4 according to the power supply voltage VIN. The time required for voltage regulator 2 to be switched from OFF to ON is a few hundred s at most. During this interval, voltage regulator 2 and switch transistor M1 may both switch OFF and the VOUT pin voltage may drop. To prevent this, connect a capacitor of 10 F or more to the VOUT pin. When the VOUT pin voltage becomes lower than the RESET detection voltage, the status returns to the special sequence status. ON/OFF Switching of Voltage Regulator 2 and Switch Transistor M1 According to Power Supply Voltage VIN RE Table 4 Voltage Regulator 2 Switch Transistor M1 VOUT Pin Voltage VIN  VSW1 ON OFF VOUT VIN  VSW1 OFF ON VBAT  Vdif NO T Power Supply Voltage VIN 13 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 VOUT Vdif VIN N REG2 VBAT M1 DE SI G 3.4 Switch Transistor M1 Voltage regulator 2 is also used to switch from the VIN pin to the VOUT pin. Therefore, no reverse current flows from the VOUT pin to the VIN pin when voltage regulator 2 is OFF. The output voltage of voltage regulator 2 can be selected from between 2.3 V and 5.4 V in 0.1 V steps. NO T RE CO MM EN DE D FO R NE W Figure 9 Definition of Vdif The on-resistance of switch transistor M1 is 60  or lower (I OUT  10 to 500 A). Therefore, when M1 is switched ON and the VOUT pin is connected to the VBAT pin, the voltage drop Vdif caused by M1 is 60  IOUT (output current) at maximum, and VBAT  Vdif (max.) is output to the VOUT pin at minimum. When voltage regulator 2 is ON and M1 is OFF, the leakage current of M1 is kept below 0.1 A max. (VIN  6 V, Ta  25°C) with the VBAT pin grounded (VSS pin). 14 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02  Transient Response DE SI G N 1. Line Transient Response Against Input Voltage Variation The input voltage variation differs depending on whether the power supply input (0 V10 V square wave) is applied or the power supply variation (6 V10 V square waves) is applied. This section describes the ringing waveforms and parameter dependency of each type. The test circuit is shown for reference. Power supply application: 0 V10 V square wave Fast amplifier 10 V Input voltage 0V VIN VSS P.G. Undershoot Figure 11 Test Circuit FO R Power Supply Application: 0 V10 V Square Wave Power Supply Application VRO pin DE COUT  22 F, IOUT  50 mA, Ta  25C 10V 0V MM EN Input voltage (5 V/div) D VOUT pin Output voltage (0.5 V/div) CRO  22 F, IRO  30 mA, Ta  25C 10V 0V Input voltage (5 V/div) Output voltage (0.5 V/div) CO t (100 s/div) Ringing Waveform of Power Supply Application (VOUT Pin) t (100 s/div) Figure 13 Ringing Waveform of Power Supply Application (VRO Pin) RE Figure 12 VCH pin RL NE Output voltage COUT Oscilloscope W Overshoot Figure 10 S-8425 VOUT Series CCH  10 F, ICH  10 mA, Ta  25C 10V NO T 0V Input voltage (5 V/div) Output voltage (0.5 V/div) t (100 s/div) Figure 14 Ringing Waveform of Power Supply Application (VCH Pin) 15 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 Power supply variation: 6 V10 V square waves Input voltage 6 V DE SI G VIN VOUT S-8425 Series N Fast amplifier 10 V VSS Overshoot Output voltage P.G. Undershoot Power Supply Variation: 6 V10 V Square Waves Test Circuit W Figure 16 NE Figure 15 COUT Power Supply Variation R VOUT pin FO COUT  22 F, IOUT  50 mA, Ta  25C 10V 10V Input voltage (4 V/div) 6V DE D 6V MM EN Output voltage (50 mV/div) t (100 s/div) 10V RE VRO pin Ringing Waveform of Power Supply Variation (VOUT Pin) CO Figure 17 Input voltage (4 V/div) CRO  22 F, IRO  30 mA, Ta  25C 10V 6V NO T 6V Output voltage (50 mV/div) t (100 s/div) Figure 18 16 Ringing Waveform of Power Supply Variation (VRO Pin) RL Oscilloscope BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 VCH pin CCH  10 F, ICH  10 mA, Ta  25C 10V 6V N 10V 6V DE SI G Input voltage (4 V/div) Ringing Waveform of Power Supply Variation (VCH Pin) NO T RE CO MM EN DE D FO R Figure 19 NE t (100 s/div) W Output voltage (50 mV/div) 17 BATTERY BACKUP SWITCHING IC S-8425 Series Reference data: Rev.3.1_02 Dependency of output current (IOUT), load capacitance (COUT), input variation width (VIN), temperature (Ta) DE SI G N For reference, the following pages describe the results of measuring the ringing amounts at the VOUT and VRO pins using the output current (IOUT), load capacitance (COUT), input variation width (VIN), and temperature (Ta) as parameters. 1.1 IOUT Dependency (1) VOUT pin (2) VRO pin COUT  22 F, VIN  6 V10 V, Ta  25C CRO  22 F, VIN  6 V10 V, Ta  25C 0.15 0.15 0.10 20 40 IOUT (mA) 0.00 60 D 0 0.05 FO 0.05 0.00 0.20 R 0.10 W 0.20 NE Ringing amount (V) 0.25 0 20 40 IRO (mA) 60 DE Ringing amount (V) 0.25 (3) VCH pin CCH  10 F, VIN  6 V10 V, Ta  25C MM EN 0.20 0.15 CO 0.10 0.05 0 NO T 0.00 RE Ringing amount (V) 0.25 18 20 40 IICH (mA) OUT (mA) Overshoot 60 Undershoot BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 1.2 COUT Dependency (2) VRO pin 0.50 0.50 0.40 0.40 0.10 0.00 0 10 20 30 40 R 0 10 20 30 40 50 CRO (F) FO (3) VCH pin ICH  10 mA, VIN  6 V10 V, Ta  25C D 0.50 DE 0.40 0.30 0.20 0.10 0 10 MM EN Ringing amount (V) 0.10 0.00 50 COUT (F) 0.00 0.20 W 0.20 0.30 NE 0.30 DE SI G IRO  30 mA, VIN  6 V10 V, Ta  25C Ringing amount (V) Ringing amount (V) IOUT  50 mA, VIN  6 V10 V, Ta  25C N (1) VOUT pin 20 30 40 50 Overshoot Undershoot NO T RE CO CCH (F) 19 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 N 1.3 VIN Dependency VIN shows the difference between the low voltage fixed to 6 V and the high voltage. For example, VIN  2 V means the difference between 6 V and 8 V. (2) VRO pin IRO  30 mA, CRO  22 F, Ta  25C 0.30 0.20 0.15 0.10 0.10 2 3 VIN (V) 4 5 2 3 VIN (V) 4 5 D 1 DE 0.30 0 R 1 FO 0 ICH  10 mA, CCH  10 F, Ta  25C MM EN 0.25 0.20 0.15 0.10 0.05 1 2 3 VIN (V) NO T RE 0 CO Ringing amount (V) 0.15 0.00 (3) VCH pin 20 0.20 0.05 0.05 0.00 0.25 W 0.25 NE Ringing amount (V) Ringing amount (V) 0.30 0.00 DE SI G (1) VOUT pin IOUT  50 mA, COUT  22 F, Ta  25C 4 5 Overshoot Undershoot BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 1.4 Temperature Dependency 0.30 0.25 0.25 0.15 0.10 0.05 50 0 50 Ta (C) 50 0 50 Ta (C) 100 FO DE MM EN Ringing amount (V)  66 V V10 V V V VIN IN  and 10 ICH  10 mA CCH  10 F 0.15 0.10 0.05 50 0 50 Ta (C) 100 Overshoot Undershoot NO T RE CO 0.00 V  6 V10 V VIN IN  6 and 10 V IRO  30 mA CRO  22 F D 0.30 0.20 0.05 0.00 100 (3) VCH pin 0.25 0.10 R 0.00 0.15 NE 6 6 V10 V VIN and 10 VV IN  IOUT  50 mA COUT  22 F 0.20 W 0.20 DE SI G 0.30 N (2) VRO pin Ringing amount (V) Ringing amount (V) (1) VOUT pin 21 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 Output current 50 mA VOUT VIN 10 A S-8425 Series Overshoot Output Output current voltage DE SI G N 2. Load Transient Response Based on Output Current Fluctuation The overshoot and undershoot are caused in the output voltage if the output current fluctuates between 10 A and 50 mA (VRO is between 10 A and 30 mA, VCH is between 10 A and 10 mA) while the input voltage is constant. Figure 20 shows the output voltage variation due to the output current. Figure 21 shows the test circuit for reference. The latter half of this section describes ringing waveform and parameter dependency. VSS COUT NE W Undershoot Oscilloscope Figure 20 Output Voltage Variation due to Output Current Figure 21 Test Circuit R Figures 22 to 24 show the ringing waveforms at the VOUT, VRO, and VCH pins due to the load variation. FO VOUT pin VIN  6.0 V, COUT  22 F, Ta  25C 10 A 50 mA 10 A DE Output current D 50 mA MM EN Output voltage (50 mV/div) NO T RE CO t (500 ms/div) t (50 s/div) Figure 22 Ringing Waveform due to Load Variation (VOUT Pin) 22 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 VRO pin 30 mA 30 mA 10 A 10 A Output voltage W (20 mV/div) DE SI G Output current N VIN  6.0 V, CRO  22 F, Ta  25C NE t (20 ms/div) t (50 s/div) Figure 23 Ringing Waveform due to Load Variation (VRO Pin) R VCH pin FO VIN  6.0 V, CCH  10 F, Ta  25C 10 mA Output current 10 A 10 mA D 10 A DE Output voltage MM EN (10 mV/div) t (5 ms/div) Ringing Waveform due to Load Variation (VCH Pin) NO T RE CO Figure 24 t (50 s/div) 23 BATTERY BACKUP SWITCHING IC S-8425 Series Dependency of input voltage (VIN), load capacitance (COUT), output variation width (IOUT), temperature (Ta) N Reference data: Rev.3.1_02 DE SI G 2.1 VIN Dependency (2) VRO pin COUT  22 F, IOUT  50 mA10 A, Ta  25C CRO  22 F, IRO  30 mA10 A, Ta  25C 0.12 0.10 0.10 0.06 0.04 0.00 4 5 6 7 8 9 0.06 0.04 0.02 R 0.02 0.08 W 0.08 NE Ringing amount (V) 0.12 0.00 10 FO Ringing amount (V) (1) VOUT pin VIN (V) (3) VCH pin 4 5 6 7 8 9 10 VIN (V) D CCH  10 F, ICH  10 mA10 A, Ta  25C DE 0.12 MM EN 0.08 0.06 0.04 0.02 0.00 4 CO Ringing amount (V) 0.10 5 6 7 NO T RE VIN (V) 24 8 Overshoot 9 10 Undershoot BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 2.2 COUT Dependency (2) VRO pin 0.30 0.50 0.25 0.40 0.30 0.20 0.00 0 10 20 30 40 0.20 0.15 0.10 0.05 NE 0.10 0.00 50 10 20 30 40 50 R CCH  10 F, ICH  10 mA10 A, Ta  25C 0.60 DE D 0.50 FO (3) VCH pin 0.40 0.30 0.20 0.10 0 10 MM EN Ringing amount (V) 0 CRO (F) COUT (F) 0.00 DE SI G 0.60 N VIN  6.0 V, IRO  30 mA10 A, Ta  25C Ringing amount (V) Ringing amount (V) VIN  6.0 V, IOUT  50 mA10 A, Ta  25C W (1) VOUT pin 20 30 40 50 Overshoot Undershoot NO T RE CO CCH (F) 25 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 N 2.3 IOUT Dependency IOUT and IRO show the fluctuation between the low current stabilized at 10 A and the high current. For example, IOUT  10 mA means a fluctuation between 10 A and 10 mA. (2) VRO pin CRO  22 F, VIN  6 V, Ta  25C 0.12 0.10 0.08 0.06 0.02 0.06 0.04 0.02 0.00 10 20 30 40 50 60 FO 0 R 0.00 IOUT (mA) 0.12 MM EN 0.10 10 20 30 40 50 60 IRO (mA) DE CCH  10 F, VIN  6 V, Ta  25C 0 D (3) VCH pin 0.08 0.06 0.04 CO Ringing amount (V) 0.08 NE 0.04 0.10 W Ringing amount (V) Ringing amount (V) 0.12 0.02 RE 0.00 0 10 20 30 40 50 60 NO T ICH (mA) 26 DE SI G (1) VOUT pin COUT  22 F, VIN  6 V, Ta  25C Overshoot Undershoot BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 2.4 Temperature Dependency 0.08 0.14 0.07 0.10 0.08 0.06 0.04 0.04 0.03 0.02 0.01 0.00 0.00 0 50 50 100 R 50 0 50 100 Ta (C) FO Ta (C) (3) VCH pin D VIN  6 V, ICH  10 mA10 A, CCH  10 F 0.16 DE 0.14 0.12 0.10 MM EN Ringing amount (V) 0.05 NE 0.02 0.06 W 0.12 DE SI G 0.16 N (2) VRO pin VIN  6.0 V, IRO  30 mA10 A, CRO  22 F Ringing amount (V) Ringing amount (V) (1) VOUT pin VIN  6.0 V, IOUT  50 A10 A, COUT  22 F 0.08 0.06 0.04 0.00 50 CO 0.02 0 50 Overshoot Undershoot NO T RE Ta (C) 100 27 BATTERY BACKUP SWITCHING IC S-8425 Series Standard Circuit VCH  10 F VCH 1 k VRO VBAT VIN VOUT 6V   S-8425 Series 10 F 10 F VOUT 10 F RESET R 100 k Standard Circuit FO Figure 25 3V NE VOUT 100 k 0.1 F W VOUT VSS CS DE SI G VRO  N  Rev.3.1_02 Caution  Be sure to add a 10 F or more capacitor to the VOUT, VRO, and VCH pins. NO T RE CO MM EN DE D  The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. 28 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02  Precautions FO When Using Secondary Battery as Backup Battery R Application Circuit  10 F D  VIN 10 F 6V S-8425 Series VRO MM EN  DE VCH VOUT VBAT 100 k 10 F VCC 100 k  10 F CS Microcontroller INT 0.1 F 3V RESET RESET The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. RE Caution CO VSS Remark NO T  NE W DE SI G N  In applications in which any one of IRO, IOUT, or ICH is small, the output voltages VRO, VOUT, and VCH may rise, causing the load stability to exceed standard levels. Set IRO, IOUT, or ICH to 10 A or more.  Attach the proper capacitor to the VOUT pin to prevent the RESET voltage detector (which monitors the VOUT pin) from becoming active due to undershoot.  Watch for overshoot and ensure it does not exceed the ratings of the IC chips and/or capacitors attached to the VRO, VOUT, and VCH pins.  Add a 10 F or more capacitor to the VOUT, VRO, and VCH pins.  Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit.  ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. The backup battery can be floating-recharged by using voltage regulator 3. Figure 26 Application Circuit 29 BATTERY BACKUP SWITCHING IC S-8425 Series  Rev.3.1_02 Characteristics 1. Voltage Regulator Unit 3.2 2.8 IRO  90 mA 2.4 2.0 2.0 3.0 4.0 4.0 5.0 FO R VIN (V) VIN (V) 4.0 D IRO  90 mA 2.4 3.0 3.0 5.0 DE VRO (V) IRO  10 mA 2.8 2.0 2.0 IRO  90 mA 2.4 NE VIN (V) (3) Ta  40C IRO  10 mA, 30 mA, 50 mA, 70 mA, 90 mA 3.2 2.8 2.0 2.0 5.0 IRO  10 mA W IRO  10 mA VRO (V) VRO (V) 3.2 DE SI G N 1.1 Input Voltage (VIN) vs. Output Voltage (VRO) Characteristics (REG1) (VRO  3.0 V) (1) Ta  85C (2) Ta  25C IRO 10 mA, 30 mA, 50 mA, 70 mA, 90 mA IRO  10 mA, 30 mA, 50 mA, 70 mA, 90 mA 2.4 2.0 2.0 CO 2.8 IOUT  90 mA 3.0 4.0 5.0 VIN (V) NO T (3) Ta  40C IOUT  10 mA, 30 mA, 50 mA, 70 mA, 90 mA VOUT (V) 3.2 IOUT  10 mA 2.8 2.4 IOUT  90 mA 2.0 2.0 30 3.0 VIN (V) 4.0 5.0 3.2 VOUT (V) IOUT  10 mA RE VOUT (V) 3.2 MM EN 1.2 Input Voltage (VIN) vs. Output Voltage (VOUT) Characteristics (REG2) (VOUT  3.0 V ) (1) Ta  85C (2) Ta  25C IOUT  10 mA, 30 mA, 50 mA, 70 mA, 90 mA IOUT  10 mA, 30 mA, 50 mA, 70 mA, 90 mA IOUT  10 mA 2.8 2.4 2.0 2.0 IOUT  90 mA 3.0 4.0 VIN (V) 5.0 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 N 1.3 Input Voltage (VIN) vs. Output Voltage (VOUT) Characteristics (REG3) (VCH  3.3 V) (1) Ta  85C (2) Ta  25C 3.5 VCH (V) ICH  10 mA 3.1 2.7 ICH  70 mA 3.0 4.0 5.0 VIN (V) 6.0 ICH  10 mA 3.1 2.7 ICH  70 mA 2.3 2.0 7.0 IRO  10 mA, 30 mA, 50 mA, 70 mA 6.0 7.0 R ICH  10 mA 2.7 FO 3.1 ICH  70 mA 4.0 5.0 VIN (V) 6.0 7.0 D 3.0 NO T RE CO MM EN DE 2.3 2.0 4.0 5.0 VIN (V) NE (3) Ta  40C 3.5 3.0 W 2.3 2.0 VCH (V) VCH (V) 3.5 IRO  10 mA, 30 mA, 50 mA, 70 mA DE SI G IRO  10 mA, 30 mA, 50 mA, 70 mA 31 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 0.8 Vdrop2 (V) 0.8 Vdrop1 (V) 1.0 Ta  85C 25C  40C 0.6 0.4 0.2 0 0.4 0.02 0.04 0.0 0.06 0 FO D 0.4 0.0 0.02 0.04 ICH (A) 0.06 DE 0 MM EN 1.7 Output Current (IRO) vs. Output Voltage (VRO) Characteristics 3.2 Ta 40C 25C 85C 3.1 2.9 1 100  10 m 1 RE 2.8 VIN 6 V CO 3.0 IRO (A) NO T 3.2 Ta 40C 25C 85C 3.0 2.9 2.8 VIN 6 V 1 100  10 m ICH (A) 3.2 Ta 40C 25C 85C 3.1 3.0 2.9 2.8 VIN 6 V 1 100  10 m IOUT (A) 1.9 Output Current (IOUT) vs. Output Voltage (VCH) Characteristics 3.1 1.8 Output Current (IOUT) vs. Output Voltage (VOUT) Characteristics VOUT (V) Vdrop3 (V) R Ta = 85C 25C 40C 0.8 V RO (V) 0.06 NE 2.0 1.2 0.04 IOUT (A) 1.6 Output Current (ICH) vs. Dropout Voltage (Vdrop3) Characteristics 1.6 0.02 W IRO (A) VCH (V) Ta = 85C 25C 40C 0.6 0.2 0.0 32 DE SI G 1.0 N 1.5 Output Current (IOUT) vs. Dropout Voltage (Vdrop2) Characteristics 1.4 Output Current (IRO) vs. Dropout Voltage (Vdrop1) Characteristics 1 1 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 1.11 Output Voltage (VOUT) Temperature Characteristics 30 30 VOUT (mV) 10 VIN = 6 V, IOUT = 50 mA Based on VOUT voltage when Ta is 25C 20 VIN = 6 V, IRO = 30 mA Based on VRO voltage when Ta is 25C 0 10 20 30 10 DE SI G 20 VRO (mV) N 1.10 Output Voltage (VRO) Temperature Characteristics 0 10 20 30 40 20 0 20 40 60 80 40 100 20 VIN = 6 V, ICH = 10 mA Based on VCH voltage when Ta is 25C 80 100 R 20 0 20 40 60 80 100 D 40 FO 20 DE Ta (C) 1.13 Input Stability (VRO2) Temperature Characteristics MM EN 20 15 10 5 40 20 CO 0 0 20 40 60 80 100 Ta (C) 1.14 Input Stability (VOUT2) Temperature Characteristics 20 VOUT2(mV) VCH (mV) 0 10 30 VRO2 (mV) 60 NE 30 10 40 Ta (C) 1.12 Output Voltage (VCH) Temperature Characteristics 20 20 W Ta (C) 0 15 10 5 0 -40 -20 0 20 40 60 80 100 Ta (C) RE 1.15 Input Stability (VCH2) Temperature Characteristics 20 VCH2 (mV) NO T 15 10 5 0 40 20 0 20 40 60 80 100 Ta (C) 33 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 40 30 30 20 10 0 20 10 0 40 20 0 20 40 60 80 40 100 20 NE 40 R 20 10 FO VCH1 (mV) 30 0 0 20 40 80 100 NO T RE CO MM EN DE Ta (C) 60 D 20 34 20 Ta (C) 1.18 Load Stability (VCH1) Temperature Characteristics 40 0 W Ta (C) DE SI G 40 N 1.17 Load Stability (VOUT1) Temperature Characteristics VOUT1 (mV) VRO1 (mV) 1.16 Load Stability (VRO1) Temperature Characteristics 40 60 80 100 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 2. Voltage Detector 2.1 CS Voltage Detector (VDET1  3.3 V) (1) Detection voltage (VDET1) temperature characteristics 30 20 25 Based on CS (VDET1) voltage when Ta is 25C) CS ISINK (mA) 0 10 20 0 20 40 Ta (C) 60 80 VIN  1.7 V VIN = VBAT = 2.0 V, VDS = 0.5 V 8 0.0 1.0 4 0 20 40 60 80 VDS (V) 100 20 MM EN 2.2 RESET Voltage Detector (VDET2  2.4 V) (1) Detection voltage (VDET2) temperature characteristics Based on RESET (VDET2) voltage 10 when Ta is 25C 10 20 0 20 40 60 80 30 25 VIN  3 V Ta  25C 20 15 10 VIN  1.7 V 5 0 0.0 100 RE 40 CO 0 (2) Output current (ISINK) characteristics RESET ISINK (mA) 20 DE 40 Ta (C) 1.0 2.0 Ta (C) NO T 6 5 Delay time (ms) VIN  V BAT  2.0 V, V DS  0.5 V 6 4 2 4 3 20 40 Ta (C) 60 80 100 Worst 2 Typ 1 0 0 4.0 (4) RESET release delay time 10  40  20 3.0 VDS (V) (3) Output current (ISINK) temperature characteristics RESET ISINK (mA) 4.0 D 2 0 3.0 FO 6 8 2.0 R 10 CS ISINK (mA) 10 0 100 (3) Output current (ISINK) temperature characteristics  RESET (mV) 15 NE 40 20 VIN  3 V 20 5 20 0 Ta  25C W CS (mV) 10 DE SI G N (2) Output current (ISINK) characteristics  40  20 0 20 40 60 80 100 Ta (C) 35 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 3. Switch Unit 3.1 Switch Voltage (VSW1) Temperature Characteristics N 3.2 CS Output Inhibit Voltage (VSW2) Temperature Characteristics 20 20 0 10 20 40  20 0 20 40 60 80 0 10 20 100 40 20 Ta (C) 60 80 100 W NE RSW () 30 R 30 VBAT  3 V, IOUT  500 A 40 20 20 FO RSW () 50 IOUT  500 A 40 10 10 2 3 4 VBAT (V) DE 30 20 15 10 5  40  20 0 MM EN VIN  6.0 V, IBAT  0 V 25 20 40 RE CO Ta (C) NO T 0 5 D 1 3.5 VBAT Switch Leakage Current (ILEAK) Temperature Characteristics ILEAK (nA) 40 60 50 36 20 3.4 VBAT Switch Resistance (RSW) Temperature Characteristics 60 0 0 Ta (C) 3.3 Input Voltage (VBAT) vs. VBAT Switch Resistance (RSW) Characteristics 0 DE SI G 10 Based on V SW1 voltage when Ta is 25C  VSW2 (mV)  VSW1 (mV) Based on VSW2 voltage when Ta is 25C 10 60 80 100  40  20 0 20 Ta (C) 40 60 80 100 BATTERY BACKUP SWITCHING IC S-8425 Series Rev.3.1_02 4. Current Consumption 4.2 VBAT vs. VBAT2 Current Consumption (IBAT2) Characteristics 16 IBAT2 (A) 4 1.0 0.5 0 2 4 6 8 10 VIN (V) 12 14 16 0.0 2.0 18 (2) IBAT2 16 2.0 4.0 IBAT2 (A) VIN  6.0 V, VBAT  3.0 V 1.5 VIN  open, VBAT  3.0 V FO ISS1 (A) 3.6 R (1) ISS1 12 2.8 3.2 VBAT (V) NE 4.3 Current Consumption Temperature Characteristics 2.4 W ISS1 (A) Ta  85C 25C  40C 1.5 8 8 4 1.0 40  20 0 20 40 80 100 0.0 40  20 0 20 40 60 80 100 Ta (C) NO T RE CO MM EN Ta (C) 60 D 0.5 DE 0 DE SI G 2.0 Ta  85C 25C  40C 12 0 N 4.1 VIN vs. VIN Current Consumption (ISS1) Characteristics 37 +0.3 5 1 4 NE W DE SI G 8 N 3.00 -0.2 DE D FO R 0.17±0.05 MM EN 0.2±0.1 CO 0.65 NO T RE No. FT008-A-P-SD-1.2 TITLE TSSOP8-E-PKG Dimensions No. FT008-A-P-SD-1.2 ANGLE UNIT mm ABLIC Inc. 4.0±0.1 2.0±0.05 ø1.55±0.05 DE SI G N 0.3±0.05 +0.1 8.0±0.1 NE W ø1.55 -0.05 FO R (4.4) +0.4 MM EN DE D 6.6 -0.2 8 1 4 Feed direction NO T RE CO 5 No. FT008-E-C-SD-1.0 TITLE TSSOP8-E-Carrier Tape FT008-E-C-SD-1.0 No. ANGLE UNIT mm ABLIC Inc. N DE SI G W NE R FO D 2±0.5 ø13±0.5 CO MM EN ø21±0.8 17.5±1.0 DE Enlarged drawing in the central part 13.4±1.0 NO T RE No. FT008-E-R-SD-1.0 TITLE TSSOP8-E-Reel No. FT008-E-R-SD-1.0 QTY. ANGLE UNIT mm ABLIC Inc. 3,000 N DE SI G W NE R FO D 2±0.5 ø13±0.5 CO MM EN ø21±0.8 17.5±1.0 DE Enlarged drawing in the central part 13.4±1.0 NO T RE No. FT008-E-R-S1-1.0 TITLE TSSOP8-E-Reel FT008-E-R-S1-1.0 No. QTY. ANGLE UNIT mm ABLIC Inc. 4,000 0.80±0.1 3.00±0.2 DE SI G N 0.525typ. (2.4) NE W (ø1.0) +0.1 DE D FO R 0.125 -0.05 MM EN 0.65 +0.1 CO 0.30 -0.05 NO T RE No. PA008-B-P-SD-4.0 TITLE SON8B-B-PKG Dimensions PA008-B-P-SD-4.0 No. ANGLE UNIT mm ABLIC Inc. N 8.0±0.1 4.0±0.1 ø1.55±0.05 NE W DE SI G 2.0±0.05 1.2±0.1 ø1.55±0.05 0.3±0.05 5 8 DE 1 MM EN 4 D FO R 3.4±0.1 Feed direction NO T RE CO No. PA008-B-C-SD-1.1 TITLE SON8B-B-Carrier Tape No. PA008-B-C-SD-1.1 ANGLE UNIT mm ABLIC Inc. FO R NE W DE SI G N 2±0.3 D MM EN DE Enlarged drawing in the central part 13.5±0.5 CO ø13±0.2 NO T RE No. PA008-B-R-SD-1.1 TITLE SON8B-B-Reel No. PA008-B-R-SD-1.1 QTY. ANGLE UNIT mm ABLIC Inc. 3,000 Disclaimers (Handling Precautions) All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein. 4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the products outside their specified ranges. 5. When using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc. Especially, the products cannot be used for life support devices, devices implanted in the human body and devices that directly affect human life, etc. Prior consultation with our sales office is required when considering the above uses. ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products. 9. Semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system must be sufficiently evaluated and applied on customer's own responsibility. MM EN DE D FO R NE W DE SI G N 1. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. CO 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. RE 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party without the express permission of ABLIC Inc. is strictly prohibited. NO T 14. For more details on the information described herein, contact our sales office. 2.0-2018.01 www.ablicinc.com
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