S-8551

Rev.2.1_01 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series The S-8550/8551 Series is a CMOS synchronous rectification step-down switching regulator which mainly consists of a reference voltage circuit, an oscillator, an error amplifier, a phase compensation circuit, a PWM controller, an under voltage lockout circuit (UVLO), a current limit circuit, and a power MOS FET. The oscillation frequency is high at 1.2 MHz, so a high efficiency, large output current, step-down switching regulator can be achieved by using small external parts. The built-in synchronous rectification circuit makes achieving high efficiency easier compared with conventional step-down switching regulators. A ceramic capacitor can be used as an output capacitor. High-density mounting is supported by adopting a small SOT-23-5 package. The S-8550 and S-8551 Series are offered according to different pin configuration. Features • Oscillation frequency : 1.2 MHz • Input voltage range : 2.0 to 5.5 V • Output voltage range : Arbitrarily settable by external output voltage setting resistor • Output current : 600 mA • Reference voltage : 0.6 V ±2.0% • Efficiency : 92% • Soft-start function : 1 ms typ. • Shutdown function : Shutdown current consumption : 1.0 µA max. • Built-in current limit circuit • Pch power MOS FET on-resistance : 0.4 Ω typ. • Nch power MOS FET on-resistance : 0.3 Ω typ. • Constant continuous mode operation (no light load mode) • Small package : SOT-23-5 • Lead-free products Applications • Mobile devices, such as mobile phones, Bluetooth devices, wireless devices, digital audio players, digital still cameras, portable DVD players, and portable CD players Package Package Name SOT-23-5 Drawing Code Package MP005-A Tape MP005-A Reel MP005-A Seiko Instruments Inc. 1 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Block Diagram VIN Current limit circuit FB Error amplifier − + Reference voltage + − PWM comparator Triangular wave generation circuit VIN CIN ON/OFF circuit UVLO circuit *1 Rev.2.1_01 IC internal power supply PWM control circuit *1 CONT L CFB RFB1 RFB2 VOUT COUT ON/OFF VSS *1. Parasitic diode Figure 1 2 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series Product Name Structure Product name S-855 x A A - M5T1 G Package name (abbreviation) and packing specification*1 M5T1 : SOT-23-5, tape Oscillation frequency A : 1.2 MHz Pin configuration setting 0 : Pin configuration 1 1 : Pin configuration 2 *2 *1. *2. Refer to the taping specifications at the end of this book. Refer to Table 1 and Table 2 of “ Pin Configurations”. Seiko Instruments Inc. 3 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 Pin Configurations Table 1 SOT-23-5 Top view 5 4 S-8550 Series (Pin Configuration 1) Description IC power supply pin GND pin Shutdown pin “H” : Power on (normal operation) “L” : Power off (standby) Output voltage feedback pin External inductor connection pin VIN VSS Pin No. 1 2 3 4 5 Symbol ON/OFF FB CONT 1 2 3 Figure 2 Table 2 Pin No. 1 2 3 4 5 S-8551 Series (Pin Configuration 2) Description Shutdown pin “H” : Power on (normal operation) “L” : Power off (standby) VSS GND pin External inductor connection pin IC power supply pin Output voltage feedback pin Symbol ON/OFF CONT VIN FB 4 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series Absolute Maximum Ratings Table 3 Parameter VIN pin voltage FB pin voltage CONT pin voltage ON/OFF pin voltage CONT pin current Power dissipation Operating temperature Storage temperature [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution 1. The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. (Refer to Figure 3.) 2. Since this IC has a built-in power MOS FET, make sure that dissipation of the power MOS FET does not exceed the allowable power dissipation of the package. Generally, dissipation of a switching regulator can be calculated by the following equation. Dissipation = (100 (%) − efficiency (%)) / efficiency (%) × output voltage × load current The greater part of dissipation depends on the built-in power MOS FET, however, dissipation of the inductor is also included. In addition, since power dissipation of the package also changes according to a mounting board or a mounting state, fully check them using an actually mounted mode. 700 Power dissipation (PD) [mW] 600 500 400 300 200 100 0 0 50 100 150 Ambient temperature (Ta) [°C] Absolute Maximum Ratings (Unless otherwise specified: Ta = 25°C, VSS = 0 V) Absolute Maximum Rating VSS − 0.3 to VSS + 6.0 VSS − 0.3 to VIN + 0.3 VSS − 0.3 to VIN + 0.3 VSS − 0.3 to VIN + 0.3 1300 600*1 −40 to +85 −40 to +125 Unit V V V V mA mW °C °C Symbol VIN VFB VCONT VON/OFF ICONT PD Topr Tstg *1. When mounted on printed circuit board Figure 3 Power Dissipation of Package (Mounted on Board) Seiko Instruments Inc. 5 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 Electrical Characteristics Table 4 Electrical Characteristics Test Circuit 2 2 2 2 1 1 1 1 1 1 2 2 2 2 1 1 2 (Unless otherwise specified: VIN = 3.6 V, VOUT = 1.8 V (the conditions in Table 5), Ta = 25°C) Parameter Operating input voltage Output voltage range*1 FB voltage FB voltage temperature coefficient FB pin input current Current consumption during shutdown Current consumption 1 Power MOS FET on-resistance Power MOS FET leakage current Limit current Oscillation frequency Soft-start time High level input voltage Low level input voltage High level input current Low level input current UVLO detection voltage Symbol VIN VOUT VFB ∆VFB ∆Ta IFB ISSS ISS1 RPFET RNFET ILSW ILIM fosc tSS VSH VSL ISH ISL VUVLO Conditions  VIN = VOUT(S) + 0.4 V to 5.5 V VIN = VOUT(S) + 0.4 V to 5.5 V Ta = −40°C to +85°C VIN = 2.0 V to 5.5 V, FB pin VIN = 2.0 V to 5.5 V, VON/OFF = 0 V fosc = 1.2 MHz, no external parts, VFB = VFB(S) × 1.1 V ICONT = 100 mA ICONT = −100 mA VIN = 2.0 V to 5.5 V, VON/OFF = 0 V, VCONT = 0 or 3.6 V   Time required to reach 90% of VOUT(S) VIN = 2.0 V to 5.5 V, ON/OFF pin VIN = 2.0 V to 5.5 V, ON/OFF pin VIN = 2.0 V to 5.5 V, ON/OFF pin VIN = 2.0 V to 5.5 V, ON/OFF pin  Min. 2.0 1.1 0.588  −0.1      800 1.02 0.7 0.9  −0.1 −0.1 1.4 Typ.   0.6 ±100   200 0.4 0.3 ±0.01 1000 1.2 1.0     1.6 Max. 5.5 4.0 0.612  +0.1 1.0 400 0.6 0.5 ±0.5 1200 1.38 1.3  0.3 0.1 0.1 1.78 Unit V V V ppm/°C µA µA µA Ω µA mA MHz ms V V µA µA V *1. VOUT(S) is the output voltage set value, and VOUT is the typ. value of the actual output voltage. VOUT(S) can be set depending on the ratio between the VFB value and output voltage set resistors (RFB1, RFB2). For details, refer to “ External Parts Selection”. External Parts When Measuring Electrical Characteristics Table 5 Element Name Inductor Input capacitor Output capacitor Output voltage set resistor 1 Output voltage set resistor 2 Phase compensation capacitor Symbol L CIN COUT RFB1 RFB2 CFB Constant 3.3 µH 4.7 µF 10 µ F 36 k Ω 18 k Ω 68 pF External Parts Manufacturer Taiyo Yuden Co., Ltd. TDK Corporation TDK Corporation Rohm Co., Ltd. Rohm Co., Ltd. Murata Manufacturing Co., Ltd. Part Number NR4018T3R3M C3216X7R1E475K C3216X7R1C106K MCR03 Series 3602 MCR03 Series 1802 GRM1882C1H680J 6 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series Test Circuits 1. A VIN CIN CONT FB ↓ S-855xA ON/OFF VSS Figure 4 2. VIN CIN CONT FB L COUT RFB1 CFB VOUT S-855xA ON/OFF VSS V RFB2 V ↓ IOUT Figure 5 Seiko Instruments Inc. 7 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Operation 1. Synchronous rectification PWM control step-down switching regulator Synchronous rectification Rev.2.1_01 1.1 The synchronous rectification method lowers voltage drop to greatly reduce power dissipation since an Nch power MOS FET, having resistance much lower than conventional switching regulators, is used. In conventional switching regulators, current flows in the diode connected between the GND and CONT pins when the Pch power MOS FET is off. The forward drop voltage (Vf) of such diodes is large, between 0.3 to Synchronous rectification ultra-low resistance Nch 0.7 V, so the power dissipation used to be very large. the Pch driver. transistors repeat on and off, in synchronization with the operation of the Pch driver, in the reverse cycle of Moreover, the built-in P and N through prevention circuit helps much reduction of power consumption during operation. 1.2 PWM control The S-8550/8551 Series is a switching regulator using a pulse width modulation method (PWM) and features low current consumption. In conventional PWM control switching regulators, pulses are skipped when the output load current is low, causing a fluctuation in the ripple frequency of the output voltage, resulting in an increase in the ripple voltage. In the S-8550/8551 Series, the switching frequency does not change, although the pulse width changes from 0 to 100% corresponding to each load current. The ripple voltage generated from switching can thus be removed easily using a filter because the switching frequency is constant. 2. Soft-start function The soft-start circuit built in the S-8550/8551 Series controls the rush current and the overshoot of the output voltage when powering on, the ON/OFF pin is switched from the “L” level to the “H” level, or the UVLO operation is released. A reference voltage adjustment method is adopted as the soft-start method. 3. Shutdown pin This pin stops or starts step-up operations. Switching the shutdown pin to the “L” level stops operation of all the internal circuits and reduces the current consumption significantly. pulled down internally. DO NOT use the shutdown pin in a floating state because it is not pulled up or If the shutdown pin is not used, connect it to the VIN pin. DO NOT apply voltage of between 0.3 and 0.9 V to the shutdown pin because applying such a voltage increases the current consumption. Table 6 Shutdown Pin “H” “L” CR Oscillation Circuit Operates Stops VIN Output Voltage Set value Hi-Z ON/OFF VSS Figure 6 8 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 4. S-8550/8551 Series Current limit circuit A current limit circuit is built in the S-8550/8551 Series. The current limit circuit monitors the current that flows in the Pch power MOS FET and limits current in order to prevent thermal destruction of the IC due to an overload or magnetic saturation of the inductor. When a current exceeding the current limit detection value flows in the Pch power MOS FET, the current limit circuit operates and turns off the Pch power MOS FET since the current limit detection until one clock of the oscillator ends. The Pch power MOS FET is turned on in the next clock and the current limit circuit resumes If the value of the current that flows in the Pch power MOS FET remains the current detection operation. current limit detection value or more, the current limit circuit functions again and the same operation is repeated. Once the value of the current that flows in the Pch power MOS FET is lowered up to the specified value, the normal operation status restores. released. The current limit detection value is fixed to 1 A (typ.) in the IC. actually limited increases. If the time taken for the current limit to be detected is shorter than the time required for the current limit circuit in the IC to detect, the current value that is Generally, the voltage difference between the VIN and VOUT pins is large, the current limit detection status is reached faster and the current value increases. A slight overshoot is generated in the output voltage when the current limit is 5. 100% duty cycle The S-8550/8551 Series operates up to the maximum duty cycle at 100%. FET is kept on and current can be supplied to the load. FET are subtracted. Even when the input voltage is lowered up to the output voltage value set using the external output voltage setting resistor, the Pch power MOS The output voltage at this time is the input voltage from which the voltage drop due to the direct resistance of the inductor and the on-resistance of the Pch power MOS 6. UVLO function The S-8550/8551 Series includes a UVLO (under-voltage lockout) circuit to prevent the IC from malfunctioning due to a transient status when power is applied or a momentary drop of the supply voltage. Hi-Z. When UVLO is in the detection state, the Pch and Nch power MOS FETs stop switching operation, and the CONT pin become Once the S-8550/8551 is in the UVLO detection status, the soft-start function is reset, but the soft-start operates by the releasing operation of UVLO after that. Note that the other internal circuits operate normally and that the status is different from the power-off status. The hysteresis width is set for the UVLO circuit to prevent a malfunction due to a noise that is generated in the input voltage. A voltage about 150 mV (typ.) higher than the UVLO detection voltage is the release voltage. Seiko Instruments Inc. 9 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 Operation Principle The S-8550/8551 Series is a step-down synchronous rectification switching regulator based on constant PWM control. Figure 7 shows the basic circuit diagram. When the Pch power MOS FET is turned off, the VOUT is kept constant by controlling the A step-down switching regulator starts current supply by the input voltage (VIN) when the Pch power MOS FET is turned on and holds energy in the inductor at the same time. current held in the inductor is released. The released current flows in the smoothing circuit, with the energy loss With the PWM control method, VOUT is made constant by controlling held minimum, supplies the output voltage (VOUT) lower than VIN. switching frequency (fosc) and ON time (ton). the ON time with fOSC unchanged. I1 Pch power MOS FET L VIN Control circuit I2 Nch power MOS FET COUT VOUT Figure 7 Basic Circuit Drawing of Step-down Switching Regulator 1. Continuous mode The following explains how the current flows to the inductor when the step-down operation is constant and stable. When the Pch power MOS FET is turned on, current I1 flows in the direction shown by the arrow in Figure 7, and energy is stored in the inductor (L). current (IOUT) is started at the same time. When the output capacitor (COUT) is charged, supply of the output The inductor current (IL) gradually increases in proportion to the ON When the Pch Consequently, time (tON) of the Pch power MOS FET as shown in Figure 8 (changes from IL min. to IL max.). power MOS FET is turned off, the Nch power MOS FET is turned on and IL tries to hold IL max. current I2 flows in the direction shown by the arrow in Figure 7. reaches IL min. when the OFF time (tOFF) has elapsed. turned off and the next cycle is entered. changes from IL min. to IL max. As a result, IL gradually decreases and When tOFF has elapsed, the Nch power MOS FET is The above sequence is repeated. As explained in the above, the continuous mode refers to the operation in the current cycle in which IL linearly Even if IL min. is less than 0 A, IL min. keeps flowing (backflow current flows). IL IL max. IL min. ton T = 1/fOSC toff t Figure 8 Continuous Mode (Current Cycle of Inductor Current (IL)) 10 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 2. S-8550/8551 Series Backflow current The S-8550/8551 Series performs PWM synchronous rectification even if IL min. is less than 0 A, so a backflow current is generated in VIN and the backflow current becomes maximum when no load is applied (see Figure 9). Use the following equation to calculate the maximum backflow current value, which should be taken into consideration when designing. Duty (IOUT = 0) = VOUT / VIN Example : VIN = 3.6 V, VOUT = 1.8 V …… Duty = 50% ∆IL = ∆V / L × ton = (VIN − VOUT) × Duty / (L × fOSC) Example : VIN = 3.6 V, VOUT = 1.8 V, fOSC = 1.2 MHz, L = 3.3 µH …… ∆IL = 227 mA IL max. = ∆IL / 2 = 113.5 mA, IL min. = −∆IL / 2 = −113.5 mA The current value waveform of the inductor is a triangular wave, of which the maximum value is IL max. and the minimum value is IL min. (negative value), and the negative value (the portion marked by diagonal lines in Figure 9) backflows when no load is applied (see Figure 9). If about 113.5 mA of IOUT flows in the above conditions, the minimum value (IL min.) of the triangular wave is made 0 mA and no backflow current flows. When an input capacitor (CIN) is connected, the backflow current is absorbed by CIN, thus reducing the backflow current to flow in the power supply. power supply (see Figure 10). The above presents the conditions required to prevent backflow current from flowing, which is only a guideline. Perform sufficient confirmation using an actual application. Be sure to connect an input capacitor to reduce backflow current to the Inductor current with no load IL Inductor current when load is a current of 113.5 mA IL 227 mA IL max. ∆IL IL min. Backflow current = 0 mA 113.5 mA 0 mA IOUT −113.5 mA Figure 9 IL max. ∆IL Backflow current IL min. 113.5 mA IOUT 0 mA Example of Conditions to Prevent Backflow Current from Flowing VIN Backflow current VIN CIN CONT Inductor current IL VOUT Figure 10 Backflow Current Seiko Instruments Inc. 11 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 External Parts Selection 1. Inductor The inductance (L value) has a strong influence on the maximum output current (IOUT) and efficiency (η). The peak current (IPK) increases by decreasing L and the stability of the circuit improves and IOUT increases. L is decreased further, the current drive capability of the external transistor is insufficient and IOUT decreases. If the L value is increased, the loss due to IPK of the power MOS FET decreases and the efficiency becomes maximum at a certain L value. DC resistance of the inductor. The recommended L value for the S-8550/8551 Series is 3.3 µH. When selecting an inductor, note the allowable current of the inductor. If a current exceeding this allowable IPK is expressed by the Further increasing L decreases the efficiency due to the increased loss of the If current flows through the inductor, magnetic saturation occurs, substantially lowering the efficiency. Therefore, select an inductor so that IPK does not exceed the allowable current. following equations in the discontinuous mode and continuous mode. IPK = IOUT + VOUT × (VIN − VOUT) 2 × fOSC × L × VIN fOSC = Oscillation frequency Table 7 Manufacturer Taiyo Yuden Co., Ltd. Part Number NR4018T3R3M NR3012T3R3M Sumida Corporation CDRH3D16/HP-3R3 CDRH2D11/HP-3R3 TDK Corporation VLF4012AT-3R3M VLF3010AT-3R3M FDK Corporation MIP3226D3R3M MIPS2520D3R3M Typical Inductors L Value 3.3 µH 3.3 µH 3.3 µH 3.3 µH 3.3 µH 3.3 µH 3.3 µH 3.3 µH DC Resistance 0.07 Ω max. 0.1 Ω max. 0.085 Ω max. 0.173 Ω max. 0.12 Ω max. 0.17 Ω max. 0.104 Ω max. 0.156 Ω max. Rated Current 1.23 A max. 0.91 A max. 1.40 A max. 0.9 A max. 1.3 A max. 0.87 A max. 1.2 A max. 1.0 A max. Dimensions (L × W × H) [mm] 4.0 × 4.0 × 1.8 3.0 × 3.0 × 1.2 4.0 × 4.0 × 1.8 3.2 × 3.2 × 1.2 3.7 × 3.5 × 1.2 2.6 × 2.8 × 1.0 3.2 × 2.6 × 1.0 2.5 × 2.0 × 1.0 12 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series 2. Capacitors (CIN, COUT) A ceramic capacitor can be used for the input (CIN) and output (COUT) sides. impedance and averages the input current to improve efficiency. CIN lowers the power supply Select CIN according to the impedance of the power supply to be used. The recommended capacitance is 4.7 µF for the S-8550/8551 Series when a general lithium ion rechargeable battery is used. Select as COUT a capacitor with large capacitance and small ESR for smoothing the ripple voltage. Select COUT after sufficient evaluation under actual use conditions. The optimum capacitor selection depends on the L value, capacitance value, wiring, and application (output load). 3. Output voltage setting resistors (RFB1, RFB2), capacitor for phase compensation (CFB) With the S-8550/8551 Series, VOUT can be set to any value by external divider resistors. resistors across the VOUT and VSS pins. VOUT = (RFB1 + RFB2) RFB2 × 0.6 Connect the divider Because VFB = 0.6 V typ., VOUT can be calculated by this equation. Connect divider resistors RFB1 and RFB2 as close to the IC to minimize effects from of noise. an effect, adjust the values of RFB1 and RFB2 so that RFB1 + RFB2 < 100 kΩ. CFB connected in parallel with RFB1 is a capacitor for phase compensation. If noise does have By setting the zero point (the phase feedback) by adding capacitor CFB to output voltage setting resistor RFB1 in parallel, the feedback loop gains the phase margin. As a result, the stability can be obtained. In principle, to use the portion how much the phase has feed back by the zero point effectively, define CFB referring to the following equation. CFB ≅ 1 2 x π x RFB1 x 70 kHz This equation is the reference. The followings are explanation regarding the proper setting. To use the portion how much the phase has feed back by the zero point effectively, set RFB1 and CFB so that the zero point goes into the higher frequency than the pole frequency of L and COUT. The following equations are the pole frequency of L and COUT and the zero point frequency by CFB and RFB1. fpole ≅ 1 2 x π x L x COUT fzero ≅ 1 2 x π x RFB1 x CFB The transient response can be improved by setting the zero point frequency in the range of lower frequency. However, since the gain becomes higher in the range of high frequency, the total phase of feedback loop delays 180° or more by setting the zero point frequency in the significantly lower range. As a result, the gain cannot be 0 dB or lower in the frequency range thus the operation might be unstable. Determine the proper value after the sufficient evaluation under the actual condition. The typical constants by our evaluation are in Table 8. Table 8 Constant for External Parts VOUT(s) [V] 1.1 1.8 3.3 4.0 RFB1 [kΩ] 36 36 36 51 RFB2 [kΩ] 43 18 8 9 CFB [pF] 56 68 120 100 L [µH]*1 3.3 3.3 3.3 3.3 COUT [µF]*1 10 10 10 10 *1. The recommended parts in Table 5 Seiko Instruments Inc. 13 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Standard Circuit VIN Current limit circuit FB Error amplifier − + Reference voltage + − PWM comparator Triangular wave generation circuit UVLO circuit *1 Rev.2.1_01 IC internal power supply PWM control circuit *1 CONT 3.3 µH L CFB 68 pF 1.0 µF RFB1 36 kΩ RFB2 18 kΩ VOUT VIN CIN 4.7 µF ON/OFF circuit COUT 10 µF ON/OFF VSS Ground point *1. Parasitic diode Figure 11 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using an actual application to set the constants. Precaution • • Mount external capacitors, diodes, and inductor as close as possible to the IC. Characteristics ripple voltage and spike noise occur in IC containing switching regulators. Moreover rush current flows at the time of a power supply injection. Because these largely depend on the inductor, the capacitor and impedance of power supply used, fully check them using an actually mounted model. • The 1.0 µF capacitance connected between the VIN and VSS pins is a bypass capacitor. It stabilizes the power supply in the IC when application is used with a heavy load, and thus effectively works for stable switching regulator operation. • Allocate the bypass capacitor as close to the IC as possible, prioritized over other parts. Although the IC contains a static electricity protection circuit, static electricity or voltage that exceeds the limit of the protection circuit should not be applied. The power dissipation of the IC greatly varies depending on the size and material of the board to be connected. Perform sufficient evaluation using an actual application before designing. Seiko Instruments Inc. assumes no responsibility for the way in which this IC is used on products created using this IC or for the specifications of that product, nor does Seiko Instruments Inc. assume any responsibility for any infringement of patents or copyrights by products that include this IC either in Japan or in other countries. • • 14 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series Characteristics 1. (Typical Data) Example of Major Power Supply Dependence Characteristics (Ta = 25°C) 1. 2 Current consumption during shutdown (ISSS) vs. Input voltage (VIN) 1.0 0.8 1. 1 Current consumption 1 (ISS1) vs. Input voltage (VIN) 500 400 300 200 100 0 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 ISSS [µA] ISS1 [µA] 0.6 0.4 0.2 0 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 1. 3 Oscillation frequency (fosc) vs. Input voltage (VIN) 1.38 1.34 1.30 1.26 1.22 1.18 1.14 1.10 1.06 1.02 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN [V] fOSC [MHz] 1. 4 Soft-start time (tSS) vs. Input voltage (VIN) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 1. 5 Power MOS FET on-resistance (RFET) vs. Input voltage (VIN) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 2.0 2.5 3.0 Pch Nch 3.5 4.0 VIN [V] 4.5 5.0 5.5 1. 6 Power MOS FET leakage current (ILSW) vs. Input voltage (VIN) 0.5 0.4 0.3 0.2 Pch 0.1 0 −0.1 Nch −0.2 −0.3 −0.4 −0.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN [V] 1. 8 ON/OFF pin input voltage“L” (VSL) vs. Input voltage (VIN) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 1. 7 ON/OFF pin input voltage“H” (VSH) vs. Input voltage (VIN) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 VSH [V] VSL [V] ILSW [µA] RFET [Ω] tSS [ms] 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 Seiko Instruments Inc. 15 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 1. 9 FB voltage (VFB) vs. Input voltage (VIN) 612 608 604 600 596 592 588 2.0 2.5 3.0 3.5 4.0 VIN [V] 4.5 5.0 5.5 2. ISSS [µA] ISS1 [µA] 2. 1 Current consumption 1 (ISS1) vs. Temperature (Ta) 500 VIN = 5.5 V 400 VIN = 3.6 V 300 VIN = 2.0 V VFB [mV] Example of Major Temperature Characteristics (Ta = −40 to 85°C) 2. 2 Current consumption during shutdown (ISSS) vs. Temperature (Ta) 1.0 0.8 0.6 0.4 0.2 200 100 0 −40 −25 0 25 Ta [°C] 50 75 85 VIN = 5.5 V VIN = 3.6 V VIN = 2.0 V 0 −40 −25 0 25 Ta [°C] 50 75 85 fOSC [MHz] tSS [ms] 2. 3 Oscillation frequency (fosc) vs. Temperature (Ta) 1.32 VIN = 5.5 V 1.28 VIN = 3.6 V 1.24 VIN = 2.0 V 1.20 1.16 1.12 1.08 −40 −25 0 25 Ta [°C] 50 75 85 2. 4 Soft-start time (tSS) vs. Temperature (Ta) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 −40 −25 0 25 Ta [°C] VIN = 5.5 V VIN = 3.6 V VIN = 2.0 V 50 75 85 RFET [Ω] 0.4 0.3 0.2 −40 −25 0 25 Ta [°C] 50 75 85 16 Seiko Instruments Inc. ILSW [µA] 2. 5 Power MOS FET on-resistance (RFET) vs. Temperature (Ta) 0.8 Nch Pch 0.7 VIN = 5.5 V VIN = 5.5 V VIN = 3.6 V VIN = 3.6 V 0.6 VIN = 2.0 V VIN = 2.0 V 0.5 2. 6 Power MOS FET leakage current (ILSW) vs. Temperature (Ta) 0.5 0.4 0.3 Nch 0.2 VIN = 5.5 V 0.1 0 −0.1 Pch −0.2 VIN = 5.5 V −0.3 −0.4 −0.5 −40 −25 75 85 0 25 50 Ta [°C] STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series 2. 7 ON/OFF pin input voltage“H” (VSH) vs. Temperature (Ta) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 −40 −25 0 25 Ta [°C] 50 75 85 VIN = 3.6 V VIN = 5.5 V VIN = 2.0 V VSH [V] VSL [V] 2. 8 ON/OFF pin input voltage“L” (VSL) vs. Temperature (Ta) 0.9 VIN = 5.5 V 0.8 VIN = 3.6 V 0.7 VIN = 2.0 V 0.6 0.5 0.4 0.3 −40 −25 0 25 Ta [°C] 50 75 85 2. 9 UVLO detection voltage (VUVLO) vs. Temperature (Ta) 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 1.40 −40 −25 75 85 0 25 50 Ta [°C] VUVLO [V] VFB [mV] 2. 10 FB voltage (VFB) vs. Temperature (Ta) 612 VIN = 5.5 V VIN = 3.6 V 608 VIN = 2.0 V 604 600 596 592 588 −40 −25 0 25 Ta [°C] 50 75 85 3. Examples of Transient Response Characteristics (Unless otherwise specified, the used parts are ones shown in External Parts When Measuring Electrical Characteristics.) 3. 1 (1) 4 3 2 1 0 −1 Powering ON IOUT = 1 mA VIN (VOUT = 1.8 V, VIN = 0 V → 3.6 V, Ta = 25°C) (2) IOUT = 600 mA 4 3 VIN 2 1 VOUT 0 −1 IL −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t [ms] VIN, VOUT [V] IL [A] IL −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t [ms] 0.6 0.4 0.2 0 −0.2 1.5 1.0 0.5 0 −0.5 3. 2 (1) 4 3 2 1 0 −1 Shutdown pin response (VOUT = 1.8 V, VIN = 3.6 V, VON/OFF = 0 V → 3.6 V, Ta = 25°C) IOUT = 1 mA VON/OFF (2) VON/OFF, VOUT [V] VON/OFF, VOUT [V] IL [A] IL −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t [ms] 0.6 0.4 0.2 0 −0.2 IL −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t [ms] 1.5 1.0 0.5 0 −0.5 Seiko Instruments Inc. 17 IL [A] VOUT IOUT = 600 mA 4 3 VON/OFF 2 1 VOUT 0 −1 IL [A] VOUT VIN, VOUT [V] STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 3. 3 (1) Power supply fluctuations (VOUT = 1.8 V, Ta = 25°C) IOUT = 1 mA, VIN VOUT [V] 2.2 2.0 1.8 1.6 1.4 VOUT [V] VIN [V] VOUT VOUT −0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 t [ms] −0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 t [ms] 3. 4 (1) Load fluctuations (VOUT = 1.8 V, VIN = 3.6 V, Ta = 25°C) IOUT = 0.1 mA → 100 mA → 0.1 mA 400 300 200 100 0 −100 (2) IOUT = 0.1 mA → 300 mA → 0.1 mA IOUT 400 300 200 100 0 −100 IOUT [mA] 1.90 1.85 1.80 1.75 1.70 VOUT −0.1 1.90 1.85 1.80 1.75 1.70 VOUT 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 t [ms] −0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 t [ms] 18 Seiko Instruments Inc. IOUT [mA] VOUT [V] VOUT [V] IOUT VIN [V] VIN = 2.6 V → 3.6 V → 2.6 V 4.5 3.5 2.5 1.5 0.5 (2) IOUT = 600 mA, VIN 2.2 2.0 1.8 1.6 1.4 VIN = 2.6 V → 3.6 V → 2.6 V 4.5 3.5 2.5 1.5 0.5 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series Reference Data 1. Reference data for external parts Properties of External Parts Element Name Inductor Input capacitor Output capacitor Product Name NR4018T3R3M C3216X7R1E475K C3216X7R1C106K Manufacture Taiyo Yuden Co., Ltd TDK Corporation TDK Corporation Characteristics 3.3 µH, DCRMAX = 0.07 Ω, IMAX = 1.23 A 4.7 µF 10 µF Caution The values of the external parts are based on the materials provided by each manufacturer. However, consider the characteristics of the original materials when using the above products. 2. Output current (IOUT) vs. Efficiency (η) Characteristics and Output current (IOUT) vs. Output voltage (VOUT) Characteristics 2. 1 VOUT = 1.1 V (RFB1 = 36 kΩ, RFB2 = 43 kΩ) (2) Output current (IOUT) vs. Output voltage (VOUT) 1.3 VIN = 5.5 V VIN = 3.6 V 1.2 VIN = 2.0 V 1.1 (1) Output current (IOUT) vs. Efficiency (η) 100 90 VIN = 2.0 V 80 VIN = 3.6 V 70 VIN = 5.5 V 60 50 40 30 20 10 0 0 1000 1 10 100 IOUT [mA] VOUT [V] η [%] 1.0 0.9 0 1 10 IOUT [mA] 100 1000 2. 2 VOUT = 1.8 V (RFB1 = 36 kΩ, RFB2 = 18 kΩ) (2) Output current (IOUT) vs. Output voltage (VOUT) 2.0 VIN = 5.5 V VIN = 3.6 V 1.9 VIN = 2.0 V 1.8 1.7 1.6 0 1 10 IOUT [mA] 100 1000 (1) Output current (IOUT) vs. Efficiency (η) 100 90 VIN = 2.2 V 80 VIN = 3.6 V 70 VIN = 5.5 V 60 50 40 30 20 10 0 0 1000 1 10 100 IOUT [mA] Seiko Instruments Inc. VOUT [V] η [%] 19 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 2. 3 VOUT = 3.3 V (RFB1 = 36 kΩ, RFB2 = 8 kΩ) (2) Output current (IOUT) vs. Output voltage (VOUT) 3.5 VIN = 5.5 V VIN = 3.7 V 3.4 3.3 3.2 3.1 0 1 10 IOUT [mA] 100 1000 (1) Output current (IOUT) vs. Efficiency (η) 100 90 VIN = 3.7 V 80 VIN = 5.5 V 70 60 50 40 30 20 10 0 0 1000 1 10 100 IOUT [mA] 2. 4 VOUT = 4.0 V (RFB1 = 51 kΩ, RFB2 = 9 kΩ) (2) Output current (IOUT) vs. Output voltage (VOUT) 4.2 VIN = 5.5 V VIN = 4.4 V 4.1 4.0 3.9 3.8 0 1 10 IOUT [mA] 100 1000 (1) Output current (IOUT) vs. Efficiency (η) 100 90 VIN = 4.4 V 80 VIN = 5.5 V 70 60 50 40 30 20 10 0 0 1000 1 10 100 IOUT [mA] 3. Output current (IOUT) vs. Ripple voltage (Vr) Characteristics VOUT = 1.1 V (RFB1 = 36 kΩ, RFB2 = 43 kΩ) VIN = 3.6 V 50 (2) VIN = 5.5 V 50 3. 1 (1) 40 Vr [mV] VOUT [V] Vr [mV] η [%] VOUT [V] η [%] 40 30 20 10 0 0 1 10 IOUT [mA] 100 1000 0 1 10 IOUT [mA] 100 1000 30 20 10 0 20 Seiko Instruments Inc. STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS Rev.2.1_01 S-8550/8551 Series 3. 2 (1) VOUT = 1.8 V (RFB1 = 36 kΩ, RFB2 = 18 kΩ) VIN = 3.6 V 50 40 (2) VIN = 5.5 V 50 40 Vr [mV] 30 20 10 0 0 1 10 IOUT [mA] 100 1000 Vr [mV] 30 20 10 0 0 1 10 IOUT [mA] 100 1000 3. 3 (1) VOUT = 3.3 V (RFB1 = 36 kΩ, RFB2 = 8 kΩ) VIN = 3.6 V 50 (2) VIN = 5.5 V 50 40 Vr [mV] 40 Vr [mV] 30 20 10 0 0 1 10 IOUT [mA] 100 1000 30 20 10 0 0 1 10 IOUT [mA] 100 1000 3. 4 (1) VOUT = 4.0 V (RFB1 = 51 kΩ, RFB2 = 9 kΩ) VIN = 5.5 V 50 40 Vr [mV] 30 20 10 0 0 1 10 IOUT [mA] 100 1000 Seiko Instruments Inc. 21 STEP-DOWN, BUILT-IN FET, SYNCHRONOUS RECTIFICATION, PWM CONTROL SWITCHING REGULATORS S-8550/8551 Series Rev.2.1_01 Marking Specification (1) SOT-23-5 SOT-23-5 Top view 5 4 (1) to (3) : (4) : Product code (Refer to Product name vs. Product code.) Lot number (1) (2) (3) (4) 1 2 3 Product name vs. Product code (a) S-8550 Series Product Name S-8550AA-M5T1G Product Code (1) (2) (3) R 5 A (b) S-8551 Series Product Name S-8551AA-M5T1G Product Code (1) (2) (3) R 5 C 22 Seiko Instruments Inc. 2.9±0.2 1.9±0.2 5 4 1 2 3 0.16 -0.06 +0.1 0.95±0.1 0.4±0.1 No. MP005-A-P-SD-1.2 TITLE No. SCALE UNIT SOT235-A-PKG Dimensions MP005-A-P-SD-1.2 mm Seiko Instruments Inc. 4.0±0.1(10 pitches:40.0±0.2) +0.1 ø1.5 -0 2.0±0.05 0.25±0.1 ø1.0 -0 +0.2 4.0±0.1 1.4±0.2 3.2±0.2 321 4 5 Feed direction No. MP005-A-C-SD-2.1 TITLE No. SCALE UNIT SOT235-A-Carrier Tape MP005-A-C-SD-2.1 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. MP005-A-R-SD-1.1 TITLE No. SCALE UNIT mm SOT235-A-Reel MP005-A-R-SD-1.1 QTY. 3,000 Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. 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