S-T111B26MC-OGLTFG

Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series The S-T111 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current consumption developed based on CMOS technology. A built-in low on-resistance transistor provides a low dropout voltage and large output current, and a builtin overcurrent protector prevents the load current from exceeding the current capacitance of the output transistor. An ON/OFF circuit ensures a long battery life. Compared with the voltage regulators using the conventional CMOS process, a larger variety of capacitors are available, including small ceramic capacitors. A small SOT-23-5 package realizes highdensity mounting. Features 1.5 V to 5.5 V, selectable in 0.1 V steps. ±1.0% 190 mV typ. (3.0 V output product, IOUT = 100 mA) During operation: 50 μA typ., 90 μA max. During shutdown: 0.1 μA typ., 1.0 μA max. • High peak current capability: 150 mA output is possible (at VIN ≥ VOUT(S) + 1.0 V)*1 Ensures long battery life. • Built-in ON/OFF circuit: • Low ESR capacitor can be used: A ceramic capacitor of 0.1 μF or more can be used for the output capacitor. 80 dB typ. (at 1.0 kHz) • High ripple rejection: Overcurrent of output transistor can be restricted. • Built-in overcurrent protector: SOT-23-5 • Small package: • Lead-free products *1. Attention should be paid to the power dissipation of the package when the output current is large. • Output voltage: • High-accuracy output voltage: • Low dropout voltage: • Low current consumption: Applications • Power supply for battery-powered devices • Power supply for personal communication devices • Power supply for home electric/electronic appliances • Power supply for cellular phones Package Package Name SOT-23-5 Package MP005-A Drawing Code Tape MP005-A Reel MP005-A Seiko Instruments Inc. 1 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series Block Diagram *1 V IN VOUT O vercurrent protector ON/OFF O N/OFF circuit + − R eference voltage circuit VSS * 1. P arasitic diode Figure 1 2 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Product Code Structure • The product types and output voltage for the S-T111 Series can be selected at the user’s request. Refer to the “Product name” for the meanings of the characters in the product name and “Product name list” for the full product names. 1. Product name S-T111 x xx xx – xxx TF G IC direction in tape specifications*1 Product name (abbreviation)*2 Package name (abbreviation) MC: SOT-23-5 Output voltage 15 to 55 (e.g. when the output voltage is 1.5 V, it is expressed as 15.) Product type*3 A: ON/OFF pin negative logic B: ON/OFF pin positive logic *1. Refer to the taping specifications at the end of this book. *2. Refer to the product name list. *3. Refer to 3. Shutdown (ON/OFF pin) in the “ Operation”. Seiko Instruments Inc. 3 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series 2. Product name list Table 1 Output Voltage Product Name 1.5V±1.0% S-T111B15MC-OGATFG 1.6V±1.0% S-T111B16MC-OGBTFG 1.7V±1.0% S-T111B17MC-OGCTFG 1.8V±1.0% S-T111B18MC-OGDTFG 1.9V±1.0% S-T111B19MC-OGETFG 2.0V±1.0% S-T111B20MC-OGFTFG 2.1V±1.0% S-T111B21MC-OGGTFG 2.2V±1.0% S-T111B22MC-OGHTFG 2.3V±1.0% S-T111B23MC-OGITFG 2.4V±1.0% S-T111B24MC-OGJTFG 2.5V±1.0% S-T111B25MC-OGKTFG 2.6V±1.0% S-T111B26MC-OGLTFG 2.7V±1.0% S-T111B27MC-OGMTFG 2.8V±1.0% S-T111B28MC-OGNTFG 2.9V±1.0% S-T111B29MC-OGOTFG 3.0V±1.0% S-T111B30MC-OGPTFG 3.1V±1.0% S-T111B31MC-OGQTFG 3.2V±1.0% S-T111B32MC-OGRTFG 3.3V±1.0% S-T111B33MC-OGSTFG 3.4V±1.0% S-T111B34MC-OGTTFG 3.5V±1.0% S-T111B35MC-OGUTFG 3.6V±1.0% S-T111B36MC-OGVTFG 3.7V±1.0% S-T111B37MC-OGWTFG 3.8V±1.0% S-T111B38MC-OGXTFG 3.9V±1.0% S-T111B39MC-OGYTFG 4.0V±1.0% S-T111B40MC-OGZTFG 4.1V±1.0% S-T111B41MC-OHATFG 4.2V±1.0% S-T111B42MC-OHBTFG 4.3V±1.0% S-T111B43MC-OHCTFG 4.4V±1.0% S-T111B44MC-OHDTFG 4.5V±1.0% S-T111B45MC-OHETFG 4.6V±1.0% S-T111B46MC-OHFTFG 4.7V±1.0% S-T111B47MC-OHGTFG 4.8V±1.0% S-T111B48MC-OHHTFG 4.9V±1.0% S-T111B49MC-OHITFG 5.0V±1.0% S-T111B50MC-OHJTFG 5.1V±1.0% S-T111B51MC-OHKTFG 5.2V±1.0% S-T111B52MC-OHLTFG 5.3V±1.0% S-T111B53MC-OHMTFG 5.4V±1.0% S-T111B54MC-OHNTFG 5.5V±1.0% S-T111B55MC-OHOTFG Remark Please contact our sales office for products with type A. 4 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Pin Configuration SOT-23-5 Top view 5 4 Table 2 Pin No. Symbol Description 1 ON/OFF Shutdown pin 2 VSS GND pin 3 NC*1 No connection 4 VOUT Output voltage pin 5 VIN Input voltage pin *1. The NC pin is electrically open. The NC pin can be connected to VIN or VSS. 1 2 3 Figure 2 Absolute Maximum Ratings Table 3 Item Input voltage Output voltage Power dissipation Symbol VIN VON/OFF VOUT PD (Ta = 25°C unless otherwise specified) Absolute Maximum Rating Unit V VSS − 0.3 to VSS + 7 V VSS − 0.3 to VIN + 0.3 V VSS − 0.3 to VIN + 0.3 300 (When not mounted on board) mW 600*1 mW −40 to +85 °C −40 to +125 °C Operating ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size : 114.3 mm × 76.2 mm × t1.6 mm (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissi pation (PD) [ mW] 700 600 500 400 300 200 100 0 0 100 150 50 Ambient Temperature (Ta) [°C] Figure 3 Power Dissipation of Package (When Mounted on Board) Seiko Instruments Inc. 5 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series Electrical Characteristics Table 4 (Ta = 25°C unless otherwise specified) Item Output voltage*1 Output current*2 Dropout voltage*3 Symbol VOUT(E) IOUT Vdrop Conditions VIN = VOUT(S) + 1.0 V, IOUT = 30 mA VIN ≥ VOUT(S) + 1.0 V IOUT = 50 mA 1.5 V ≤ VOUT(S) ≤ 2.7 V 2.8 V ≤ VOUT(S) ≤ 5.5 V IOUT = 100 mA 1.5 V ≤ VOUT(S) ≤ 1.6 V 1.7 V ≤ VOUT(S) ≤ 1.8 V 1.9 V ≤ VOUT(S) ≤ 2.3 V 2.4 V ≤ VOUT(S) ≤ 2.7 V 2.8 V ≤ VOUT(S) ≤ 5.5 V VOUT(S) + 0.5 V ≤ VIN ≤ 6.5 V, IOUT = 30 mA VIN = VOUT(S) + 1.0 V, 1.0 mA ≤ IOUT ≤ 80 mA VIN = VOUT(S) + 1.0 V, IOUT = 10 mA, −40°C ≤ Ta ≤ 85°C VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON, no load VIN = VOUT(S) + 1.0 V, ON/OFF pin = OFF, no load ⎯ VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ VIN = 6.5 V, VON/OFF = 6.5 V VIN = 6.5 V, VON/OFF = 0 V VIN = VOUT(S) + 1.0 V, f = 1.0 kHz, ΔVrip = 0.5 Vrms, IOUT = 30 mA VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON, VOUT = 0 V Min. Typ. Max. Unit V mA V V V V V V V %/V mV ppm /°C μA μA V V V μA μA dB mA Test Circuit 1 3 1 1 1 1 1 1 1 1 1 1 2 2 ⎯ 4 4 4 4 5 3 Line regulation Load regulation Output voltage *4 temperature coefficient Current consumption during operation Current consumption during shutdown Input voltage Shutdown pin input voltage “H” Shutdown pin input voltage “L” Shutdown pin input current “H” Shutdown pin input current “L” Ripple rejection Short-circuit current ΔVOUT1 ΔVIN• VOUT ΔVOUT2 ΔVOUT ΔTa • VOUT VOUT(S) VOUT(S) VOUT(S) × 0.99 × 1.01 150*5 ⎯ ⎯ Not specified ⎯ 0.08 0.14 ⎯ 0.32 0.55 ⎯ 0.28 0.47 ⎯ 0.25 0.35 ⎯ 0.20 0.29 ⎯ 0.19 0.26 ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 1.5 ⎯ −0.1 −0.1 ⎯ ⎯ 0.05 12 ±100 50 0.1 ⎯ ⎯ ⎯ ⎯ ⎯ 80 200 0.2 40 ⎯ 90 1.0 6.5 ⎯ 0.3 0.1 0.1 ⎯ ⎯ ISS1 ISS2 VIN VSH VSL ISH ISL RR Ishort *1. VOUT(S): Specified output voltage VOUT(E): Actual output voltage at the fixed load The output voltage when fixing IOUT(= 30 mA) and inputting VOUT(S) + 1.0 V *2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current. *3. Vdrop = VIN1 − (VOUT3 × 0.98) VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 50 mA or IOUT = 100 mA. VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage. *4. The change in temperature [mV/°C] is calculated using the following equation. ΔVOUT ΔVOUT *1 *2 *3 [mV / °C] = VOUT( S )[ V ] × [ppm / °C] ÷ 1000 ΔTa ΔTa • VOUT *1. The change in temperature of the output voltage *2. Specified output voltage *3. Output voltage temperature coefficient *5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This specification is guaranteed by design. Seiko Instruments Inc. 6 Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Test Circuits 1. VIN ON/OFF Set to power ON VOUT V VSS + + A Figure 4 2. A VIN ON/OFF Set to VIN or GND VOUT VSS Figure 5 3. VIN VOUT + A + ON/OFF Set to power ON V VSS Figure 6 4. VIN + A ON/OFF VSS V VOUT + RL Figure 7 5. VIN ON/OFF Set to Power ON VOUT + VSS V RL Figure 8 Seiko Instruments Inc. 7 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series Standard Circuit Input VIN CIN *1 Output VOUT CL *2 ON/OFF VSS Single GND GND *1. CIN is a capacitor for stabilizing the input. *2. A ceramic capacitor of 0.1 μF or more can be used for CL. Figure 9 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. Application Conditions Input capacitor (CIN): Output capacitor (CL): ESR of output capacitor: 0.1 μF or more 0.1 μF or more 10 Ω or less Caution A general series regulator may oscillate, depending on the external components selected. Check that no oscillation occurs with the application using the above capacitor. Selection of Input and Output Capacitors (CIN, CL) The S-T111 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. Operation is stabilized by a ceramic capacitor with an output capacitance of 0.1 μF or more in the entire temperature range. However, when using an OS capacitor, tantalum capacitor, or aluminum electrolytic capacitor, a ceramic capacitor with a capacitance of 0.1 μF or more and an ESR of 10 Ω or less is required. The value of the output overshoot or undershoot transient response varies depending on the value of the output capacitor. The required capacitance of the input capacitor differs depending on the application. The recommended value for an application is 1.0 μF or more for CIN and 0.47 μF or more for CL; however, when selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature characteristics, on the actual device. 8 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Explanation of Terms 1. Low dropout voltage regulator The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low on-resistance transistor. 2. Low ESR A capacitor whose ESR (Equivalent Series Resistance) is low. The S-T111 Series enables use of a low ESR capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is 10 Ω or less can be used. 3. Output voltage (VOUT) The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage*1, fixed output current, and fixed temperature. *1. Differs depending on the product. Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. Please see the “Electrical Characteristics” and attached characteristics data for details. 4. Line Regulation ⎜ ⎜ ⎛ ΔVOUT1 ΔVIN • VOUT ⎝ ⎞ ⎟ ⎟ ⎠ Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output voltage changes due to a change in the input voltage with the output current remaining unchanged. 5. Load regulation (ΔVOUT2) Indicates the dependency of the output voltage on the output current. That is, the values show how much the output voltage changes due to a change in the output current with the input voltage remaining unchanged. 6. Dropout voltage (Vdrop) Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased from VIN = VOUT(S) + 1.0 V, and the output voltage at that point (VOUT3 × 0.98). Vdrop = VIN1 − (VOUT3 × 0.98) Seiko Instruments Inc. 9 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series 7. Temperature Coefficient of Output Voltage ⎜ ⎜ ⎛ ΔVOUT ΔTa • VOUT ⎝ ⎞ ⎟ ⎟ ⎠ The shadowed area in Figure 10 is the range where VOUT varies in the operating temperature range when the temperature coefficient of the output voltage is ±100 ppm/°C. Ex. S-T111B28 Typ. VOUT [V] +0.28 mV/°C VOUT(E)*1 −0.28 mV/°C −40 25 85 Ta [°C] *1. VOUT(E) is the value of the output voltage measured at 25°C. Figure 10 A change in the temperature of the output voltage [mV/°C] is calculated using the following equation. ΔVOUT [mV/ °C]*1 = VOUT(S)[V ]*2 × ΔVOUT [ppm/ °C]*3 ÷ 1000 ΔTa ΔTa • VOUT *1. Change in temperature of output voltage *2. Specified output voltage *3. Output voltage temperature coefficient 10 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Operation 1. Basic operation Figure 11 shows the block diagram of the S-T111 Series. The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistancedivided by feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain output voltage free of any fluctuations of input voltage and temperature. VIN *1 Current supply Error amplifier VOUT Vref − + Rf Vfb Reference voltage circuit Rs VSS *1. Parasitic diode Figure 11 2. Output transistor The S-T111 Series uses a low on-resistance P-channel MOS FET as the output transistor. Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse current flowing from the VOUT pin through a parasitic diode to the VIN pin. Seiko Instruments Inc. 11 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series 3. Shutdown pin (ON/OFF pin) This pin starts and stops the regulator. When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the builtin P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided resistance of several MΩ between the VOUT pin and VSS pin. The structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is neither pulled down nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”. Table 5 Logic Type A A B B ON/OFF Pin “L”: Power on “H”: Power off “L”: Power off “H”: Power on Internal Circuits Operating Stopped Stopped Operating VOUT Pin Voltage Set value VSS level VSS level Set value Current Consumption ISS1 ISS2 ISS2 ISS1 VIN ON/OFF VSS Figure 12 12 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series Precautions • Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low. When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as short as possible. • Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or less). • Generally a series regulator may cause oscillation, depending on the selection of external parts. The following conditions are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage conditions for selection, including evaluation of temperature characteristics. Input capacitor (CIN): 1.0 μF or more Output capacitor (CL): 0.47 μF or more Equivalent series resistance (ESR): 10 Ω or less • The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small or an input capacitor is not connected. • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • In determining the output current, attention should be paid to the output current value specified in Table 4 in the “ Electrical Characteristics” and footnote *5 of the table. • SII claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. Seiko Instruments Inc. 13 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series Typical Characteristics (1) Output Voltage vs. Output current (when load current increases) S-T111B15 (Ta = 25°C) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 S-T111B30 (Ta = 25°C) 3.5 3.0 2.5 VOUT [V] VOUT [V] VIN = 1.8 V 6.5 V 2.0 1.5 1.0 0.5 0 VIN = 3.3 V 6.5 V 2.5 V 100 200 300 400 500 600 4.0 V 0 100 200 300 400 500 600 IOUT [mA] IOUT [mA] S-T111B50 (Ta = 25°C) 6 5 4 VOUT [V] VIN = 5.3 V 6.0 V 6.5 V 3 2 1 0 0 100 200 300 400 500 600 Remark In determining the output current, attention should be paid to the following. 1) The minimum output current value and footnote *5 in the “ Electrical Characteristics” 2) The package power dissipation IOUT [mA] (2) Output voltage vs. Input voltage S-T111B15 (Ta = 25°C) 1.6 1.5 S-T111B30 (Ta = 25°C) 3.1 3.0 VOUT [V] 1.3 1.2 1.1 1.0 1.0 1.5 IOUT = 1 mA 30 mA 50 mA VOUT [V] 1.4 2.9 2.8 2.7 2.6 IOUT = 1 mA 30 mA 50 mA 2.0 2.5 3.0 3.5 2.5 2.5 3.0 3.5 4.0 4.5 5.0 VIN [V] VIN [V] S-T111B50 (Ta = 25°C) 5.5 5.0 VOUT [V] 4.5 4.0 3.5 3.0 2.5 2.0 IOUT = 1 mA 50 mA 30 mA 3.0 4.0 5.0 6.0 7.0 VIN [V] 14 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series (3) Dropout voltage vs. Output current S-T111B15 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 S-T111B30 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 85°C 25°C 85°C Vdrop [V] –40°C Vdrop [V] 25°C –40°C 0 50 100 150 200 0 50 100 150 200 IOUT [mA] IOUT [mA] S-T111B50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 85°C Vdrop [V] 25°C –40°C 0 50 100 150 200 IOUT [mA] (4) Dropout voltage vs. Set output voltage 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 0 1 2 3 4 5 150 mA 100 mA 50 mA 30 mA 10 mA 6 7 Vdrop [V] VOTA [V] Seiko Instruments Inc. 15 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series (5) Output voltage vs. Ambient temperature S-T111B15 1.60 1.55 S-T111B30 3.20 3.15 3.10 3.05 3.00 2.95 2.90 2.85 2.80 –50 VOUT [V] 1.50 1.45 1.40 –50 VOUT [V] –25 0 25 50 75 100 –25 0 25 50 75 100 Ta [°C] Ta [°C] S-T111B50 5.3 5.2 5.1 VOUT [V] 5.0 4.9 4.8 4.7 –50 –25 0 25 50 75 100 Ta [°C] (6) Current consumption vs. Input voltage S-T111B15 120 100 S-T111B30 120 100 25°C 25°C 85°C –40°C ISS1 [μA] ISS1 [μA] 80 60 85°C 40 20 0 0 2 4 6 8 –40°C 80 60 40 20 0 0 2 4 6 8 VIN [V] VIN [V] S-T111B50 120 100 25°C –40°C 85°C ISS1 [μA] 80 60 40 20 0 0 2 4 6 8 VIN [V] 16 Seiko Instruments Inc. Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series (7) Ripple rejection S-T111B15 (Ta = 25°C) VIN = 2.5 V, COUT = 0.47 μF 100 S-T111B30 (Ta = 25°C) VIN = 4.0 V, COUT = 0.47 μF 100 Ripple Rejection [dB] Ripple Rejection [dB] 50 mA 80 60 40 20 0 10 100 1k 10k 100k 1M 30 mA IOUT = 1 mA 50 mA 80 60 40 20 0 10 100 1k 10k 100k 1M 30 mA IOUT = 1 mA Frequency [Hz] Frequency [Hz] S-T111B50 (Ta = 25°C) VIN = 6.0 V, COUT = 0.47 μF 100 Ripple Rejection [dB] 80 50 mA 60 40 20 0 10 100 1k 10k 100k 1M 30 mA IOUT = 1 mA Frequency [Hz] Seiko Instruments Inc. 17 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.2.1_00 S-T111 Series Reference Data (1) Input transient response characteristics S-T111B15 (Ta = 25°C) IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 0.47 μF, CIN = 0 μF 1.62 1.60 1.58 VIN 1.56 1.54 1.52 VOUT 1.50 1.48 1.46 -40 -20 0 20 40 60 S-T111B30 (Ta = 25°C) IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 0.47 μF, CIN = 0 μF 3.08 3.06 VIN 6 5 4 VOUT 3 2 1 -20 0 20 40 60 80 100 120 140 160 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 80 100 120 140 160 VOUT [V] VOUT [V] 3.04 3.02 3.00 2.98 2.96 -40 VIN [V] 0 t [μs] t [μs] S-T111B50 (Ta = 25°C) IOUT = 30 mA, tr = tf = 5.0 μs, COUT = 0.47 μF, CIN = 0 μF 5.12 5.10 VIN 5.08 5.06 5.04 5.02 VOUT 5.00 4.98 4.96 -40 -20 0 20 40 60 8 7 6 5 4 3 2 1 0 80 100 120 140 160 VOUT [V] t [μs] (2) Load transient response characteristics S-T111B15 (Ta = 25°C) VIN = 2.5 V, COUT = 0.47 μF, CIN = 1.0 μF, IOUT = 50↔100 mA 1.70 1.65 IOUT 150 100 VIN [V] S-T111B30 (Ta = 25°C) VIN = 4.0 V, COUT = 0.47 μF, CIN = 1.0 μF, IOUT = 50↔100 mA 3.20 3.15 IOUT 150 100 IOUT [mA] 1.55 1.50 1.45 1.40 0 VOUT 3.05 VOUT 3.00 2.95 2.90 -40 -20 0 20 40 60 0 –50 –100 –150 80 100 120 140 160 –50 –100 –150 0 20 40 60 80 100 120 140 160 -40 -20 t [μs] t [μs] S-T111B50 (Ta = 25°C) VIN = 6.0 V, COUT = 0.47 μF, CIN = 1.0 μF, IOUT = 50↔100 mA 5.20 5.15 IOUT VOUT 150 100 5.05 5.00 4.95 4.90 0 –50 –100 –150 0 20 40 60 80 100 120 140 160 -40 -20 t [μs] 18 Seiko Instruments Inc. IOUT [mA] VOUT [V] 5.10 50 IOUT [mA] VOUT [V] VOUT [V] 1.60 50 3.10 50 VIN [V] Rev.2.1_00 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR S-T111 Series (3) Shutdown pin transient response characteristics S-T111B15 (Ta = 25°C) VIN = 2.5 V, COUT = 0.47 μF, CIN = 1.0 μF, IOUT = 100 mA 5 4 3 VON/OFF 3 2 S-T111B30 (Ta = 25°C) VIN = 4.0 V, COUT = 0.47 μF, CIN = 1.0 μF, IOUT = 100 mA 10 8 6 4 VON/OFF [V] 2 1 0 –1 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 VOUT –1 –2 –3 4 2 0 –2 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 –2 VOUT –4 –6 t [ms] t [ms] Seiko Instruments Inc. VON/OFF [V] 1 6 VON/OFF 2 VOUT [V] VOUT [V] 19 2.9±0.2 1.9±0.2 5 4 1 2 3 0.16 -0.06 +0.1 0.95±0.1 0.4±0.1 No. MP005-A-P-SD-1.2 TITLE No. SCALE UNIT SOT235-A-PKG Dimensions MP005-A-P-SD-1.2 mm Seiko Instruments Inc. 4.0±0.1(10 pitches:40.0±0.2) +0.1 ø1.5 -0 2.0±0.05 0.25±0.1 ø1.0 -0 +0.2 4.0±0.1 1.4±0.2 3.2±0.2 321 4 5 Feed direction No. MP005-A-C-SD-2.1 TITLE No. SCALE UNIT SOT235-A-Carrier Tape MP005-A-C-SD-2.1 mm Seiko Instruments Inc. 12.5max. Enlarged drawing in the central part ø13±0.2 9.0±0.3 (60°) (60°) No. MP005-A-R-SD-1.1 TITLE No. SCALE UNIT mm SOT235-A-Reel MP005-A-R-SD-1.1 QTY. 3,000 Seiko Instruments Inc. • • • • • • The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.