Si8931/32 Data Sheet
Isolated Amplifier for Voltage Measurement
KEY FEATURES
The Si8931/32 is a galvanically isolated analog amplifier optimized for voltage sensing. Its 2.5
V input range is ideal for isolated voltage sensing applications. The output is a differential
analog signal (Si8931) or single-ended signal (Si8932) that is proportional to the input voltage.
The Si8931/32 provides excellent linearity with low offset and gain drift to ensure that accuracy
is maintained over the entire operating temperature range. Exceptionally high common-mode
transient immunity means that the Si8931/32 delivers accurate measurements even in the
presence of high-power switching as is found in motor drive systems and inverters.
The Si8931/32 isolated voltage sensing amplifier utilizes Skyworks’ proprietary isolation technology. It supports up to 5.0 kVrms withstand voltage per UL1577. This technology enables
higher performance, reduced variation with temperature and age, tighter part-to-part matching,
and longer lifetimes compared to other isolation technologies.
Applications:
• Industrial, HEV and renewable energy inverters
• AC, Brushless, and DC motor controls and drives
• Variable speed motor control in consumer white goods
• Isolated switch mode and UPS power supplies
• General industrial data acquisition and sensor interface
• Automotive onboard chargers, battery management systems, and charging stations
GNDA
1
Transmitter
• Typical gain error: ±0.06%
• Excellent drift specifications
• 0.75 µV/°C offset drift
• 6 ppm/°C typical gain drift
• Typical nonlinearity: 0.01%
• Typical SNR: 76 dB
• High common-mode transient
immunity: 75 kV/µs
• Compact packages
• 8-pin wide body stretched SOIC
• 8-pin narrow body SOIC
• –40 to 125 °C
Si8932
VDDB
VDDA
OSC
AOP
VIN
PWM
PWM
AON
Receiver
GNDB
NC
GNDA
Transmitter
CMOS Isolation
PWM
NC
CMOS Isolation
OSC
• Typical input offset: 0.16 mV
• IMDS and CAMDS listing
support
Si8931
VIN
• Low signal delay: 1 µs
• Auomotive-grade OPNs
• AIAG-compliant PPAP
documentation support
Safety Approvals (pending):
• UL 1577 recognized
• Up to 5000 Vrms for 1 minute
• CSA approval
• IEC 60950-1, 62368-1 (reinforced insulation)
• VDE certification conformity
• VDE0884 Part 11 (basic/reinforced insulation)
• CQC certification approval
• GB4943.1-2011
VDDA
• 0 to 2.5 V nominal input voltage
VDDB
AO
PWM
GNDB
Receiver
GNDB
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Si8931/32 Data Sheet • Ordering Guide
1. Ordering Guide
Ordering Part
Number1, 2, 3
Automotive
Ordering Part
Number1, 2, 3, 4
Ordering Options
Input Range
Isolation Rating
Output
Package Type
Si8931D-IS4
Si8931D-AS4
0 to 2.5 V nominal
5.0 kVrms
Differential
WB Stretched
SOIC-8
Si8931B-IS
Si8931B-AS
0 to 2.5 V nominal
2.5 kVrms
Differential
NB SOIC-8
Si8932D-IS4
Si8932D-AS4
0 to 2.5 V nominal
5.0 kVrms
Single-ended
WB Stretched
SOIC-8
Si8932B-IS
Si8932B-AS
0 to 2.5 V nominal
2.5 kVrms
Single-ended
NB SOIC-8
Note:
1. All packages are RoHS-compliant.
2. “Si” and “SI” are used interchangeably.
3. AEC-Q100 pending qualification.
4. Automotive-Grade devices ("-A" suffix) are identical in construction materials, topside marking, and electrical parameters to their
Industrial Grade ("-I suffix") version counterparts. Automotive-Grade products are produced utilizing full automotive process flows
and additional statistical process controls throughout the manufacturing flow. The Automotive-Grade part number is included on
shipping labels.
2
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Table of Contents
1. Ordering Guide
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2. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Fail-Safe and Low-Power Modes .
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3. Voltage Sense Application . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 Regulatory Information .
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4.2 Typical Operating Characteristics .
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5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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5.1 Si8931 Pin Descriptions .
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5.2 Si8932 Pin Descriptions .
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6. Packaging
6.1 Package Outline: 8-Pin Wide Body Stretched SOIC
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6.2 Package Outline: 8-Pin Narrow Body SOIC .
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6.3 Land Pattern: 8-Pin Wide Body Stretched SOIC .
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6.4 Land Pattern: 8-Pin Narrow Body SOIC
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6.5 Top Marking: 8-Pin Wide Body Stretched SOIC .
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6.6 Top Marking: 8-Pin Narrow Body SOIC .
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7. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Si8931/32 Data Sheet • System Overview
2. System Overview
The input to the Si8931/32 is designed for 0 to 2.5 V nominal input.
The Si8931/32 modulates the analog signal in a unique way for transmission across the semiconductor based isolation barrier.
The input signal is first converted to a pulse-width modulated digital signal. On the other side of the isolation barrier, the signal is
demodulated to faithfully reproduce the analog signal. This solution provides exceptional signal bandwidth and accuracy. The Si8931
provides a differential voltage output while the Si8932 provides a single-ended voltage output.
VDDA
OSC
VIN
PWM
NC
GNDA
Transmitter
CMOS Isolation
Si8931
VDDB
AOP
PWM
AON
Receiver
GNDB
Figure 2.1. Si8931 Functional Block Diagram
VDDA
OSC
VIN
PWM
NC
GNDA
Transmitter
CMOS Isolation
Si8932
VDDB
AO
PWM
GNDB
Receiver
GNDB
Figure 2.2. Si8932 Functional Block Diagram
4
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Si8931/32 Data Sheet • System Overview
2.1 Fail-Safe and Low-Power Modes
The Si8931/32 implements a fail-safe output when the high-side supply voltage VDDA goes away. This is important for safe operation
in systems with high safety requirements. The fail-safe output is nominally 2.8 V (Si8932) or –2.8 V (Si8931) which can be differentiated
from the maximum clipping output voltage of 2.6 V to simplify diagnostics on the system level.
Device
Output Voltage
(VDDA Normal)
Output Voltage
(VDDA Removed)
Si8931
~ ±2.6 V
~ –2.8 V
Si8932
0 to ~2.6 V
~ +2.8 V
In addition to the fail-safe output, when a loss of VDDA supply occurs, the part will automatically move into a lower power mode that
reduces IDDB current to approximately 1 mA. The controller side continues to monitor high-side communications to determine when
VDDA supply returns. When the supply voltage is returned, normal operation begins in approximately 250 μs. Similarly, a loss of VDDB
supply will reduce IDDA current to approximately 1 mA.
5
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Si8931/32 Data Sheet • Voltage Sense Application
3. Voltage Sense Application
A typical isolated voltage sensing application circuit is shown below. In this example, a high voltage is divided down to produce a
voltage (VIN) within the optimum input signal range of the Si8931/32. Numerous alternative inputs configurations are possible with
the flexibility of a high impedance input isolator. The Si8931 senses the single-ended input voltage and reproduces it as a differential
(or single-ended with the Si8932) output voltage across the galvanic isolation barrier. The Si8931 differential outputs (AOP, AON) can
be routed directly to a differential ADC as shown below. The Si8932 senses the single-ended input voltage and reproduces it as a
single-ended output voltage across the galvanic isolation barrier. The single-ended output can be routed directly to a standard ADC (not
shown). If the voltage sensed is > 2.5 V, a simple voltage divider consisting of R1 and R2 can be used to scale down any voltage to fit
the input range of the Si8931/32. R2 < 10 kΩ is recommended for best performance.
3 to 5.5V
Supply
3 to 5.5V
Supply
Vsource
R1
C2
C4
0.1µF
0.1µF
1
2
R2 ≤ 10KΩ
C1
3
4
VDDA
VDDB
VIN
AOP
NC
AON
GNDA
GNDB
8
7
R5
+
6
5
C6
R6
ADC
To Controller
-
Si8931
Figure 3.1. Voltage Sense Application
The amplifier bandwidth of the Si8931/32 is approximately 600 kHz. For applications where input filtering is required, a passive,
differential RC low-pass filter can be placed at the input pin. Consider the source resistance of the signal measured (or the parallel
combination of R1 and R2 if using a voltage divider) as it should be included in the filter calculation. Capacitor C1 should be sized to
make a band limiting filter at the desired frequency.
C4, the local bypass capacitor for the B-side of Si8931/32, should be placed closed to VDDB supply pin with its return close to GNDB.
The output signal at AOP and AON is differential with unity gain and common mode of 1.4 V. The outputs are sampled by a differential
input ADC. Depending on the sample rate of the ADC, an anti-aliasing filter may be required. A simple anti-aliasing filter can be
made from the passive components, R5, C6, and R6. The characteristics of this filter are dictated by the input topology and sampling
frequency of the ADC. However, to ensure the Si8931/32 outputs are not overloaded, R5 = R6 > 5 kΩ and C6 can be calculated by the
following equation:
C6 =
6
1
2 × π × R5 + R6 × f 3dB
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Si8931/32 Data Sheet • Electrical Specifications
4. Electrical Specifications
Table 4.1. Electrical Specifications
TA = –40 to +125 °C; typical specs at 25 °C with VDDA = VDDB = 5 V unless specified differently under Test Condition
Parameter
Symbol
Input Side Supply Voltage
VDDA
Input Supply
Current
Si8931/32
Output Side Supply Voltage
Output Supply
Current
IDDA
Test Condition
Min
Typ
3.0
VDDA = 3.3 V
VDDB
3.8
4.7
3.0
Max
Units
5.5
V
5.7
mA
5.5
V
Si8931
IDDB
VDDB = 3.3 V
2.8
3.5
4.5
mA
Si8932
IDDB
VDDB = 3.3 V
3
4.3
5
mA
Amplifier Bandwidth
600
kHz
Amplifier Input
Specified Linear
Input Range
VIN
Maximum Input Voltage
before Clipping
VIN
Input Referred Offset
VOS
Input Offset Drift
VOST
Input Impedance
RIN
0.25
2.25
2.5
TA = 25 °C,
VIN = 0.25 V
V
V
–1
±0.16
1
mV
–25
±0.75
25
µV/°C
500
MΩ
Full-scale Output
2.5
Vpk
Gain
1
Amplifier Output
TA = 25 °C
Gain Error
Gain Error Drift
Output Common
Mode Voltage
Nonlinearity
–0.25
±0.06
0.25
%
Si8931
–40
6
20
ppm/°C
Si8932
–30
–5
30
ppm/°C
1.34
1.39
1.44
V
Si8931
(VAOP + VAON)/2
Si8931
TA = 25 °C
–0.04
0.01
0.04
%
Si8932
TA = 25 °C
–0.05
0.01
0.05
%
TA = 25 °C
–5
5
ppm/°C
Nonlinearity Drift
7
Signal-to-Noise
Ratio
Si8931
SNR
100 kHz bandwidth
73
77
dB
Si8932
SNR
100 kHz bandwidth
72
76
dB
Total Harmonic
Distortion
Si8931
THD
FIN = 1 kHz
–80
–70
dB
Si8932
THD
FIN = 1 kHz
–80
–66
dB
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Si8931/32 Data Sheet • Electrical Specifications
Parameter
Symbol
Power Supply Rejection Ratio
Output Resistive
Load
Si8931
Si8932
Output Capacitive Load
PSRR
RLOAD
Test Condition
Min
Typ
Max
Units
VDDA at DC
–100
dB
VDDA at 100 mV and 10
kHz ripple
–100
dB
VDDB at DC
–100
dB
VDDB at 100 mV and 10
kHz ripple
–100
dB
Between AON and AOP
5
kΩ
Between AO and GND
5
kΩ
CLOAD
Each pin to ground
100
pF
Signal Delay
tPD
50% to 50%
1
µs
Rise Time
tR
10% to 90%
1.6
µs
Common-Mode Transient
Immunity1
CMTI
VIN = GNDA,
VCM = 1500 V
75
kV/µs
Timing
50
Note:
1. An analog CMTI failure is defined as an output error of more than 100 mV persisting for at least 1 µs.
Figure 4.1. Common-Mode Transient Immunity Characterization Circuit
8
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Si8931/32 Data Sheet • Electrical Specifications
Table 4.2. IEC Safety Limiting Values1
Parameter
Safety Temperature
Symbol
Test Condition
TS
Characteristic
Unit
150
°C
253
mA
386
mA
203
mA
310
mA
1389
mW
1116
mW
1.39
W
1.12
W
θJA = 90 °C/W
VDD = 5.5 V
TJ = 150 °C
Safety Input Current (WB Stretched SOIC-8)
IS
TA = 25 °C
θJA = 90 °C/W
VDD = 3.6 V
TJ = 150 °C
TA = 25 °C
θJA = 112 °C/W
VDD = 5.5 V
TJ = 150 °C
Safety Input Current (NB SOIC-8)
IS
TA = 25 °C
θJA = 112 °C/W
VDD = 3.6 V
TJ = 150 °C
TA = 25 °C
θJA = 90 °C/W
Safety Input Power (WB Stretched SOIC-8)
PS
TJ = 150 °C
TA = 25 °C
θJA = 112 °C/W
Safety Input Power (NB SOIC-8)
PS
TJ = 150 °C
TA = 25 °C
Device Power Dissipation (WB Stretched SOIC-8)
PD
Device Power Dissipation (NB SOIC-8)
Note:
1. Maximum value allowed in the event of a failure. Refer to the thermal derating curves below.
9
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Si8931/32 Data Sheet • Electrical Specifications
Table 4.3. Thermal Characteristics
Parameter
IC Junction-to-Air Thermal Resistance
Symbol
WB Stretched
SOIC-8
NB SOIC-8
Unit
θJA
90
112
°C/W
Safety Limiting Current (mA)
Figure 4.2. WB Stretched SOIC-8 Thermal Derating Curve for Safety Limiting Current
350
3.6 V
300
5.5 V
250
200
150
100
50
0
0
20
40
60
80
100
120
140
160
Ambient Temperature (o C)
Figure 4.3. NB SOIC-8 Thermal Derating Curve for Safety Limiting Current
10
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Si8931/32 Data Sheet • Electrical Specifications
Table 4.4. Absolute Maximum Ratings1
Parameter
Symbol
Min
Max
Unit
TSTG
–65
150
°C
Ambient Temperature Under Bias
TA
–40
125
°C
Junction Temperature
TJ
—
150
°C
VDDA, VDDB
–0.5
6.0
V
Input Voltage respect to GNDA
VIN
–0.5
VDDA + 0.5
V
Output Sink or Source Current
|IO|
—
5
mA
Total Power Dissipation
PT
—
212
mW
Lead Solder Termperature (10 s)
—
260
°C
Human Body Model ESD Rating
6000
—
V
Capacitive Discharge Model ESD Rating
2000
—
V
Maximum Isolation (WB Stretched SOIC-8 Input to Output)
(1 s)
—
6500
VRMS
Maximum Isolation (NB SOIC-8 package Input to Output)
(1 s)
—
4500
VRMS
Storage Temperature
Supply Voltage
Note:
1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to
conditions as specified in the operational sections of the data sheet.
11
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Si8931/32 Data Sheet • Electrical Specifications
4.1 Regulatory Information
Table 4.5. Regulatory Information (Pending)1, 2
CSA
The Si8931/32 is certified under CSA. For more details, see Master Contract File 232873.
60950-1, 62368-1: Up to 600 VRMS reinforced insulation working voltage; up to 1000 VRMS basic insulation working voltage.
VDE
The Si8931/32 is certified according to VDE 0884-11. For more details, see File 5006301-4880-0001.
VDE 0884-11: Up to 1414 Vpeak for reinforced insulation working voltage.
UL
The Si8931/32 is certified under UL1577 component recognition program. For more details, see File E257455.
Rated up to 5000 VRMS isolation voltage for basic protection.
CQC
The Si8931/32 is certified under GB4943.1-2011.
Rated up to 600 VRMS reinforced insulation working voltage; up to 1000 VRMS basic insulation working voltage.
Note:
1. Regulatory Certifications apply to 5 kVRMS rated devices which are production tested to 6.0 kVRMS for 1 sec.
2. Regulatory Certifications apply to 2.5 kVRMS rated devices which are production tested to 3.0 kVRMS for 1 sec.
Table 4.6. Insulation and Safety-Related Specifications
Value
Parameter
Symbol
Nominal External Air Gap (Clearance)
Test Condition
WB Stretched
SOIC-8
NB
SOIC-8
Unit
CLR
9.01
4.9
mm
Nominal External Tracking
(Creepage)
CPG
8.01
4.01
mm
Minimum Internal Gap
(Internal Clearance)
DTI
36
36
µm
Tracking Resistance
PTI or CTI
600
600
V
Erosion Depth
ED
0.04
0.04
mm
Resistance (Input-Output)2
RIO
1012
1012
Ω
Capacitance (Input-Output)2
CIO
1
1
pF
IEC60112
f = 1 MHz
Note:
1. The values in this table correspond to the nominal creepage and clearance values. VDE certifies the clearance and creepage
limits as x.x mm minimum for the WB Stretched SOIC-8 package. UL does not impose a clearance and creepage minimum for
component-level certifications. CSA certifies the clearance and creepage limits as x.x mm minimum for the WB Stretched SOIC-8
package.
2. To determine resistance and capacitance, the Si8931/32 is converted into a two-terminal device. Pins 1–4 are shorted together
to form the first terminal, and pins 5–8 are shorted together to form the second terminal. The parameters are then measured
between these two terminals.
12
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Si8931/32 Data Sheet • Electrical Specifications
Table 4.7. IEC 60664-1 Ratings
Specification
Parameter
Test Conditions
WB Stretched
SOIC-8
NB SOIC-8
Basic Isolation Group
Material Group
I
I
Rated Mains Voltages < 150 VRMS
I-IV
I-IV
Rated Mains Voltages < 300 VRMS
I-IV
I-IV
Rated Mains Voltages < 600 VRMS
I-IV
I-III
Installation
Classification
Table 4.8. VDE 0884-11 Insulation Characteristics1
Characteristic
Parameter
Symbol
Maximum Working Insulation Voltage
VIORM
Test Condition
Unit
WB Stretched
SOIC-8
NB SOIC-8
1414
560
V peak
2650
1050
V peak
8000
4000
V peak
Method b1
Input to Output Test Voltage
VPR
(VIORM x 1.875 = VPR, 100%
Production Test, tm = 1 sec,
Partial Discharge < 5 pC)
Transient Overvoltage
VIOTM
Surge Voltage
VIOSM
Pollution Degree
(DIN VDE 0110, Table 1)
Insulation Resistance at TS,
VIO = 500 V
RS
t = 60 sec
Tested per IEC 60065 with surge
6250
6250
voltage using rise/decay time of 1.2
(Tested with 10
(Tested with 10 kV)
μs/50 μs
kV)
2
2
>109
>109
V peak
Ω
Note:
1. This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is
ensured by protective circuits. The Si8931/32 provides a climate classification of 40/125/21.
13
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Si8931/32 Data Sheet • Electrical Specifications
4.2 Typical Operating Characteristics
0.05
0.05
INL (%)
0.1
INL (%)
0.1
0
0
-0.05
-0.05
-0.1
-0.1
-40
-20
0
20
40
60
Temperature (˚C)
Si8931
80
100
3.0
120
0.3
0.3
0.2
0.2
0.1
0.1
0
5.0
5.5
Si8932
Figure 4.5. Nonlinearity (%) vs. VDDA Supply (V)
INL (%)
INL (%)
4.5
Si8931
Si8932
0
-0.1
-0.1
-0.2
-0.2
-0.3
-0.3
0.0
0.5
1.0
1.5
Input Signal Amplitude (V)
2.0
0.0
2.5
Figure 4.6. Si8931 Nonlinearity (%) vs. Input Signal Amplitude (mV)
100
100
90
90
80
80
70
0.5
1.0
1.5
Input Signal Amplitude (V)
2.0
2.5
Figure 4.7. Si8932 Nonlinearity (%) vs. Input Signal Amplitude (mV)
SNR (dB)
SNR (dB)
4.0
VDDA (V)
Figure 4.4. Nonlinearity (%) vs. Temperature (°C)
70
60
60
50
50
40
40
-40
-20
0
20
40
60
Temperature (˚C)
Si8931
Si8932
80
100
120
Figure 4.8. Signal-to-Noise Ratio (dB) vs. Temperature
(°C)
14
3.5
3.0
3.5
4.0
4.5
VDDA Supply (V)
Si8931
Si8932
5.0
5.5
Figure 4.9. Signal-to-Noise Ratio (dB) vs. VDDA Supply
(V)
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100
100
90
90
80
80
SNR (dB)
SNR (dB)
Si8931/32 Data Sheet • Electrical Specifications
70
70
60
60
50
50
40
40
0.0
0.5
1.0
1.5
Input Signal Amplitude (V)
2.0
2.5
Figure 4.10. Si8931 Signal-to-Noise Ratio (dB) vs. Input
Signal Amplitude (V)
0.0
0.5
1.0
1.5
Input Signal Amplitude (V)
2.0
2.5
Figure 4.11. Si8932 Signal-to-Noise Ratio (dB) vs. Input
Signal Amplitude (V)
100
3
2.5
90
2
Output (V)
SNR (dB)
80
70
1.5
1
60
0.5
50
0
40
1.0
-0.5
-0.50
5.0
0.00
0.50
Input Signal Frequency (kHz)
Si8931
Si8932
-50
-50
-60
-60
-70
-70
-80
2.00
2.50
3.00
3.50
-80
-90
-90
-100
-100
-110
-110
-40
-20
0
20
40
60
Temperature (˚C)
Si8931
Si8932
80
100
120
Figure 4.14. Total Harmonic Distortion (dB) vs. Temperature (°C)
15
1.50
Vin (V)
Figure 4.13. Output Voltage (V) vs. Input Voltage (V)
THD (dB)
THD (dB)
Figure 4.12. Signal-to-Noise Ratio (dB) vs. Input Signal
Frequency (kHz)
1.00
3.0
3.5
4.0
4.5
VDDA Supply (V)
Si8931
Si8932
5.0
5.5
Figure 4.15. Total Harmonic Distortion (dB) vs. VDDA Supply (V)
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-40
-50
-50
-60
-60
-70
THD (dB)
THD (dB)
Si8931/32 Data Sheet • Electrical Specifications
-70
-80
-80
-90
-90
-100
-110
-100
0.0
0.5
1.0
1.5
Input Signal Amplitude (V)
2.0
1.0
2.5
5.0
Input Signal Frequency (kHz)
Si8931
Figure 4.17. Total Harmonic Distortion (dB) vs. Input Signal Frequency (kHz)
3
3
2
2
1
1
Input Offset (mV)
Input Offset (mV)
Figure 4.16. Si8931 Total Harmonic Distortion (dB) vs.
Input Signal Amplitude (V)
0
-1
-2
-1
-3
-40
-20
0
20
40
60
Temperature (˚C)
Si8931
80
100
120
3.0
3.5
4.0
4.5
VDDA Supply (V)
Si8932
Si8931
Figure 4.18. Input Offset (mV) vs. Temperature (°C)
0.3
0.3
0.2
0.2
0.1
0.1
0
5.5
0
-0.1
-0.1
-0.2
-0.2
-0.3
5.0
Si8932
Figure 4.19. Input Offset (mV) vs. VDDA Supply (V)
Gain Error (%)
Gain Error (%)
0
-2
-3
-0.3
-40
-20
0
20
40
60
Temperature (˚C)
Si8931/32
80
100
120
Figure 4.20. Gain Error (%) vs. Temperature (°C)
16
Si8932
3.0
3.5
4.0
4.5
5.0
5.5
VDDA (V)
Si8931/32
Figure 4.21. Gain Error (%) vs. VDDA Supply (V)
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12
12
10
10
8
8
IDDB (mA)
6
6
4
4
2
2
0
0
-40
-20
0
20
40
60
Temperature (˚C)
80
100
-40
120
-20
0
20
Si8931/32
Si8931
Figure 4.22. IDDA (mA) vs. Temperature (°C)
80
100
45
100
30
Normalized Gain (dB)
120
60
40
20
15
0
-15
-30
0
-45
1
Power Supply Frequency (kHz)
10000
Input Frequency (Hz)
Figure 4.24. PSRR (dB) vs. Power Supply Frequency (kHz)
Figure 4.25. Amplifier Bandwidth
5
100
100000
1000000
1.4
1.55
1.35
1.5
1.35
1.5
1.45
1.3
Tfall = 540 ns
1.25
1.4
25°C
CL = 100 pF
Input (V)
1.55
Output (V)
Input (V)
1000
1.4
1.3
1.45
Trise = 560 ns
1.25
1.4
25°C
CL = 100 pF
1.2
1.35
1.2
1.35
1.15
1.3
1.15
1.3
1.1
-1.E-05
-8.E-06
-6.E-06
-4.E-06
-2.E-06
0.E+00
2.E-06
Time (s)
Input
Output
4.E-06
6.E-06
8.E-06
1.25
1.E-05
Figure 4.26. Si8931 High-to-Low Step Response
17
120
Si8932
Figure 4.23. IDDB (mA) vs. Temperature (°C)
80
PSRR (dB)
40
60
Temperature (˚C)
1.1
-1.E-05
-8.E-06
-6.E-06
-4.E-06
-2.E-06
0.E+00
2.E-06
Time (s)
Input
Output
4.E-06
6.E-06
8.E-06
Output (V)
IDDA (mA)
Si8931/32 Data Sheet • Electrical Specifications
1.25
1.E-05
Figure 4.27. Si8931 Low-to-High Step Response
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Si8931/32 Data Sheet • Electrical Specifications
1.4
1.4
1.4
1.4
1.35
1.35
1.35
1.35
1.3
1.3
1.3
1.3
Trise = 680 ns
1.25
1.25
(V)
(V)
Tfall = 640 ns
1.25
1.25
25°C
CL = 100 pF
25°C
CL = 100 pF
1.2
1.2
1.2
1.2
1.15
1.15
1.15
1.15
1.1
-1.E-05
-8.E-06
-6.E-06
-4.E-06
-2.E-06
0.E+00
2.E-06
Time (s)
Input
Output
4.E-06
6.E-06
8.E-06
1.1
1.E-05
Figure 4.28. Si8932 High-to-Low Step Response
18
1.1
-1.E-05
-8.E-06
-6.E-06
-4.E-06
-2.E-06
0.E+00
2.E-06
Time (s)
Input
Output
4.E-06
6.E-06
8.E-06
1.1
1.E-05
Figure 4.29. Si8932 Low-to-High Step Response
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Si8931/32 Data Sheet • Pin Descriptions
5. Pin Descriptions
5.1 Si8931 Pin Descriptions
Table 5.1. Si8931 Pin Descriptions
Name
Pin Number
Description
VDDA
1
Input side power supply
VIN
2
Voltage input
NC1
3
No Connect
GNDA
4
Input side ground
GNDB
5
Output side ground
AON
6
Analog output low
AOP
7
Analog output high
VDDB
8
Output side power supply
Note:
1. No Connect. These pins are not internally connected. To maximize CMTI performance, these pins should be connected to the
ground plane.
19
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Si8931/32 Data Sheet • Pin Descriptions
5.2 Si8932 Pin Descriptions
VDDA
1
8
VDDB
VIN
2
7
AO
NC
3
6
GNDB
GNDA
4
5
GNDB
Si8932
Table 5.2. Si8932 Pin Descriptions
Name
Pin Number
Description
VDDA
1
Input side power supply
VIN
2
Voltage input
NC1
3
No Connect
GNDA
4
Input side ground
GNDB
5
Output side ground
GNDB
6
Output side ground
AO
7
Analog output
VDDB
8
Output side power supply
Note:
1. No Connect. These pins are not internally connected. To maximize CMTI performance, these pins should be connected to the
ground plane.
20
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Si8931/32 Data Sheet • Packaging
6. Packaging
6.1 Package Outline: 8-Pin Wide Body Stretched SOIC
The figure below illustrates the package details for the Si8931/32 in a 8-Pin Wide Body Stretched SOIC package. The table lists the
values for the dimensions shown in the illustration.
Figure 6.1. 8-Pin Wide Body Stretched SOIC Package
Table 6.1. 8-Pin Wide Body Stretched SOIC Package Diagram Dimensions
Symbol
Millimeters
Min
Max
A
2.49
2.79
A1
0.36
0.46
b
0.30
0.51
c
0.20
0.33
D
5.74
5.94
E
11.25
11.76
E1
7.39
7.59
e
21
1.27 BSC
L
0.51
1.02
h
0.25
0.76
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Si8931/32 Data Sheet • Packaging
Symbol
Millimeters
Min
Max
θ
0°
8°
aaa
—
0.25
bbb
—
0.25
ccc
—
0.10
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended reflow profile per JEDEC J-STD-020C specification for small body, lead-free components.
22
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Si8931/32 Data Sheet • Packaging
6.2 Package Outline: 8-Pin Narrow Body SOIC
The figure below illustrates the package details for the Si8931/32 in an 8-Pin Narrow Body SOIC package. The table lists the values for
the dimensions shown in the illustration.
Figure 6.2. 8-Pin Narrow Body SOIC Package
Table 6.2. 8-Pin Narrow Body SOIC Package Diagram Dimensions
Dimension
Min
Max
A
1.35
1.75
A1
0.10
0.25
A2
1.40 REF
1.55 REF
B
0.33
0.51
C
0.19
0.25
D
4.80
5.00
E
3.80
4.00
e
23
1.27 BSC
H
5.80
6.20
h
0.25
0.50
L
0.40
1.27
α
0°
8°
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Si8931/32 Data Sheet • Packaging
Dimension
Min
Max
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1982.
3. This drawing conforms to JEDEC Outline MS-012.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020B specification for Small Body Components.
24
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Si8931/32 Data Sheet • Packaging
6.3 Land Pattern: 8-Pin Wide Body Stretched SOIC
The figure below illustrates the recommended land pattern details for the Si8931/32 in a 8-Pin Wide Body Stretched SOIC package.
The table lists the values for the dimensions shown in the illustration.
Figure 6.3. 8-Pin Wide Body Stretched SOIC Land Pattern
Table 6.3. 8-Pin Wide Body Stretched SOIC Land Pattern Dimensions1
Dimension
(mm)
C1
10.60
E
1.27
X1
0.60
Y1
1.85
Note:
General
1. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a
Fabrication Allowance of 0.05mm.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm
minimum, all the way around the pad.
Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release.
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins.
Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
25
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Si8931/32 Data Sheet • Packaging
6.4 Land Pattern: 8-Pin Narrow Body SOIC
The figure below illustrates the recommended land pattern details for the Si8931/32 in an 8-Pin Narrow Body SOIC package. The table
lists the values for the dimensions shown in the illustration.
Figure 6.4. 8-Pin Narrow Body SOIC Land Pattern
Table 6.4. 8-Pin Narrow Body SOIC Land Pattern Dimensions
Symbol
mm
C1
5.40
E
1.27
X1
0.60
Y1
1.55
Note:
1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X173-8N for Density Level B (Median Land Protrusion).
2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0.05 mm is assumed.
26
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Si8931/32 Data Sheet • Packaging
6.5 Top Marking: 8-Pin Wide Body Stretched SOIC
The figure below illustrates the top markings for the Si8931/32 in a 8-Pin Wide Body Stretched SOIC package. The table explains the
top marks shown in the illustration.
S i 8 9 3 X V
TTTT TT
Y Y WW
Figure 6.5. 8-Pin Wide Body Stretched SOIC Top Marking
Table 6.5. 8-Pin Wide Body Stretched SOIC Top Mark Explanation
Si893X
Line 1 Marking:
Customer Part Number
X = Base part number
• 1 = Differential output
• 2 = Single-ended output
V = Insulation rating:
• D = 5.0 kVrms
Line 2 Marking:
TTTTTT = Mfg Code
Manufacturing Code from the Assembly Purchase Order form.
YY = Year
Line 3 Marking:
WW = Work Week
Circle = 43 mils Diameter
Assigned by the Assembly House. Corresponds to the year and
work week of the mold date.
Left-Justified
27
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Si8931/32 Data Sheet • Packaging
6.6 Top Marking: 8-Pin Narrow Body SOIC
The figure below illustrates the top markings for the Si8931/32 in an 8-Pin Narrow Body SOIC package. The table explains the top
marks shown in the illustration.
S i 8 9 3XV
CC
Y Y WW
TTTT TT
Figure 6.6. 8-Pin Narrow Body SOIC Top Marking
Table 6.6. 8-Pin Narrow Body SOIC Top Marking Explanation
Si893X = Isolator Amplifier Series
X = Base part number
• 1 = Differential output
• 2 = Single-ended output
Line 1 Marking: Customer Part Number
S = Input Range:
• A = ±62.5 mV
• B = ±250 mV
V = Insulation rating:
• B = 2.5 kVrms
CC = Country of Origin ISO Code Abbreviation
Line 2 Marking:
YY = Year
WW = Work Week
Assigned by the Assembly House. Corresponds to the year and work week
of the mold date.
TTTTTT = Mfg Code
Line 3 Marking: Circle = 19.7 mils Diameter
Manufacturing Code from the Assembly Purchase Order form.
Left-Justified
28
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Si8931/32 Data Sheet • Revision History
7. Revision History
Revision 0.8
May, 2021
• Added Automotive OPNs to 1. Ordering Guide.
• Updated Figure 3.1 Voltage Sense Application on page 6.
• Updated Table 4.4 Absolute Maximum Ratings1 on page 11.
• Added Surge Voltage parameter to Table 4.8 VDE 0884-11 Insulation Characteristics1 on page 13.
• Changed "60 mm" to "60 µm" in Solder Mask Design note in Table 6.3 8-Pin Wide Body Stretched SOIC Land Pattern Dimensions1
on page 25.
Revision 0.7
December, 2019
• Updated Applications and Key Features on front page.
• Updated 4. Electrical Specifications after full characterization.
• Added section for Automotive Grade OPNs.
• Updated Table 4.6 Insulation and Safety-Related Specifications on page 12.
• Updated 6.6 Top Marking: 8-Pin Narrow Body SOIC.
• Changed Si8932 Pin 6 from NC to GND.
• Numerous clarifications throughout.
Revision 0.5
March, 2019
• Updated specifications.
• Added narrow body SOIC-8 package.
Revision 0.2
May, 2018
• Corrections and clarifications.
Revision 0.1
January, 2018
• Initial draft.
29
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