EFM32HG309F64N-C-QFN24

EFM32 Happy Gecko Family EFM32HG Data Sheet The EFM32 Happy Gecko MCUs are the world’s most energyfriendly microcontrollers. KEY FEATURES The EFM32HG offers unmatched performance and ultra low power consumption in both active and sleep modes. EFM32HG devices consume as little as 0.6 μA in Stop mode and 127 μA/MHz in Run mode. It also features autonomous peripherals, high overall chip and analog integration, and the performance of the industry standard 32-bit ARM CortexM0+ processor, making it perfect for battery-powered systems and systems with highperformance, low-energy requirements. • Alarm and security systems • Industrial and home automation Core / Memory ARM Cortex TM • Ultra low power operation • 0.6 μA current in Stop (EM3), with brown-out detection and RAM retention • 51 μA/MHz in EM1 • 127 μA/MHz in Run mode (EM0) • Fast wake-up time of 2 µs EFM32HG applications include the following: • Energy, gas, water and smart metering • Health and fitness applications • Smart accessories • ARM Cortex-M0+ at 25 MHz Clock Management High Frequency Crystal Oscillator 48/24 MHz Comm. RC Osc. High Frequency RC Oscillator Auxiliary High Freq. RC Osc. Low Freq. RC Oscillator M0+ processor Flash Program Memory RAM Memory Low Frequency Crystal Oscillator Debug w/ MTB DMA Controller Ultra Low Freq. RC Oscillator • Hardware cryptography (AES) • Up to 64 kB of Flash and 8 kB of RAM Energy Management Voltage Regulator Voltage Comparator Brown-out Detector Power-on Reset Security Hardware AES 32-bit bus Peripheral Reflex System Serial Interfaces I/O Ports Timers and Triggers Analog Interfaces USART Low Energy UARTTM External Interrupts General Purpose I/O Timer/Counter Real Time Counter ADC Low Energy USB I2C Pin Reset Pin Wakeup Pulse Counter Watchdog Timer Current DAC Analog Comparator Lowest power mode with peripheral operational: EM0 - Active EM1 - Sleep silabs.com | Building a more connected world. EM2 – Deep Sleep EM3 - Stop EM4 - Shutoff Rev. 2.40 EFM32HG Data Sheet Feature List 1. Feature List • ARM Cortex-M0+ CPU platform • High Performance 32-bit processor @ up to 25 MHz • Wake-up Interrupt Controller • SysTick System Timer • Flexible Energy Management System • 20 nA @ 3 V Shutoff Mode • 0.6 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector, RAM and CPU retention • 0.9 µA @ 3 V Deep Sleep Mode, including RTC with 32.768 kHz oscillator, Power-on Reset, Brown-out Detector, RAM and CPU retention • 51 µA/MHz @ 3 V Sleep Mode • 127 µA/MHz @ 3 V Run Mode, with code executed from flash • 64/32 kB Flash • 8/4 kB RAM • Up to 37 General Purpose I/O pins • Configurable push-pull, open-drain, pull-up/down, input filter, drive strength • Configurable peripheral I/O locations • Up to 16 asynchronous external interrupts • Output state retention and wake-up from Shutoff Mode • 6 Channel DMA Controller • 6 Channel Peripheral Reflex System (PRS) for autonomous inter-peripheral signaling • Hardware AES with 128-bit keys in 54 cycles • Timers/Counters • 3× 16-bit Timer/Counter • 3×3 Compare/Capture/PWM channels • Dead-Time Insertion on TIMER0 • 1× 24-bit Real-Time Counter • 1× 16-bit Pulse Counter • Watchdog Timer with dedicated RC oscillator @ 50 nA • Communication interfaces • Up to 2× Universal Synchronous/Asynchronous Receiver/Transmitter • UART/SPI/SmartCard (ISO 7816)/IrDA/I2S • Triple buffered full/half-duplex operation • Low Energy UART • Autonomous operation with DMA in Deep Sleep Mode • I2C Interface with SMBus support • Address recognition in Stop Mode • Low Energy Universal Serial Bus (USB) Device • Fully USB 2.0 compliant • On-chip PHY and embedded 5V to 3.3V regulator • Crystal-free operation • Ultra low power precision analog peripherals • 12-bit 1 Msamples/s Analog-to-Digital Converter • 4 single-ended channels/2 differential channels • On-chip temperature sensor • Current Digital-to-Analog Converter • Selectable current range between 0.05 and 64 µA • 1× Analog Comparator • Capacitive sensing with up to 5 inputs • Supply Voltage Comparator • Ultra efficient Power-on Reset and Brown-Out Detector silabs.com | Building a more connected world. Rev. 2.40 | 2 EFM32HG Data Sheet Feature List • Debug Interface • 2-pin Serial Wire Debug interface • Micro Trace Buffer (MTB) • Pre-Programmed USB/UART Bootloader • Temperature range -40 to 85 ºC (EFM32HGxxxFxx) or -40 to 105 ºC (EFM32HGxxxFxxN) • Single power supply 1.98 to 3.8 V • Packages: • CSP36 (3×3 mm) • QFN24 (5×5 mm) • QFN32 (6×6 mm) • TQFP48 (7×7 mm) silabs.com | Building a more connected world. Rev. 2.40 | 3 EFM32HG Data Sheet Ordering Information 2. Ordering Information The following table shows the available EFM32HG devices. Table 2.1. Ordering Information Flash (kB) RAM (kB) Max Speed (MHz) Supply Voltage (V) Temperature (ºC) Package EFM32HG108F32G-C-QFN24 32 4 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG108F64G-C-QFN24 64 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG110F32G-C-QFN24 32 4 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG110F64G-C-QFN24 64 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG210F32G-C-QFN32 32 4 25 1.98 - 3.8 -40 - 85 QFN32 EFM32HG210F64G-C-QFN32 64 8 25 1.98 - 3.8 -40 - 85 QFN32 EFM32HG222F32G-C-QFP48 32 4 25 1.98 - 3.8 -40 - 85 TQFP48 EFM32HG222F64G-C-QFP48 64 8 25 1.98 - 3.8 -40 - 85 TQFP48 EFM32HG308F32G-C-QFN24 32 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG308F64G-C-QFN24 64 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG309F32G-C-QFN24 32 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG309F64G-C-QFN24 64 8 25 1.98 - 3.8 -40 - 85 QFN24 EFM32HG310F32G-C-QFN32 32 8 25 1.98 - 3.8 -40 - 85 QFN32 EFM32HG310F64G-C-QFN32 64 8 25 1.98 - 3.8 -40 - 85 QFN32 EFM32HG321F32G-C-QFP48 32 8 25 1.98 - 3.8 -40 - 85 TQFP48 EFM32HG321F64G-C-QFP48 64 8 25 1.98 - 3.8 -40 - 85 TQFP48 EFM32HG322F32G-C-QFP48 32 8 25 1.98 - 3.8 -40 - 85 TQFP48 EFM32HG322F64G-C-QFP48 64 8 25 1.98 - 3.8 -40 - 85 TQFP48 *EFM32HG350F32G-C-CSP361 32 8 25 1.98 - 3.8 -40 - 85 CSP36 *EFM32HG350F64G-C-CSP361 64 8 25 1.98 - 3.8 -40 - 85 CSP36 EFM32HG108F32N-C-QFN24 32 4 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG108F64N-C-QFN24 64 8 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG110F32N-C-QFN24 32 4 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG110F64N-C-QFN24 64 8 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG210F32N-C-QFN32 32 4 25 1.98 - 3.8 -40 - 105 QFN32 EFM32HG210F64N-C-QFN32 64 8 25 1.98 - 3.8 -40 - 105 QFN32 EFM32HG222F32N-C-QFP48 32 4 25 1.98 - 3.8 -40 - 105 TQFP48 EFM32HG222F64N-C-QFP48 64 8 25 1.98 - 3.8 -40 - 105 TQFP48 EFM32HG308F32N-C-QFN24 32 8 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG308F64N-C-QFN24 64 8 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG309F32N-C-QFN24 32 8 25 1.98 - 3.8 -40 - 105 QFN24 EFM32HG309F64N-C-QFN24 64 8 25 1.98 - 3.8 -40 - 105 QFN24 Ordering Code silabs.com | Building a more connected world. Rev. 2.40 | 4 EFM32HG Data Sheet Ordering Information Flash (kB) RAM (kB) Max Speed (MHz) Supply Voltage (V) Temperature (ºC) Package EFM32HG310F32N-C-QFN32 32 8 25 1.98 - 3.8 -40 - 105 QFN32 EFM32HG310F64N-C-QFN32 64 8 25 1.98 - 3.8 -40 - 105 QFN32 EFM32HG321F32N-C-QFP48 32 8 25 1.98 - 3.8 -40 - 105 TQFP48 EFM32HG321F64N-C-QFP48 64 8 25 1.98 - 3.8 -40 - 105 TQFP48 EFM32HG322F32N-C-QFP48 32 8 25 1.98 - 3.8 -40 - 105 TQFP48 EFM32HG322F64N-C-QFP48 64 8 25 1.98 - 3.8 -40 - 105 TQFP48 Ordering Code Note: 1. End of Life (EOL) for OPNs EFM32HG350F32G-C-CSP36 and EFM32HG350F64G-C-CSP36. EFM32 HG 322 F 64 N – C – QFP 48 R Tape and Reel (Optional) Pin Count Package Revision Temperature Grade – G (-40 to +85 °C), N (-40 to +105 °C) Memory Size in kB Memory Type (Flash) Feature Set Code Happy Gecko Energy Friendly Microcontroller 32-bit Figure 2.1. Ordering Code Decoder Adding the suffix 'R' to the part number (e.g. EFM32HG322F64-C-QFP48R) denotes tape and reel. Adding 'G' or 'N' after the memory size (e.g. EFM32HG322F64N-C-QFP48) denotes temperature grade. Visit http://www.silabs.com for information on global distributors and representatives. silabs.com | Building a more connected world. Rev. 2.40 | 5 Table of Contents 1. Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3. System Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 System Introduction . . . . . . . . . . . . . . . . . . . 3.1.1 ARM Cortex-M0+ Core . . . . . . . . . . . . . . . . . 3.1.2 Debug Interface (DBG) . . . . . . . . . . . . . . . . . 3.1.3 Memory System Controller (MSC) . . . . . . . . . . . . . 3.1.4 Direct Memory Access Controller (DMA) . . . . . . . . . . . 3.1.5 Reset Management Unit (RMU) . . . . . . . . . . . . . . 3.1.6 Energy Management Unit (EMU) . . . . . . . . . . . . . 3.1.7 Clock Management Unit (CMU) . . . . . . . . . . . . . . 3.1.8 Watchdog (WDOG) . . . . . . . . . . . . . . . . . . 3.1.9 Peripheral Reflex System (PRS) . . . . . . . . . . . . . 3.1.10 Low Energy USB . . . . . . . . . . . . . . . . . . 3.1.11 Inter-Integrated Circuit Interface (I2C) . . . . . . . . . . . 3.1.12 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.1.13 Pre-Programmed USB/UART Bootloader . . . . . . . . . . 3.1.14 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) 3.1.15 Timer/Counter (TIMER) . . . . . . . . . . . . . . . . 3.1.16 Real Time Counter (RTC) . . . . . . . . . . . . . . . 3.1.17 Pulse Counter (PCNT) . . . . . . . . . . . . . . . . 3.1.18 Analog Comparator (ACMP) . . . . . . . . . . . . . . 3.1.19 Voltage Comparator (VCMP) . . . . . . . . . . . . . . 3.1.20 Analog to Digital Converter (ADC) . . . . . . . . . . . . 3.1.21 Current Digital to Analog Converter (IDAC) . . . . . . . . . 3.1.22 Advanced Encryption Standard Accelerator (AES) . . . . . . . 3.1.23 General Purpose Input/Output (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 .10 .10 .10 .11 .11 .11 .11 .11 .11 .11 .11 .11 .11 .12 .12 .12 .12 .12 .12 .12 .12 .12 .12 3.2 Configuration Summary 3.2.1 EFM32HG108 . . 3.2.2 EFM32HG110 . . 3.2.3 EFM32HG210 . . 3.2.4 EFM32HG222 . . 3.2.5 EFM32HG308 . . 3.2.6 EFM32HG309 . . 3.2.7 EFM32HG310 . . 3.2.8 EFM32HG321 . . 3.2.9 EFM32HG322 . . 3.2.10 EFM32HG350 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 .13 .14 .15 .16 .17 .18 .19 .20 .21 .22 3.3 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . .23 . . . 4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 Test Conditions . . . . . . . . 4.1.1 Typical Values . . . . . . 4.1.2 Minimum and Maximum Values . silabs.com | Building a more connected world. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 .25 .25 Rev. 2.40 | 6 4.2 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . .25 4.3 General Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . .25 4.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .26 4.5 Current Consumption . . . . 4.5.1 EM0 Current Consumption 4.5.2 EM1 Current Consumption 4.5.3 EM2 Current Consumption 4.5.4 EM3 Current Consumption 4.5.5 EM4 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 .30 .33 .35 .36 .36 4.6 Transition between Energy Modes . . . . . . . . . . . . . . . . . . . . . . .37 4.7 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 4.8 Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 4.9 General Purpose Input Output . . . . . . . . . . . . . . . . . . . . . . . . .39 4.10 Oscillators . . 4.10.1 LFXO . . 4.10.2 HFXO . . 4.10.3 LFRCO . 4.10.4 HFRCO . 4.10.5 AUXHFRCO 4.10.6 USHFRCO 4.10.7 ULFRCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 .47 .47 .48 .49 .52 .53 .53 4.11 Analog Digital Converter (ADC) . 4.11.1 Typical Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 .63 4.12 Current Digital Analog Converter (IDAC) . . . . . . . . . . . . . . . . . . . . .68 4.13 Analog Comparator (ACMP) . . . . . . . . . . . . . . . . . . . . . . . . .74 4.14 Voltage Comparator (VCMP) . . . . . . . . . . . . . . . . . . . . . . . . .76 4.15 I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 4.16 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78 4.17 Digital Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 5. Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 5.1 EFM32HG108 (QFN24) . . . . 5.1.1 Pinout . . . . . . . . 5.1.2 Alternate Functionality Pinout 5.1.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 .81 .84 .86 5.2 EFM32HG110 (QFN24) . . . . 5.2.1 Pinout . . . . . . . . 5.2.2 Alternate Functionality Pinout 5.2.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 .87 .90 .92 5.3 EFM32HG210 (QFN32) . . . . 5.3.1 Pinout . . . . . . . . 5.3.2 Alternate Functionality Pinout 5.3.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 .93 .96 .98 silabs.com | Building a more connected world. Rev. 2.40 | 7 5.4 EFM32HG222 (TQFP48) . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 5.4.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . .99 .99 103 . 105 5.5 EFM32HG308 (QFN24) . . . . . . . . . . . . . . . . . . . . . . . . . . 106 5.5.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 . 06 5.5.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 109 . 5.5.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . 111 5.6 EFM32HG309 (QFN24) . . . . . . . . . . . . . . . . . . . . . . . . . . 112 5.6.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 . 12 5.6.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 115 . 5.6.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . 117 5.7 EFM32HG310 (QFN32) . . . . . . . . . . . . . . . . . . . . . . . . . . 118 5.7.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 . 18 5.7.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 121 . 5.7.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . 123 5.8 EFM32HG321 (TQFP48) . . . . . . . . . . . . . . . . . . . . . . . . 1. 24 5.8.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 . 24 5.8.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 128 . 5.8.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . 130 5.9 EFM32HG322 (TQFP48) . . . . . . . . . . . . . . . . . . . . . . . . 1. 31 5.9.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 . 31 5.9.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 135 . 5.9.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . . . 137 5.10 EFM32HG350 (CSP36) . . . . . . . . . . . . . . . . . . . . . . . . 5.10.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.10.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . 5.10.3 GPIO Pinout Overview . . . . . . . . . . . . . . . . . . . . . . . 138 . . 138 .141 1 . 43 6. CSP36 Package Specifications . . . . . . . . . . . . . . . . . . . . . . . . 144 6.1 CSP36 Package Dimensions 6.2 CSP36 PCB Layout . 6.3 CSP36 Chip Marking . . . . . 6.4 CSP36 Environmental . . . . . . . . . . . . . . . . . . . . . . . .144 . . . . . . . . . . . . . . . . . . . . . . . .146 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 . . 1. 49 7. QFN24 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . . 150 7.1 QFN24 Package Dimensions 7.2 QFN24 PCB Layout . . 7.3 QFN24 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . 150 . . . . . . . . . . . . . . . . . . . . . . . . .151 . . . . . . . . . . . . . . . . . . . . . . . . .153 8. QFN32 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . . 154 8.1 QFN32 Package Dimensions 8.2 QFN32 PCB Layout . . 8.3 QFN32 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . 154 . . . . . . . . . . . . . . . . . . . . . . . . .155 . . . . . . . . . . . . . . . . . . . . . . . . .157 9. TQFP48 Package Specifications silabs.com | Building a more connected world. . . . . . . . . . . . . . . . . . . . . . . .158 Rev. 2.40 | 8 9.1 TQFP48 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 158 9.2 TQFP48 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 9.3 TQFP48 Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . 162 10. Chip Revision, Solder Information, Errata 10.1 Chip Revision . . . . 10.2 Soldering Information 10.3 Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 . . .163 . 163 . 11. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 silabs.com | Building a more connected world. Rev. 2.40 | 9 EFM32HG Data Sheet System Summary 3. System Summary 3.1 System Introduction The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of the powerful 32-bit ARM CortexM0+, innovative low energy techniques, short wake-up time from energy saving modes, and a wide selection of peripherals, the EFM32HG microcontroller is well suited for any battery operated application as well as other systems requiring high performance and low-energy consumption. This section gives a short introduction to each of the modules in general terms and also shows a summary of the configuration for the EFM32HG devices. For a complete feature set and in-depth information on the modules, refer to the EFM32HG Reference Manual. A block diagram of the EFM32HG is shown in the following figure. Core / Memory Clock Management High Frequency Crystal Oscillator 48/24 MHz Comm. RC Osc. High Frequency RC Oscillator Auxiliary High Freq. RC Osc. Low Freq. RC Oscillator ARM CortexTM M0+ processor Flash Program Memory RAM Memory Low Frequency Crystal Oscillator Debug w/ MTB DMA Controller Ultra Low Freq. RC Oscillator Energy Management Voltage Regulator Voltage Comparator Brown-out Detector Power-on Reset Security Hardware AES 32-bit bus Peripheral Reflex System Serial Interfaces I/O Ports Timers and Triggers Analog Interfaces USART Low Energy UARTTM External Interrupts General Purpose I/O Timer/Counter Real Time Counter ADC Low Energy USB I2C Pin Reset Pin Wakeup Pulse Counter Watchdog Timer Current DAC Analog Comparator Lowest power mode with peripheral operational: EM0 - Active EM1 - Sleep EM2 – Deep Sleep EM3 - Stop EM4 - Shutoff Figure 3.1. Block Diagram 3.1.1 ARM Cortex-M0+ Core The ARM Cortex-M0+ includes a 32-bit RISC processor which can achieve as much as 0.9 Dhrystone MIPS/MHz. A wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep is included as well. The EFM32 implementation of the Cortex-M0+ is described in detail in ARM Cortex-M0+ Devices Generic User Guide. 3.1.2 Debug Interface (DBG) This device includes hardware debug support through a 2-pin serial-wire debug interface and a Micro Trace Buffer (MTB) for data/ instruction tracing. 3.1.3 Memory System Controller (MSC) The Memory System Controller (MSC) is the program memory unit of the EFM32HG microcontroller. The flash memory is readable and writable from both the Cortex-M0+ and DMA. The flash memory is divided into two blocks; the main block and the information block. Program code is normally written to the main block. Additionally, the information block is available for special user data and flash lock bits. There is also a read-only page in the information block containing system and device calibration data. Read and write operations are supported in the energy modes EM0 and EM1. silabs.com | Building a more connected world. Rev. 2.40 | 10 EFM32HG Data Sheet System Summary 3.1.4 Direct Memory Access Controller (DMA) The Direct Memory Access (DMA) controller performs memory operations independently of the CPU. This has the benefit of reducing the energy consumption and the workload of the CPU, and enables the system to stay in low energy modes when moving for instance data from the USART to RAM or from the External Bus Interface to a PWM-generating timer. The DMA controller uses the PL230 µDMA controller licensed from ARM. 3.1.5 Reset Management Unit (RMU) The RMU is responsible for handling the reset functionality of the EFM32HG. 3.1.6 Energy Management Unit (EMU) The Energy Management Unit (EMU) manage all the low energy modes (EM) in EFM32HG microcontrollers. Each energy mode manages if the CPU and the various peripherals are available. The EMU can also be used to turn off the power to unused SRAM blocks. 3.1.7 Clock Management Unit (CMU) The Clock Management Unit (CMU) is responsible for controlling the oscillators and clocks on-board the EFM32HG. The CMU provides the capability to turn on and off the clock on an individual basis to all peripheral modules in addition to enable/disable and configure the available oscillators. The high degree of flexibility enables software to minimize energy consumption in any specific application by not wasting power on peripherals and oscillators that are inactive. 3.1.8 Watchdog (WDOG) The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase application reliability. The failure may e.g. be caused by an external event, such as an ESD pulse, or by a software failure. 3.1.9 Peripheral Reflex System (PRS) The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module communicate directly with each other without involving the CPU. Peripheral modules which send out Reflex signals are called producers. The PRS routes these reflex signals to consumer peripherals which apply actions depending on the data received. The format for the Reflex signals is not given, but edge triggers and other functionality can be applied by the PRS. 3.1.10 Low Energy USB The unique Low Energy USB peripheral provides a full-speed USB 2.0 compliant device controller and PHY with ultra-low current consumption. The device supports both full-speed (12 MBit/s) and low speed (1.5 MBit/s) operation, and includes a dedicated USB oscillator with clock recovery mechanism for crystal-free operation. No external components are required. The Low Energy Mode ensures the current consumption is optimized and enables USB communication on a strict power budget. The USB device includes an internal dedicated descriptor-based Scatter/Gather DMA and supports up to 3 OUT endpoints and 3 IN endpoints, in addition to endpoint 0. The onchip PHY includes software controllable pull-up and pull-down resistors. 3.1.11 Inter-Integrated Circuit Interface (I2C) The I2C module provides an interface between the MCU and a serial I2C-bus. It is capable of acting as both a master and a slave, and supports multi-master buses. Both standard-mode, fast-mode and fastmode plus speeds are supported, allowing transmission rates all the way from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant system. The interface provided to software by the I2C module, allows both fine-grained control of the transmission process and close to automatic transfers. Automatic recognition of slave addresses is provided in all energy modes. 3.1.12 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible serial I/O module. It supports full duplex asynchronous UART communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with ISO7816 SmartCards, IrDA, and I2S devices. 3.1.13 Pre-Programmed USB/UART Bootloader The bootloader presented in application note, AN0042: USB/UART Bootloader, is pre-programmed in the device at factory. The bootloader enables users to program the EFM32 through a UART or a USB CDC class virtual UART without the need for a debugger. The autobaud feature, interface, and commands are described further in the application note. silabs.com | Building a more connected world. Rev. 2.40 | 11 EFM32HG Data Sheet System Summary 3.1.14 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) The unique LEUARTTM, the Low Energy UART, is a UART that allows two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud/ s. The LEUART includes all necessary hardware support to make asynchronous serial communication possible with minimum of software intervention and energy consumption. 3.1.15 Timer/Counter (TIMER) The 16-bit general purpose timer has three compare/capture channels for input capture and compare/Pulse-Width Modulation (PWM) output. TIMER0 also includes a Dead-Time Insertion module suitable for motor control applications. 3.1.16 Real Time Counter (RTC) The Real Time Counter (RTC) contains a 24-bit counter and is clocked either by a 32.768 kHz crystal oscillator, or a 32.768 kHz RC oscillator. In addition to energy modes EM0 and EM1, the RTC is also available in EM2. This makes it ideal for keeping track of time since the RTC is enabled in EM2 where most of the device is powered down. 3.1.17 Pulse Counter (PCNT) The Pulse Counter (PCNT) can be used for counting pulses on a single input or to decode quadrature encoded inputs. It runs off either the internal LFACLK or the PCNTn_S0IN pin as external clock source. The module may operate in energy mode EM0 - EM3. 3.1.18 Analog Comparator (ACMP) The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is higher. Inputs can either be one of the selectable internal references or from external pins. Response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 3.1.19 Voltage Comparator (VCMP) The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can be generated when the supply falls below or rises above a programmable threshold. Response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 3.1.20 Analog to Digital Converter (ADC) The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to one million samples per second. The integrated input mux can select inputs from 4 external pins and 6 internal signals. 3.1.21 Current Digital to Analog Converter (IDAC) The current digital to analog converter can source or sink a configurable constant current, which can be output on, or sinked from pin or ADC. The current is configurable with several ranges of various step sizes. 3.1.22 Advanced Encryption Standard Accelerator (AES) The AES accelerator performs AES encryption and decryption with 128-bit. Encrypting or decrypting one 128-bit data block takes 52 HFCORECLK cycles with 128-bit keys. The AES module is an AHB slave which enables efficient access to the data and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit operations are not supported. 3.1.23 General Purpose Input/Output (GPIO) In the EFM32HG, there are up to 37 General Purpose Input/Output (GPIO) pins, which are divided into ports with up to 16 pins each. These pins can individually be configured as either an output or input. More advanced configurations like open-drain, filtering and drive strength can also be configured individually for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM outputs or USART communication, which can be routed to several locations on the device. The GPIO supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other peripherals. silabs.com | Building a more connected world. Rev. 2.40 | 12 EFM32HG Data Sheet System Summary 3.2 Configuration Summary 3.2.1 EFM32HG108 The features of the EFM32HG108 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.1. EFM32HG108 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA GPIO 17 pins Available pins are shown in 5.1.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 13 EFM32HG Data Sheet System Summary 3.2.2 EFM32HG110 The features of the EFM32HG110 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.2. EFM32HG110 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:6], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 17 pins Available pins are shown in 5.2.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 14 EFM32HG Data Sheet System Summary 3.2.3 EFM32HG210 The features of the EFM32HG210 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.3. EFM32HG210 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:4], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 24 pins Available pins are shown in 5.3.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 15 EFM32HG Data Sheet System Summary 3.2.4 EFM32HG222 The features of the EFM32HG222 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.4. EFM32HG222 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[4:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:4], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 37 pins Available pins are shown in 5.4.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 16 EFM32HG Data Sheet System Summary 3.2.5 EFM32HG308 The features of the EFM32HG308 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.5. EFM32HG308 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA GPIO 15 pins Available pins are shown in 5.5.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 17 EFM32HG Data Sheet System Summary 3.2.6 EFM32HG309 The features of the EFM32HG309 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.6. EFM32HG309 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration ADC0_CH[1:0] ADC0 Full configuration ADC0_CH[9:8] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 15 pins Available pins are shown in 5.6.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 18 EFM32HG Data Sheet System Summary 3.2.7 EFM32HG310 The features of the EFM32HG310 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.7. EFM32HG310 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:5], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 22 pins Available pins are shown in 5.7.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 19 EFM32HG Data Sheet System Summary 3.2.8 EFM32HG321 The features of the EFM32HG321 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.8. EFM32HG321 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[4:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:4], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT GPIO 35 pins Available pins are shown in 5.8.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 20 EFM32HG Data Sheet System Summary 3.2.9 EFM32HG322 The features of the EFM32HG322 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.9. EFM32HG322 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[4:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:4], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 35 pins Available pins are shown in 5.9.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 21 EFM32HG Data Sheet System Summary 3.2.10 EFM32HG350 The features of the EFM32HG350 is a subset of the feature set described in the EFM32HG Reference Manual. The following table describes device specific implementation of the features. Table 3.10. EFM32HG350 Configuration Summary Module Configuration Pin Connections Cortex-M0+ Full configuration NA DBG Full configuration DBG_SWCLK, DBG_SWDIO MSC Full configuration NA DMA Full configuration NA RMU Full configuration NA EMU Full configuration NA CMU Full configuration CMU_OUT0, CMU_OUT1 WDOG Full configuration NA PRS Full configuration NA USB Full configuration USB_VREGI, USB_VREGO, USB_DM, USB_DMPU, USB_DP I2C0 Full configuration I2C0_SDA, I2C0_SCL USART0 Full configuration with IrDA and I2S US0_TX, US0_RX. US0_CLK, US0_CS USART1 Full configuration with IrDA and I2S US1_TX, US1_RX, US1_CLK, US1_CS LEUART0 Full configuration LEU0_TX, LEU0_RX TIMER0 Full configuration with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 Full configuration TIM1_CC[2:0] TIMER2 Full configuration TIM2_CC[2:0] RTC Full configuration NA PCNT0 Full configuration, 16-bit count register PCNT0_S[1:0] ACMP0 Full configuration ACMP0_CH[1:0], ACMP0_O VCMP Full configuration NA ADC0 Full configuration ADC0_CH[7:5], ADC0_CH[1:0] IDAC0 Full configuration IDAC0_OUT AES Full configuration NA GPIO 22 pins Available pins are shown in 5.10.3 GPIO Pinout Overview silabs.com | Building a more connected world. Rev. 2.40 | 22 EFM32HG Data Sheet System Summary 3.3 Memory Map The EFM32HG memory map is shown in the following figure, with RAM and Flash sizes for the largest memory configuration. Figure 3.2. System Address Space with Core and Code Space Listing silabs.com | Building a more connected world. Rev. 2.40 | 23 EFM32HG Data Sheet System Summary Figure 3.3. System Address Space with Peripheral Listing silabs.com | Building a more connected world. Rev. 2.40 | 24 EFM32HG Data Sheet Electrical Characteristics 4. Electrical Characteristics 4.1 Test Conditions 4.1.1 Typical Values The typical data are based on TAMB=25°C and VDD=3.0 V, as defined in 4.3 General Operating Conditions, unless otherwise specified. 4.1.2 Minimum and Maximum Values The minimum and maximum values represent the worst conditions of ambient temperature, supply voltage and frequencies, as defined in 4.3 General Operating Conditions, unless otherwise specified. 4.2 Absolute Maximum Ratings The absolute maximum ratings are stress ratings, and functional operation under such conditions are not guaranteed. Stress beyond the limits specified in the following table may affect the device reliability or cause permanent damage to the device. Functional operating conditions are given in 4.3 General Operating Conditions. Table 4.1. Absolute Maximum Ratings Parameter Symbol Storage temperature range TSTG Maximum soldering temperature TS External main supply voltage VDDMAX Voltage on any I/O pin VIOPIN Current per I/O pin (sink) Current per I/O pin (source) Test Condition Min Typ Max Unit -40 — 150 °C — — 260 °C 0 — 3.8 V -0.3 — VDD+0.3 V IIOMAX_SINK — — 100 mA IIOMAX_SOURCE — — -100 mA Latest IPC/JEDEC JSTD-020 Standard 4.3 General Operating Conditions Table 4.2. General Operating Conditions Parameter Symbol Min Typ Max Unit Ambient temperature range (EFM32HGxxxFxx only) TAMB -40 — 85 °C Ambient temperature range (EFM32HGxxxFxxN only) TAMB -40 — 105 °C Operating supply voltage VDDOP 1.98 — 3.8 V Internal APB clock frequency fAPB — — 25 MHz Internal AHB clock frequency fAHB — — 25 MHz silabs.com | Building a more connected world. Rev. 2.40 | 25 EFM32HG Data Sheet Electrical Characteristics 4.4 Thermal Characteristics Table 4.3. Thermal Characteristics Parameter Symbol Test Condition Thermal resistance, Junction to Ambient θJA Thermal resistance, Junction to Case θJC silabs.com | Building a more connected world. Min Typ Max Unit QFN24 Package, 4-Layer PCB, Air velocity = 0 m/s — 25.8 — °C/W QFN32 Package, 4-Layer PCB, Air velocity = 0 m/s — 24.1 — °C/W TQFP48 Package, 4-Layer PCB, Air velocity = 0 m/s — 60.0 — °C/W QFN24 Package, 4-Layer PCB, Air velocity = 0 m/s — 20.7 — °C/W QFN32 Package, 4-Layer PCB, Air velocity = 0 m/s — 16.0 — °C/W TQFP48 Package, 4-Layer PCB, Air velocity = 0 m/s — 15.0 — °C/W Rev. 2.40 | 26 EFM32HG Data Sheet Electrical Characteristics 4.5 Current Consumption Table 4.4. Current Consumption Parameter Symbol Test Condition EM0 current. No prescaling. Running prime number calculation code from Flash. IEM0 silabs.com | Building a more connected world. Min Typ Max Unit 24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 148 158 µA/MHz 24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 153 163 µA/MHz 24 MHz USHFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 161 172 µA/MHz 24 MHz USHFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 163 174 µA/MHz 24 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 127 137 µA/MHz 24 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 129 139 µA/MHz 21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 131 140 µA/MHz 21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 134 143 µA/MHz 14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 134 143 µA/MHz 14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 137 145 µA/MHz 11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 136 144 µA/MHz 11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 139 148 µA/MHz 6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 142 150 µA/MHz 6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 146 154 µA/MHz 1.2 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 184 196 µA/MHz 1.2 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 194 208 µA/MHz Rev. 2.40 | 27 EFM32HG Data Sheet Electrical Characteristics Parameter Symbol Test Condition EM1 current IEM1 EM2 current IEM2 silabs.com | Building a more connected world. Min Typ Max Unit 24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 64 68 µA/MHz 24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 67 71 µA/MHz 24 MHz USHFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 85 91 µA/MHz 24 MHz USHFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 86 92 µA/MHz 24 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 51 55 µA/MHz 24 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 52 56 µA/MHz 21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 53 57 µA/MHz 21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 54 58 µA/MHz 14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 56 59 µA/MHz 14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 57 61 µA/MHz 11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 58 61 µA/MHz 11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 59 63 µA/MHz 6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 64 68 µA/MHz 6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 67 71 µA/MHz 1.2 MHz HFRCO. all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C — 106 114 µA/MHz 1.2 MHz HFRCO. all peripheral clocks disabled, VDD= 3.0 V, TAMB=105°C — 114 126 µA/MHz EM2 current with RTC prescaled to 1 Hz, 32.768 kHz LFRCO, VDD= 3.0 V, TAMB=25°C — 0.9 1.35 µA EM2 current with RTC prescaled to 1 Hz, 32.768 kHz LFRCO, VDD= 3.0 V, TAMB=85°C — 1.6 3.50 µA EM2 current with RTC prescaled to 1 Hz, 32.768 kHz LFRCO, VDD= 3.0 V, TAMB=105°C, EFM32HGxxxFxxN only — 1.6 8.00 µA Rev. 2.40 | 28 EFM32HG Data Sheet Electrical Characteristics Parameter Symbol Test Condition EM3 current IEM3 EM4 current IEM4 silabs.com | Building a more connected world. Min Typ Max Unit EM3 current (ULFRCO enabled, LFRCO/ LFXO disabled), VDD= 3.0 V, TAMB=25°C — 0.6 0.90 µA EM3 current (ULFRCO enabled, LFRCO/ LFXO disabled), VDD= 3.0 V, TAMB=85°C — 1.2 2.65 µA EM3 current (ULFRCO enabled, LFRCO/ LFXO disabled), VDD= 3.0 V, TAMB=105°C, EFM32HGxxxFxxN only — 1.2 7.00 µA VDD= 3.0 V, TAMB=25°C — 0.02 0.035 µA VDD= 3.0 V, TAMB=85°C — 0.18 0.480 µA VDD= 3.0 V, TAMB=105°C, EFM32HGxxxFxxN only — 0.18 1.500 µA Rev. 2.40 | 29 EFM32HG Data Sheet Electrical Characteristics 4.5.1 EM0 Current Consumption Figure 4.1. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with all Peripheral Clocks Disabled and HFRCO Running at 24 MHz Figure 4.2. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with all Peripheral Clocks Disabled and HFRCO Running at 21 MHz silabs.com | Building a more connected world. Rev. 2.40 | 30 EFM32HG Data Sheet Electrical Characteristics Figure 4.3. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with all Peripheral Clocks Disabled and HFRCO Running at 14 MHz Figure 4.4. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with all Peripheral Clocks Disabled and HFRCO Running at 11 MHz silabs.com | Building a more connected world. Rev. 2.40 | 31 EFM32HG Data Sheet Electrical Characteristics Figure 4.5. EM0 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 6.6 MHz silabs.com | Building a more connected world. Rev. 2.40 | 32 EFM32HG Data Sheet Electrical Characteristics 4.5.2 EM1 Current Consumption Figure 4.6. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 24 MHz Figure 4.7. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 21 MHz silabs.com | Building a more connected world. Rev. 2.40 | 33 EFM32HG Data Sheet Electrical Characteristics Figure 4.8. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 14 MHz Figure 4.9. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 11 MHz silabs.com | Building a more connected world. Rev. 2.40 | 34 EFM32HG Data Sheet Electrical Characteristics Figure 4.10. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 6.6 MHz 4.5.3 EM2 Current Consumption Figure 4.11. EM2 Current Consumption, RTC prescaled to 1 kHz, 32.768 kHz LFRCO silabs.com | Building a more connected world. Rev. 2.40 | 35 EFM32HG Data Sheet Electrical Characteristics 4.5.4 EM3 Current Consumption Figure 4.12. EM3 Current Consumption 4.5.5 EM4 Current Consumption Figure 4.13. EM4 Current Consumption silabs.com | Building a more connected world. Rev. 2.40 | 36 EFM32HG Data Sheet Electrical Characteristics 4.6 Transition between Energy Modes The transition times are measured from the trigger to the first clock edge in the CPU. Table 4.5. Energy Modes Transitions Parameter Symbol Min Typ Max Unit Transition time from EM1 to EM0 tEM10 — 0 — HFCORECLK cycles Transition time from EM2 to EM0 tEM20 — 2 — µs Transition time from EM3 to EM0 tEM30 — 2 — µs Transition time from EM4 to EM0 tEM40 — 163 — µs 4.7 Power Management The EFM32HG requires the AVDD_x, VDD_DREG and IOVDD_x pins to be connected together (with optional filter) at the PCB level. For practical schematic recommendations, please see the application note, AN0002 EFM32 Hardware Design Considerations. Table 4.6. Power Management Parameter Symbol Test Condition Min Typ Max Unit BOD threshold on falling external supply voltage VBODextthr- EM0 1.74 — 1.96 V EM2 1.71 1.86 1.98 V BOD threshold on rising external supply voltage VBODextthr+ — 1.85 — V Delay from reset is released un- tRESET til program execution starts Applies to Power-on Reset, Brownout Reset and pin reset. — 163 — µs Voltage regulator decoupling capacitor. CDECOUPLE X5R capacitor recommended. Apply between DECOUPLE pin and GROUND — 1 — µF USB voltage regulator out decoupling capacitor. CUSB_VREGO X5R capacitor recommended. Apply between USB_VREGO pin and GROUND — 1 — µF X5R capacitor recommended. Apply between USB_VREGI pin and GROUND — 4.7 — µF USB voltage regulator in decou- CUSB_VREGI pling capacitor. silabs.com | Building a more connected world. Rev. 2.40 | 37 EFM32HG Data Sheet Electrical Characteristics 4.8 Flash Table 4.7. Flash Parameter Symbol Flash erase cycles before failure ECFLASH Flash word write cycles between erase WWCFLASH Flash data retention RETFLASH Word (32-bit) programming time tW_PROG Test Condition Min Typ Max Unit 20000 — — cycles — — 21 cycles TAMB