EFM32 Zero Gecko Family
EFM32ZG Data Sheet
The EFM32 Zero Gecko MCUs are the world’s most energy-friendly microcontrollers.
The EFM32ZG offers unmatched performance and ultra low power consumption in both
active and sleep modes. EFM32ZG devices consume as little as 0.5 μA in Stop mode
and 114 μA/MHz in Run mode. It also features autonomous peripherals, high overall chip
and analog integration, and the performance of the industry standard 32-bit ARM CortexM0+ processor, making it perfect for battery-powered systems and systems with highperformance, low-energy requirements.
• ARM Cortex-M0+ at 24 MHz
• Ultra low power operation
• 0.5 μA current in Stop (EM3), with
brown-out detection and RAM retention
• 48 μA/MHz in EM1
• 114 μA/MHz in Run mode (EM0)
• Fast wake-up time of 2 µs
EFM32ZG applications include the following:
• Energy, gas, water and smart metering
• Health and fitness applications
• Smart accessories
KEY FEATURES
• Alarm and security systems
• Industrial and home automation
Core / Memory
Clock Management
ARM CortexTM M0+ processor
High Frequency
Crystal Oscillator
High Frequency
RC Oscillator
Flash Program
Memory
RAM Memory
Auxiliary High
Freq. RC Osc.
Low Freq.
RC Oscillator
Debug Interface
DMA Controller
Low Frequency
Crystal Oscillator
Ultra Low Freq.
RC Oscillator
• Hardware cryptography (AES)
• Up to 32 kB of Flash and 4 kB of RAM
Energy Management
Voltage
Regulator
Voltage
Comparator
Brown-out
Detector
Power-on
Reset
Security
Hardware AES
32-bit bus
Peripheral Reflex System
Serial Interfaces
USART
I2C
Low Energy
UARTTM
I/O Ports
Timers and Triggers
Analog Interfaces
External
Interrupts
General
Purpose I/O
Timer/Counter
Real Time Counter
ADC
Pin Reset
Pin Wakeup
Pulse Counter
Watchdog Timer
Current DAC
Analog
Comparator
Lowest power mode with peripheral operational:
EM0 - Active
EM1 - Sleep
silabs.com | Building a more connected world.
EM2 – Deep Sleep
EM3 - Stop
EM4 - Shutoff
Rev. 2.10
EFM32ZG Data Sheet
Feature List
1. Feature List
• ARM Cortex-M0+ CPU platform
• High Performance 32-bit processor @ up to 24 MHz
• Wake-up Interrupt Controller
• SysTick System Timer
• Flexible Energy Management System
• 20 nA @ 3 V Shutoff Mode
• 0.5 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector, RAM and CPU retention
• 0.9 µA @ 3 V Deep Sleep Mode, including RTC with 32.768 kHz oscillator, Power-on Reset, Brown-out Detector, RAM and CPU
retention
• 48 µA/MHz @ 3 V Sleep Mode
• 114 µA/MHz @ 3 V Run Mode, with code executed from flash
• 32/16/8/4 kB Flash
• 4/2 kB RAM
• Up to 37 General Purpose I/O pins
• Configurable push-pull, open-drain, pull-up/down, input filter, drive strength
• Configurable peripheral I/O locations
• Up to 16 asynchronous external interrupts
• Output state retention and wake-up from Shutoff Mode
• 4 Channel DMA Controller
• 4 Channel Peripheral Reflex System (PRS) for autonomous inter-peripheral signaling
• Hardware AES with 128-bit keys in 54 cycles
• Timers/Counters
• 2× 16-bit Timer/Counter
• 2×3 Compare/Capture/PWM channels
• 1× 24-bit Real-Time Counter
• 1× 16-bit Pulse Counter
• Watchdog Timer with dedicated RC oscillator @ 50 nA
• Communication interfaces
• Universal Synchronous/Asynchronous Receiver/Transmitter
• UART/SPI/SmartCard (ISO 7816)/IrDA/I2S
• Triple buffered full/half-duplex operation
• Low Energy UART
• Autonomous operation with DMA in Deep Sleep Mode
• I2C Interface with SMBus support
• Address recognition in Stop Mode
• Ultra low power precision analog peripherals
• 12-bit 1 Msamples/s Analog-to-Digital Converter
• 4 single-ended channels/2 differential channels
• On-chip temperature sensor
• Current Digital-to-Analog Converter
• Selectable current range between 0.05 and 64 µA
• 1× Analog Comparator
• Capacitive sensing with up to 5 inputs
• Supply Voltage Comparator
• Ultra efficient Power-on Reset and Brown-Out Detector
• 2-pin Serial Wire Debug interface
• Pre-Programmed UART Bootloader
• Temperature range -40 to 85 ºC
• Single power supply 1.98 to 3.8 V
silabs.com | Building a more connected world.
Rev. 2.10 | 2
EFM32ZG Data Sheet
Feature List
• Packages:
• QFN24 (5×5 mm)
• QFN32 (6×6 mm)
• TQFP48 (7×7 mm)
silabs.com | Building a more connected world.
Rev. 2.10 | 3
EFM32ZG Data Sheet
Ordering Information
2. Ordering Information
The following table shows the available EFM32ZG devices.
Table 2.1. Ordering Information
Flash (kB)
RAM (kB)
Max Speed
(MHz)
Supply
Voltage (V)
Temperature
(ºC)
Package
EFM32ZG108F4-B-QFN24
4
2
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG108F8-B-QFN24
8
2
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG108F16-B-QFN24
16
4
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG108F32-B-QFN24
32
4
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG110F4-B-QFN24
4
2
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG110F8-B-QFN24
8
2
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG110F16-B-QFN24
16
4
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG110F32-B-QFN24
32
4
24
1.98 - 3.8
-40 - 85
QFN24
EFM32ZG210F4-B-QFN32
4
2
24
1.98 - 3.8
-40 - 85
QFN32
EFM32ZG210F8-B-QFN32
8
2
24
1.98 - 3.8
-40 - 85
QFN32
EFM32ZG210F16-B-QFN32
16
4
24
1.98 - 3.8
-40 - 85
QFN32
EFM32ZG210F32-B-QFN32
32
4
24
1.98 - 3.8
-40 - 85
QFN32
EFM32ZG222F4-B-QFP48
4
2
24
1.98 - 3.8
-40 - 85
TQFP48
EFM32ZG222F8-B-QFP48
8
2
24
1.98 - 3.8
-40 - 85
TQFP48
EFM32ZG222F16-B-QFP48
16
4
24
1.98 - 3.8
-40 - 85
TQFP48
EFM32ZG222F32-B-QFP48
32
4
24
1.98 - 3.8
-40 - 85
TQFP48
Ordering Code
EFM32 ZG 222 F
32 – B – QFP
48
T
Tray (Optional)
Pin Count
Package
Revision
Memory Size in kB
Memory Type (Flash)
Feature Set Code
Zero Gecko
Energy Friendly Microcontroller 32-bit
Figure 2.1. Ordering Code Decoder
Adding the suffix 'T' to the part number (e.g. EFM32ZG222F32-B-QFP48T) denotes tray.
Visit http://www.silabs.com for information on global distributors and representatives.
silabs.com | Building a more connected world.
Rev. 2.10 | 4
Table of Contents
1. Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3. System Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 System Introduction . . . . . . . . . . . . . . . . . . .
3.1.1 ARM Cortex-M0+ Core . . . . . . . . . . . . . . . . .
3.1.2 Debug Interface (DBG) . . . . . . . . . . . . . . . . .
3.1.3 Memory System Controller (MSC) . . . . . . . . . . . . .
3.1.4 Direct Memory Access Controller (DMA) . . . . . . . . . . .
3.1.5 Reset Management Unit (RMU) . . . . . . . . . . . . . .
3.1.6 Energy Management Unit (EMU) . . . . . . . . . . . . .
3.1.7 Clock Management Unit (CMU) . . . . . . . . . . . . . .
3.1.8 Watchdog (WDOG) . . . . . . . . . . . . . . . . . .
3.1.9 Peripheral Reflex System (PRS) . . . . . . . . . . . . .
3.1.10 Inter-Integrated Circuit Interface (I2C) . . . . . . . . . . .
3.1.11 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
3.1.12 Pre-Programmed UART Bootloader . . . . . . . . . . . .
3.1.13 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
3.1.14 Timer/Counter (TIMER) . . . . . . . . . . . . . . . .
3.1.15 Real Time Counter (RTC) . . . . . . . . . . . . . . .
3.1.16 Pulse Counter (PCNT) . . . . . . . . . . . . . . . .
3.1.17 Analog Comparator (ACMP) . . . . . . . . . . . . . .
3.1.18 Voltage Comparator (VCMP) . . . . . . . . . . . . . .
3.1.19 Analog to Digital Converter (ADC) . . . . . . . . . . . .
3.1.20 Current Digital to Analog Converter (IDAC) . . . . . . . . .
3.1.21 Advanced Encryption Standard Accelerator (AES) . . . . . . .
3.1.22 General Purpose Input/Output (GPIO) . . . . . . . . . . .
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. 8
. 8
. 8
. 8
. 8
. 9
. 9
. 9
. 9
. 9
. 9
. 9
. 9
. 9
. 9
.10
.10
.10
.10
.10
.10
.10
.10
3.2 Configuration Summary
3.2.1 EFM32ZG108 . .
3.2.2 EFM32ZG110 . .
3.2.3 EFM32ZG210 . .
3.2.4 EFM32ZG222 . .
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.11
.11
.12
.13
.14
3.3 Memory Map
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.15
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4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 Test Conditions . . . . . . . .
4.1.1 Typical Values . . . . . .
4.1.2 Minimum and Maximum Values .
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.17
.17
.17
4.2 Absolute Maximum Ratings.
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.17
4.3 General Operating Conditions .
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.17
4.4 Current Consumption . . . .
4.4.1 EM0 Current Consumption
4.4.2 EM1 Current Consumption
4.4.3 EM2 Current Consumption
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.18
.20
.23
.25
silabs.com | Building a more connected world.
Rev. 2.10 | 5
4.4.4 EM3 Current Consumption
4.4.5 EM4 Current Consumption
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.26
.26
4.5 Transition between Energy Modes .
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.27
4.6 Power Management .
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.27
4.7 Flash .
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.28
4.8 General Purpose Input Output .
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.29
4.9 Oscillators . .
4.9.1 LFXO. . .
4.9.2 HFXO . .
4.9.3 LFRCO . .
4.9.4 HFRCO . .
4.9.5 AUXHFRCO
4.9.6 ULFRCO .
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.37
.37
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.38
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.42
.42
4.10 Analog Digital Converter (ADC) .
4.10.1 Typical Performance . . .
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.43
.49
4.11 Current Digital Analog Converter (IDAC) .
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.54
4.12 Analog Comparator (ACMP) .
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.60
4.13 Voltage Comparator (VCMP) .
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.62
4.14 I2C
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.63
4.15 Digital Peripherals .
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.64
5. Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
5.1 EFM32ZG108 (QFN24) . . . .
5.1.1 Pinout . . . . . . . .
5.1.2 Alternate Functionality Pinout
5.1.3 GPIO Pinout Overview . . .
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.65
.65
.68
.69
5.2 EFM32ZG110 (QFN24) . . . .
5.2.1 Pinout . . . . . . . .
5.2.2 Alternate Functionality Pinout
5.2.3 GPIO Pinout Overview . . .
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.70
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.72
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5.3 EFM32ZG210 (QFN32) . . . .
5.3.1 Pinout . . . . . . . .
5.3.2 Alternate Functionality Pinout
5.3.3 GPIO Pinout Overview . . .
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.74
.74
.77
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5.4 EFM32ZG222 (TQFP48) . . .
5.4.1 Pinout . . . . . . . .
5.4.2 Alternate Functionality Pinout
5.4.3 GPIO Pinout Overview . . .
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6. QFN24 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . .
86
6.1 QFN24 Package Dimensions .
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6.2 QFN24 PCB Layout .
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6.3 QFN24 Package Marking
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.89
silabs.com | Building a more connected world.
Rev. 2.10 | 6
7. QFN32 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . .
90
7.1 QFN32 Package Dimensions .
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7.2 QFN32 PCB Layout .
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7.3 QFN32 Package Marking
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8. TQFP48 Package Specifications
. . . . . . . . . . . . . . . . . . . . . . . 94
8.1 TQFP48 Package Dimensions.
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9. Chip Revision, Solder Information, Errata. . . . . . . . . . . . . . . . . . . .
99
9.1 Chip Revision .
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10. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
silabs.com | Building a more connected world.
Rev. 2.10 | 7
EFM32ZG Data Sheet
System Summary
3. System Summary
3.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of the powerful 32-bit ARM CortexM0+, innovative low energy techniques, short wake-up time from energy saving modes, and a wide selection of peripherals, the
EFM32ZG microcontroller is well suited for any battery operated application as well as other systems requiring high performance and
low-energy consumption. This section gives a short introduction to each of the modules in general terms and also shows a summary of
the configuration for the EFM32ZG devices. For a complete feature set and in-depth information on the modules, the reader is referred
to the EFM32ZG Reference Manual.
A block diagram of the EFM32ZG is shown in the following figure.
Core / Memory
Clock Management
ARM CortexTM M0+ processor
High Frequency
Crystal Oscillator
High Frequency
RC Oscillator
Flash Program
Memory
RAM Memory
Auxiliary High
Freq. RC Osc.
Low Freq.
RC Oscillator
Debug Interface
DMA Controller
Low Frequency
Crystal Oscillator
Ultra Low Freq.
RC Oscillator
Energy Management
Voltage
Regulator
Voltage
Comparator
Brown-out
Detector
Power-on
Reset
Security
Hardware AES
32-bit bus
Peripheral Reflex System
Serial Interfaces
USART
Low Energy
UARTTM
I2C
I/O Ports
Timers and Triggers
Analog Interfaces
External
Interrupts
General
Purpose I/O
Timer/Counter
Real Time Counter
ADC
Pin Reset
Pin Wakeup
Pulse Counter
Watchdog Timer
Current DAC
Analog
Comparator
Lowest power mode with peripheral operational:
EM0 - Active
EM1 - Sleep
EM2 – Deep Sleep
EM3 - Stop
EM4 - Shutoff
Figure 3.1. Block Diagram
3.1.1 ARM Cortex-M0+ Core
The ARM Cortex-M0+ includes a 32-bit RISC processor which can achieve as much as 0.9 Dhrystone MIPS/MHz. A wake-up Interrupt
Controller handling interrupts triggered while the CPU is asleep is included as well. The EFM32 implementation of the Cortex-M0+ is
described in detail in ARM Cortex-M0+ Devices Generic User Guide.
3.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface.
3.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32ZG microcontroller. The flash memory is readable and
writable from both the Cortex-M0+ and DMA. The flash memory is divided into two blocks; the main block and the information block.
Program code is normally written to the main block. Additionally, the information block is available for special user data and flash lock
bits. There is also a read-only page in the information block containing system and device calibration data. Read and write operations
are supported in the energy modes EM0 and EM1.
3.1.4 Direct Memory Access Controller (DMA)
The Direct Memory Access (DMA) controller performs memory operations independently of the CPU. This has the benefit of reducing
the energy consumption and the workload of the CPU, and enables the system to stay in low energy modes when moving for instance
data from the USART to RAM or from the External Bus Interface to a PWM-generating timer. The DMA controller uses the PL230
µDMA controller licensed from ARM.
silabs.com | Building a more connected world.
Rev. 2.10 | 8
EFM32ZG Data Sheet
System Summary
3.1.5 Reset Management Unit (RMU)
The RMU is responsible for handling the reset functionality of the EFM32ZG.
3.1.6 Energy Management Unit (EMU)
The Energy Management Unit (EMU) manage all the low energy modes (EM) in EFM32ZG microcontrollers. Each energy mode manages if the CPU and the various peripherals are available. The EMU can also be used to turn off the power to unused SRAM blocks.
3.1.7 Clock Management Unit (CMU)
The Clock Management Unit (CMU) is responsible for controlling the oscillators and clocks on-board the EFM32ZG. The CMU provides
the capability to turn on and off the clock on an individual basis to all peripheral modules in addition to enable/disable and configure the
available oscillators. The high degree of flexibility enables software to minimize energy consumption in any specific application by not
wasting power on peripherals and oscillators that are inactive.
3.1.8 Watchdog (WDOG)
The purpose of the watchdog timer is to generate a reset in case of a system failure, to increase application reliability. The failure may
e.g. be caused by an external event, such as an ESD pulse, or by a software failure.
3.1.9 Peripheral Reflex System (PRS)
The Peripheral Reflex System (PRS) system is a network which lets the different peripheral module communicate directly with each
other without involving the CPU. Peripheral modules which send out Reflex signals are called producers. The PRS routes these reflex
signals to consumer peripherals which apply actions depending on the data received. The format for the Reflex signals is not given, but
edge triggers and other functionality can be applied by the PRS.
3.1.10 Inter-Integrated Circuit Interface (I2C)
The I2C module provides an interface between the MCU and a serial I2C-bus. It is capable of acting as both a master and a slave, and
supports multi-master buses. Both standard-mode, fast-mode and fastmode plus speeds are supported, allowing transmission rates all
the way from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also provided to allow implementation of an SMBus compliant
system. The interface provided to software by the I2C module, allows both fine-grained control of the transmission process and close to
automatic transfers. Automatic recognition of slave addresses is provided in all energy modes.
3.1.11 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
The Universal Synchronous Asynchronous serial Receiver and Transmitter (USART) is a very flexible serial I/O module. It supports full
duplex asynchronous UART communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with ISO7816 SmartCards, IrDA and I2S devices.
3.1.12 Pre-Programmed UART Bootloader
The bootloader presented in application note AN0003 is pre-programmed in the device at factory. Autobaud and destructive write are
supported. The autobaud feature, interface and commands are described further in the application note.
3.1.13 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)
The unique LEUARTTM, the Low Energy UART, is a UART that allows two-way UART communication on a strict power budget. Only a
32.768 kHz clock is needed to allow UART communication up to 9600 baud/ s. The LEUART includes all necessary hardware support
to make asynchronous serial communication possible with minimum of software intervention and energy consumption.
3.1.14 Timer/Counter (TIMER)
The 16-bit general purpose Timer has 3 compare/capture channels for input capture and compare/Pulse- Width Modulation (PWM) output.
silabs.com | Building a more connected world.
Rev. 2.10 | 9
EFM32ZG Data Sheet
System Summary
3.1.15 Real Time Counter (RTC)
The Real Time Counter (RTC) contains a 24-bit counter and is clocked either by a 32.768 kHz crystal oscillator, or a 32.768 kHz RC
oscillator. In addition to energy modes EM0 and EM1, the RTC is also available in EM2. This makes it ideal for keeping track of time
since the RTC is enabled in EM2 where most of the device is powered down.
3.1.16 Pulse Counter (PCNT)
The Pulse Counter (PCNT) can be used for counting pulses on a single input or to decode quadrature encoded inputs. It runs off either
the internal LFACLK or the PCNTn_S0IN pin as external clock source. The module may operate in energy mode EM0 - EM3.
3.1.17 Analog Comparator (ACMP)
The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is higher. Inputs can either be one of the selectable internal references or from external pins. Response time and thereby also the current
consumption can be configured by altering the current supply to the comparator.
3.1.18 Voltage Comparator (VCMP)
The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can be generated when the supply
falls below or rises above a programmable threshold. Response time and thereby also the current consumption can be configured by
altering the current supply to the comparator.
3.1.19 Analog to Digital Converter (ADC)
The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to one million samples per
second. The integrated input mux can select inputs from 4 external pins and 6 internal signals.
3.1.20 Current Digital to Analog Converter (IDAC)
The current digital to analog converter can source or sink a configurable constant current, which can be output on, or sinked from pin or
ADC. The current is configurable with several ranges of various step sizes.
3.1.21 Advanced Encryption Standard Accelerator (AES)
The AES accelerator performs AES encryption and decryption with 128-bit. Encrypting or decrypting one 128-bit data block takes 52
HFCORECLK cycles with 128-bit keys. The AES module is an AHB slave which enables efficient access to the data and key registers.
All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit operations are not supported.
3.1.22 General Purpose Input/Output (GPIO)
In the EFM32ZG, there are up to 37 General Purpose Input/Output (GPIO) pins, which are divided into ports with up to 16 pins each.
These pins can individually be configured as either an output or input. More advanced configurations like open-drain, filtering and drive
strength can also be configured individually for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM outputs or USART communication, which can be routed to several locations on the device. The GPIO supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the device. Also, the input value of a pin can be routed
through the Peripheral Reflex System to other peripherals.
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Rev. 2.10 | 10
EFM32ZG Data Sheet
System Summary
3.2 Configuration Summary
3.2.1 EFM32ZG108
The features of the EFM32ZG108 is a subset of the feature set described in the EFM32ZG Reference Manual. The following table describes device specific implementation of the features.
Table 3.1. EFM32ZG108 Configuration Summary
Module
Configuration
Pin Connections
Cortex-M0+
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
EMU
Full configuration
NA
CMU
Full configuration
CMU_OUT0, CMU_OUT1
WDOG
Full configuration
NA
PRS
Full configuration
NA
I2C0
Full configuration
I2C0_SDA, I2C0_SCL
USART1
Full configuration with I2S and IrDA
US1_TX, US1_RX, US1_CLK, US1_CS
LEUART0
Full configuration
LEU0_TX, LEU0_RX
TIMER0
Full configuration
TIM0_CC[2:0]
TIMER1
Full configuration
TIM1_CC[2:0]
RTC
Full configuration
NA
PCNT0
Full configuration, 16-bit count register
PCNT0_S[1:0]
ACMP0
Full configuration
ACMP0_CH[1:0], ACMP0_O
VCMP
Full configuration
NA
GPIO
17 pins
Available pins are shown in 5.1.3 GPIO Pinout Overview
silabs.com | Building a more connected world.
Rev. 2.10 | 11
EFM32ZG Data Sheet
System Summary
3.2.2 EFM32ZG110
The features of the EFM32ZG110 is a subset of the feature set described in the EFM32ZG Reference Manual. The following table describes device specific implementation of the features.
Table 3.2. EFM32ZG110 Configuration Summary
Module
Configuration
Pin Connections
Cortex-M0+
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
EMU
Full configuration
NA
CMU
Full configuration
CMU_OUT0, CMU_OUT1
WDOG
Full configuration
NA
PRS
Full configuration
NA
I2C0
Full configuration
I2C0_SDA, I2C0_SCL
USART1
Full configuration with I2S and IrDA
US1_TX, US1_RX, US1_CLK, US1_CS
LEUART0
Full configuration
LEU0_TX, LEU0_RX
TIMER0
Full configuration
TIM0_CC[2:0]
TIMER1
Full configuration
TIM1_CC[2:0]
RTC
Full configuration
NA
PCNT0
Full configuration, 16-bit count register
PCNT0_S[1:0]
ACMP0
Full configuration
ACMP0_CH[1:0], ACMP0_O
VCMP
Full configuration
NA
ADC0
Full configuration
ADC0_CH[1:0]
IDAC0
Full configuration
IDAC0_OUT
AES
Full configuration
NA
GPIO
17 pins
Available pins are shown in 5.2.3 GPIO Pinout Overview
silabs.com | Building a more connected world.
Rev. 2.10 | 12
EFM32ZG Data Sheet
System Summary
3.2.3 EFM32ZG210
The features of the EFM32ZG210 is a subset of the feature set described in the EFM32ZG Reference Manual. The following table describes device specific implementation of the features.
Table 3.3. EFM32ZG210 Configuration Summary
Module
Configuration
Pin Connections
Cortex-M0+
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
EMU
Full configuration
NA
CMU
Full configuration
CMU_OUT0, CMU_OUT1
WDOG
Full configuration
NA
PRS
Full configuration
NA
I2C0
Full configuration
I2C0_SDA, I2C0_SCL
USART1
Full configuration with I2S and IrDA
US1_TX, US1_RX, US1_CLK, US1_CS
LEUART0
Full configuration
LEU0_TX, LEU0_RX
TIMER0
Full configuration
TIM0_CC[2:0]
TIMER1
Full configuration
TIM1_CC[2:0]
RTC
Full configuration
NA
PCNT0
Full configuration, 16-bit count register
PCNT0_S[1:0]
ACMP0
Full configuration
ACMP0_CH[1:0], ACMP0_O
VCMP
Full configuration
NA
ADC0
Full configuration
ADC0_CH[3:0]
IDAC0
Full configuration
IDAC0_OUT
AES
Full configuration
NA
GPIO
24 pins
Available pins are shown in 5.3.3 GPIO Pinout Overview
silabs.com | Building a more connected world.
Rev. 2.10 | 13
EFM32ZG Data Sheet
System Summary
3.2.4 EFM32ZG222
The features of the EFM32ZG222 is a subset of the feature set described in the EFM32ZG Reference Manual. The following table describes device specific implementation of the features.
Table 3.4. EFM32ZG222 Configuration Summary
Module
Configuration
Pin Connections
Cortex-M0+
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
EMU
Full configuration
NA
CMU
Full configuration
CMU_OUT0, CMU_OUT1
WDOG
Full configuration
NA
PRS
Full configuration
NA
I2C0
Full configuration
I2C0_SDA, I2C0_SCL
USART1
Full configuration with I2S and IrDA
US1_TX, US1_RX, US1_CLK, US1_CS
LEUART0
Full configuration
LEU0_TX, LEU0_RX
TIMER0
Full configuration
TIM0_CC[2:0]
TIMER1
Full configuration
TIM1_CC[2:0]
RTC
Full configuration
NA
PCNT0
Full configuration, 16-bit count register
PCNT0_S[1:0]
ACMP0
Full configuration
ACMP0_CH[4:0], ACMP0_O
VCMP
Full configuration
NA
ADC0
Full configuration
ADC0_CH[3:0]
IDAC0
Full configuration
IDAC0_OUT
AES
Full configuration
NA
GPIO
37 pins
Available pins are shown in 5.4.3 GPIO Pinout Overview
silabs.com | Building a more connected world.
Rev. 2.10 | 14
EFM32ZG Data Sheet
System Summary
3.3 Memory Map
The EFM32ZG memory map is shown in the following figure, with RAM and Flash sizes for the largest memory configuration.
Figure 3.2. System Address Space with Core and Code Space Listing
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Rev. 2.10 | 15
EFM32ZG Data Sheet
System Summary
Figure 3.3. System Address Space with Peripheral Listing
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Rev. 2.10 | 16
EFM32ZG Data Sheet
Electrical Characteristics
4. Electrical Characteristics
4.1 Test Conditions
4.1.1 Typical Values
The typical data are based on TAMB=25°C and VDD=3.0 V, as defined in 4.3 General Operating Conditions, unless otherwise specified.
4.1.2 Minimum and Maximum Values
The minimum and maximum values represent the worst conditions of ambient temperature, supply voltage and frequencies, as defined
in 4.3 General Operating Conditions, unless otherwise specified.
4.2 Absolute Maximum Ratings
Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of
the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/default.aspx.
Table 4.1. Absolute Maximum Ratings
Parameter
Symbol
Storage temperature range
TSTG
Maximum soldering temperature
TS
External main supply voltage
VDDMAX
Voltage on any I/O pin
VIOPIN
Current per I/O pin (sink)
Current per I/O pin (source)
Test Condition
Min
Typ
Max
Unit
-40
—
150
°C
—
—
260
°C
0
—
3.8
V
-0.3
—
VDD+0.3
V
IIOMAX_SINK
—
—
100
mA
IIOMAX_SOURCE
—
—
-100
mA
Latest IPC/JEDEC JSTD-020 Standard
4.3 General Operating Conditions
Table 4.2. General Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Ambient temperature range
TAMB
-40
—
85
°C
Operating supply voltage
VDDOP
1.98
—
3.8
V
Internal APB clock frequency
fAPB
—
—
24
MHz
Internal AHB clock frequency
fAHB
—
—
24
MHz
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Rev. 2.10 | 17
EFM32ZG Data Sheet
Electrical Characteristics
4.4 Current Consumption
Table 4.3. Current Consumption
Parameter
Symbol
Test Condition
EM0 current. No prescaling.
Running prime number calculation code from Flash. (Production test condition = 14 MHz)
IEM0
silabs.com | Building a more connected world.
Min
Typ
Max
Unit
24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
115
132
µA/MHz
24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
117
136
µA/MHz
21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
114
128
µA/MHz
21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
116
132
µA/MHz
14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
117
131
µA/MHz
14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
118
133
µA/MHz
11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
118
133
µA/MHz
11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
120
135
µA/MHz
6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
124
139
µA/MHz
6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
125
142
µA/MHz
1.2 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
155
177
µA/MHz
1.2 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
162
181
µA/MHz
Rev. 2.10 | 18
EFM32ZG Data Sheet
Electrical Characteristics
Parameter
Symbol
Test Condition
EM1 current (Production test
condition = 14 MHz)
IEM1
EM2 current
EM3 current
EM4 current
IEM2
IEM3
IEM4
silabs.com | Building a more connected world.
Min
Typ
Max
Unit
24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
48
57
µA/MHz
24 MHz HFXO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
49
59
µA/MHz
21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
48
52
µA/MHz
21 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
49
53
µA/MHz
14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
50
54
µA/MHz
14 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
51
56
µA/MHz
11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
52
56
µA/MHz
11 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
53
58
µA/MHz
6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
57
63
µA/MHz
6.6 MHz HFRCO, all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
59
66
µA/MHz
1.2 MHz HFRCO. all peripheral clocks disabled, VDD= 3.0 V, TAMB=25°C
—
89
99
µA/MHz
1.2 MHz HFRCO. all peripheral clocks disabled, VDD= 3.0 V, TAMB=85°C
—
92
103
µA/MHz
EM2 current with RTC prescaled to 1 Hz,
32.768 kHz LFRCO, VDD= 3.0 V,
TAMB=25°C
—
0.9
1.25
µA
EM2 current with RTC prescaled to 1 Hz,
32.768 kHz LFRCO, VDD= 3.0 V,
TAMB=85°C
—
1.7
2.35
µA
EM3 current (ULFRCO enabled, LFRCO/
LFXO disabled), VDD= 3.0 V, TAMB=25°C
—
0.5
0.9
µA
EM3 current (ULFRCO enabled, LFRCO/
LFXO disabled), VDD= 3.0 V, TAMB=85°C
—
1.3
2.0
µA
VDD= 3.0 V, TAMB=25°C
—
0.02
0.035
µA
VDD= 3.0 V, TAMB=85°C
—
0.29
0.700
µA
Rev. 2.10 | 19
EFM32ZG Data Sheet
Electrical Characteristics
4.4.1 EM0 Current Consumption
2.84
2.80
Idd [mA]
2.78
2.82
2.80
2.78
Idd [mA]
2.82
2.84
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
2.76
2.76
2.74
2.74
2.72
2.72
2.70
2.70
2.68
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
2.68
–40
3.8
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
–15
5
25
Temperature [°C]
45
65
85
Figure 4.1. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with HFRCO Running at
24 MHz
2.45
2.40
2.40
Idd [mA]
Idd [mA]
2.45
2.35
2.35
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
2.30
2.0
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
2.30
3.8
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.2. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with HFRCO Running at
21 MHz
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EFM32ZG Data Sheet
1.68
1.68
1.66
1.66
1.64
1.64
1.62
1.62
Idd [mA]
Idd [mA]
Electrical Characteristics
1.60
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
1.58
1.56
1.54
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
1.60
1.58
1.56
1.54
–40
3.8
–15
5
25
Temperature [°C]
45
65
85
1.34
1.34
1.32
1.32
1.30
1.30
Idd [mA]
Idd [mA]
Figure 4.3. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with HFRCO Running at
14 MHz
1.28
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
1.26
1.24
1.22
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
1.28
1.26
1.24
3.8
1.22
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.4. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with HFRCO Running at
11 MHz
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EFM32ZG Data Sheet
0.84
0.84
0.83
0.83
0.82
0.82
0.81
0.81
Idd [mA]
Idd [mA]
Electrical Characteristics
0.80
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.79
0.78
0.77
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.80
0.79
0.78
3.8
0.77
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.5. EM0 Current Consumption while Executing Prime Number Calculation Code from Flash with HFRCO Running at
6.6 MHz
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Rev. 2.10 | 22
EFM32ZG Data Sheet
Electrical Characteristics
4.4.2 EM1 Current Consumption
1.20
1.18
1.20
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
1.18
Idd [mA]
1.16
Idd [mA]
1.16
1.14
1.14
1.12
1.12
1.10
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
1.10
–40
3.8
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
–15
5
25
Temperature [°C]
45
65
85
1.04
1.04
1.03
1.03
1.02
1.02
1.01
1.01
1.00
1.00
Idd [mA]
Idd [mA]
Figure 4.6. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 24 MHz
0.99
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.98
0.97
0.96
0.95
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.99
0.98
0.97
0.96
3.8
0.95
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.7. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 21 MHz
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Rev. 2.10 | 23
EFM32ZG Data Sheet
0.73
0.73
0.72
0.72
0.71
0.71
0.70
0.70
Idd [mA]
Idd [mA]
Electrical Characteristics
0.69
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.68
0.67
0.66
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.69
0.68
0.67
0.66
–40
3.8
–15
5
25
Temperature [°C]
45
65
85
0.59
0.59
0.58
0.58
0.57
0.57
Idd [mA]
Idd [mA]
Figure 4.8. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 14 MHz
0.56
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.55
0.54
0.53
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.56
0.55
0.54
3.8
0.53
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.9. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 11 MHz
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EFM32ZG Data Sheet
0.395
0.395
0.390
0.390
0.385
0.385
0.380
0.380
0.375
0.375
Idd [mA]
Idd [mA]
Electrical Characteristics
0.370
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.365
0.360
0.355
0.350
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.370
0.365
0.360
0.355
3.8
0.350
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.10. EM1 Current Consumption with all Peripheral Clocks Disabled and HFRCO Running at 6.6 MHz
4.4.3 EM2 Current Consumption
2.0
2.0
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
1.8
1.6
1.4
Idd [uA]
Idd [uA]
1.6
1.8
1.2
1.4
1.2
1.0
1.0
0.8
0.8
0.6
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
3.8
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
0.6
–40
–15
5
25
Temperature [°C]
45
65
85
Figure 4.11. EM2 Current Consumption, RTC prescaled to 1 kHz, 32.768 kHz LFRCO
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EFM32ZG Data Sheet
Electrical Characteristics
4.4.4 EM3 Current Consumption
1.6
1.6
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
1.4
1.2
Idd [uA]
Idd [uA]
1.2
1.4
1.0
1.0
0.8
0.8
0.6
0.6
0.4
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
0.4
–40
3.8
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
–15
5
25
Temperature [°C]
45
65
85
5
25
Temperature [°C]
45
65
85
Figure 4.12. EM3 Current Consumption
4.4.5 EM4 Current Consumption
0.5
Idd [uA]
0.3
0.4
0.3
Idd [uA]
0.4
0.5
-40.0°C
-15.0°C
5.0°C
25.0°C
45.0°C
65.0°C
85.0°C
0.2
0.2
0.1
0.1
0.0
0.0
–0.1
2.0
2.2
2.4
2.6
2.8
3.0
Vdd [V]
3.2
3.4
3.6
3.8
–0.1
–40
Vdd=2.0V
Vdd=2.2V
Vdd=2.4V
Vdd=2.6V
Vdd=2.8V
Vdd=3.0V
Vdd=3.2V
Vdd=3.4V
Vdd=3.6V
Vdd=3.8V
–15
Figure 4.13. EM4 Current Consumption
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EFM32ZG Data Sheet
Electrical Characteristics
4.5 Transition between Energy Modes
The transition times are measured from the trigger to the first clock edge in the CPU.
Table 4.4. Energy Modes Transitions
Parameter
Symbol
Min
Typ
Max
Unit
Transition time from EM1 to EM0
tEM10
—
0
—
HFCORECLK cycles
Transition time from EM2 to EM0
tEM20
—
2
—
µs
Transition time from EM3 to EM0
tEM30
—
2
—
µs
Transition time from EM4 to EM0
tEM40
—
163
—
µs
4.6 Power Management
The EFM32ZG requires the AVDD_x, VDD_DREG and IOVDD_x pins to be connected together (with optional filter) at the PCB level.
For practical schematic recommendations, please see the application note, AN0002 EFM32 Hardware Design Considerations.
Table 4.5. Power Management
Parameter
Symbol
BOD threshold on falling external supply voltage
BOD threshold on rising external supply voltage
Test Condition
Min
Typ
Max
Unit
VBODextthr-
1.74
—
1.96
V
VBODextthr+
—
1.85
—
V
Delay from reset is released un- tRESET
til program execution starts
Applies to Power-on Reset, Brownout Reset and pin reset.
—
163
—
µs
Voltage regulator decoupling
capacitor.
X5R capacitor recommended. Apply
between DECOUPLE pin and
GROUND
—
1
—
µF
CDECOUPLE
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EFM32ZG Data Sheet
Electrical Characteristics
4.7 Flash
Table 4.6. Flash
Parameter
Symbol
Flash erase cycles before failure
ECFLASH
Flash word write cycles between erase
WWCFLASH
Flash data retention
RETFLASH
Test Condition
Min
Typ
Max
Unit
20000
—
—
cycles
—
—
21
cycles
TAMB