EFM8SB20F32G-A-QFN32R

EFM8 Sleepy Bee Family EFM8SB2 Data Sheet The EFM8SB2, part of the Sleepy Bee family of MCUs, is the world’s most energy friendly 8-bit microcontrollers with a comprehensive feature set in small packages. ENERGY FRIENDLY FEATURES • Lowest MCU sleep current with supply brownout detection (50 nA) These devices offer lowest power consumption by combining innovative low energy techniques and short wakeup times from energy saving modes into small packages, making them well-suited for any battery operated applications. With an efficient 8051 core, 6-bit current reference, and precision analog, the EFM8SB2 family is also optimal for embedded applications. • Lowest MCU active current with these features (170 μA / MHz at 24.5 MHz clock rate) EFM8SB2 applications include the following: • Ultra-fast wake up for digital and analog peripherals (< 2 μs) • Battery-operated consumer electronics • Sensor interfaces • Hand-held devices • Industrial controls Core / Memory RAM Memory (4352 bytes) (up to 64 KB) • Integrated low drop out (LDO) voltage regulator to maintain ultra-low active current at all voltages Clock Management CIP-51 8051 Core (25 MHz) Flash Program Memory • Lowest MCU sleep current using internal RTC operating and supply brownout detection ( 14 MHz — 120 — µA/MHz VDD = 1.8–3.6 V, fSYSCLK = 24.5 MHz — 2.5 3.0 mA VDD = 1.8–3.6 V, fSYSCLK = 20 MHz — 1.8 — mA VDD = 1.8–3.6 V, fSYSCLK = 32.768 kHz — 84 — µA Idle Mode Supply Current Frequen- IDDFREQ cy Sensitivity1 ,6 VDD = 1.8–3.6 V, T = 25 °C — 95 — µA/MHz Suspend Mode Supply Current IDD VDD = 1.8–3.6 V — 77 — µA Sleep Mode Supply Current with RTC running from 32.768 kHz crystal IDD 1.8 V, T = 25 °C — 0.60 — µA 3.6 V, T = 25 °C — 0.85 — µA 1.8 V, T = 85 °C — 1.30 — µA 3.6 V, T = 85 °C — 1.90 — µA Digital Supply Current Normal Mode supply current - Full speed with code executing from flash 3 , 4 , 5 Normal Mode supply current frequency sensitivity1, 3, 5 Idle Mode supply current - Core halted with peripherals running4 , 6 IDDFREQ IDD silabs.com | Smart. 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Rev. 1.1 | 11 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Conditions Min Typ Max Units Sleep Mode Supply Current (RTC off) IDD 1.8 V, T = 25 °C — 0.05 — µA 3.6 V, T = 25 °C — 0.12 — µA 1.8 V, T = 85 °C — 0.75 — µA 3.6 V, T = 85 °C — 1.20 — µA — 7 — µA VDD Monitor Supply Current IVMON Oscillator Supply Current IHFOSC0 25 °C — 300 — µA ADC0 Always-on Power Supply Current7 IADC 300 ksps — 800 — µA — 680 — µA CPMD = 11 — 0.4 — µA CPMD = 10 — 2.6 — µA CPMD = 01 — 8.8 — µA CPMD = 00 — 23 — µA VDD = 3.0 V Tracking VDD = 3.0 V Comparator 0 (CMP0) Supply Cur- ICMP rent Internal Fast-settling 1.65V ADC0 Reference, Always-on8 IVREFFS — 200 — µA On-chip Precision Reference IVREFP — 15 — µA Temp sensor Supply Current ITSENSE — 35 — µA Programmable Current Reference (IREF0) Supply Current9 IIREF Current Source, Either Power Mode, Any Output Code — 10 — µA Low Power Mode, Current Sink — 1 — µA — 11 — µA — 12 — µA — 81 — µA IREF0DAT = 000001 Low Power Mode, Current Sink IREF0DAT = 111111 High Current Mode, Current Sink IREF0DAT = 000001 High Current Mode, Current Sink IREF0DAT = 111111 silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 12 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Conditions Min Typ Max Units Note: 1. Based on device characterization data; Not production tested. 2. SYSCLK must be at least 32 kHz to enable debugging. 3. Digital Supply Current depends upon the particular code being executed. The values in this table are obtained with the CPU executing an “sjmp $” loop, which is the compiled form of a while(1) loop in C. One iteration requires 3 CPU clock cycles, and the flash memory is read on each cycle. The supply current will vary slightly based on the physical location of the sjmp instruction and the number of flash address lines that toggle as a result. In the worst case, current can increase by up to 30% if the sjmp loop straddles a 128-byte flash address boundary (e.g., 0x007F to 0x0080). Real-world code with larger loops and longer linear sequences will have few transitions across the 128-byte address boundaries. 4. Includes supply current from regulator and oscillator source (24.5 MHz high-frequency oscillator, 20 MHz low-power oscillator, or 32.768 kHz RTC oscillator). 5. IDD can be estimated for frequencies < 10 MHz by simply multiplying the frequency of interest by the frequency sensitivity number for that range, then adding an offset of 90 µA. When using these numbers to estimate IDD for > 10 MHz, the estimate should be the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 3.0 V; F = 20 MHz, IDD = 4.1 mA – (25 MHz – 20 MHz) x 0.120 mA/MHz = 3.5 mA assuming the same oscillator setting. 6. Idle IDD can be estimated by taking the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 3.0 V; F = 5 MHz, Idle IDD = 2.5 mA – (25 MHz – 5 MHz) x 0.095 mA/MHz = 0.6 mA. 7. ADC0 always-on power excludes internal reference supply current. 8. The internal reference is enabled as-needed when operating the ADC in burst mode to save power. 9. IREF0 supply current only. Does not include current sourced or sunk from IREF0 output pin. Table 4.3. Reset and Supply Monitor Parameter Symbol Test Condition Min Typ Max Unit VDD Supply Monitor Threshold VVDDM Reset Trigger 1.7 1.75 1.8 V VWARN Early Warning 1.8 1.85 1.9 V — 300 — ns Initial Power-On (Rising Voltage on VDD) — 0.75 — V Falling Voltage on VDD 0.7 0.8 0.9 V Brownout Recovery (Rising Voltage on VDD) — 0.95 — V VDD Supply Monitor Turn-On Time tMON Power-On Reset (POR) Monitor Threshold VPOR VDD Ramp Time tRMP Time to VDD ≥ 1.8 V — — 3 ms Reset Delay tRST Time between release of reset source and code execution — 10 — µs RST Low Time to Generate Reset tRSTL 15 — — µs Missing Clock Detector Response Time (final rising edge to reset) tMCD 100 650 1000 µs Missing Clock Detector Trigger Frequency FMCD — 7 10 kHz Min Typ Max Units FSYSCLK > 1 MHz Table 4.4. Flash Memory Parameter Symbol Test Condition Write Time1 tWRITE One Byte 57 64 71 µs Erase Time1 tERASE One Page 28 32 36 ms silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 13 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Endurance (Write/Erase Cycles) NWE Test Condition Min Typ Max Units 1k 30 k — Cycles Note: 1. Does not include sequencing time before and after the write/erase operation, which may be multiple SYSCLK cycles. 2. Data Retention Information is published in the Quarterly Quality and Reliability Report. Table 4.5. Power Management Timing Parameter Symbol Test Condition Idle Mode Wake-up Time tIDLEWK Suspend Mode Wake-up Time tSUS- CLKDIV = 0x00 PENDWK Precision Osc. CLKDIV = 0x00 Min Typ Max Units 2 — 3 SYSCLKs — 400 — ns — 1.3 — µs — 2 — µs Min Typ Max Unit Low Power Osc. Sleep Mode Wake-up Time tSLEEPWK Table 4.6. Internal Oscillators Parameter Symbol Test Condition High Frequency Oscillator 0 (24.5 MHz) Oscillator Frequency fHFOSC0 Full Temperature and Supply Range 24 24.5 25 MHz fLPOSC Full Temperature and Supply Range 18 20 22 MHz fLFOSC Bias Off — 12 ± 5 — kHz Bias On — 25 ± 10 — kHz Min Typ Max Unit 0.02 - 25 MHz Min Typ Max Unit Low Power Oscillator (20 MHz) Oscillator Frequency RTC in Self-Oscillate Mode Oscillator Frequency Table 4.7. Crystal Oscillator Parameter Symbol Crystal Frequency fXTAL Test Condition Table 4.8. External Clock Input Parameter Symbol Test Condition External Input CMOS Clock fCMOS 0 — 25 MHz External Input CMOS Clock High Time tCMOSH 18 — — ns External Input CMOS Clock Low Time tCMOSL 18 — — ns Frequency (at EXTCLK pin) silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 14 EFM8SB2 Data Sheet Electrical Specifications Table 4.9. ADC Parameter Symbol Test Condition Min Typ Max Resolution Nbits Throughput Rate fS — — 300 ksps Tracking Time tTRK 1.5 — — µs Power-On Time tPWR 1.5 — — µs SAR Clock Frequency fSAR — — 8.33 MHz Conversion Time TCNV 13 — — Clocks Sample/Hold Capacitor CSAR Gain = 1 — 30 — pF Gain = 0.5 — 28 — pF 10 High Speed Mode, Unit Bits Input Pin Capacitance CIN — 20 — pF Input Mux Impedance RMUX — 5 — kΩ Voltage Reference Range VREF 1 — VDD V Input Voltage Range1 VIN Gain = 1 0 — VREF V Gain = 0.5 0 — 2 x VREF V PSRRADC Internal High Speed VREF — 67 — dB External VREF — 74 — dB Power Supply Rejection Ratio DC Performance Integral Nonlinearity INL — ±0.5 ±1 LSB Differential Nonlinearity (Guaranteed Monotonic) DNL — ±0.5 ±1 LSB Offset Error EOFF –2 0 2 LSB Offset Temperature Coefficient TCOFF — 0.004 — LSB/°C Slope Error EM — ±0.06 ±0.24 % VREF = 1.65 V Dynamic Performance 10 kHz Sine Wave Input 1dB below full scale, Max throughput Signal-to-Noise SNR 54 58 — dB Signal-to-Noise Plus Distortion SNDR 54 58 — dB Total Harmonic Distortion (Up to 5th Harmonic) THD — -73 — dB Spurious-Free Dynamic Range SFDR — 75 — dB Min Typ Max Unit 1.60 1.65 1.70 V Note: 1. Absolute input pin voltage is limited by the VDD supply. Table 4.10. Voltage References Parameter Symbol Test Condition Internal Fast Settling Reference Output Voltage VREFFS silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 15 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Temperature Coefficient Test Condition Min Typ Max Unit TCREFFS — 50 — ppm/°C Turn-on Time tVREFFS — — 1.5 µs Power Supply Rejection PSRRREF — 400 — ppm/V 1.645 1.68 1.715 V 4.7 µF tantalum + 0.1 µF ceramic bypass on VREF pin — 15 — ms 0.1 µF ceramic bypass on VREF pin — 300 — µs No bypass on VREF pin — 25 — µs Load = 0 to 200 µA to GND — 400 — µV / µA FS On-chip Precision Reference Output Voltage VREFP Turn-on Time, settling to 0.5 LSB tVREFP Load Regulation LRVREFP Short-circuit current ISCVREFP — 3.5 — mA Power Supply Rejection PSRRVRE — 140 — ppm/V 1 — VDD V — 5.25 — µA Min Typ Max Unit FP External Reference Input Voltage VEXTREF Input Current IEXTREF Sample Rate = 300 ksps; VREF = 3.0 V Table 4.11. Temperature Sensor Parameter Symbol Test Condition Offset VOFF TA = 0 °C — 940 — mV Offset Error1 EOFF TA = 0 °C — 18 — mV Slope M — 3.40 — mV/°C Slope Error1 EM — 40 — µV/°C — ±1 — °C — 1.8 — µs Min Typ Max Unit Linearity Turn-on Time tPWR Note: 1. Represents one standard deviation from the mean. Table 4.12. Comparators Parameter Symbol Test Condition Response Time, CPMD = 00 (Highest Speed) tRESP0 +100 mV Differential — 130 — ns –100 mV Differential — 200 — ns +100 mV Differential — 1.75 — µs –100 mV Differential — 6.2 — µs Response Time, CPMD = 11 (Low- tRESP3 est Power) silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 16 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Test Condition Positive Hysterisis HYSCP+ Mode 0 (CPMD = 00) Negative Hysterisis HYSCP- Mode 0 (CPMD = 00) Positive Hysterisis HYSCP+ Mode 1 (CPMD = 01) Negative Hysterisis HYSCP- Mode 1 (CPMD = 01) Positive Hysterisis HYSCP+ Mode 2 (CPMD = 10) Negative Hysterisis HYSCP- Mode 2 (CPMD = 10) Positive Hysteresis HYSCP+ Mode 3 (CPMD = 11) Negative Hysteresis HYSCP- Mode 3 (CPMD = 11) Min Typ Max Unit CPHYP = 00 — 0.4 — mV CPHYP = 01 — 8 — mV CPHYP = 10 — 16 — mV CPHYP = 11 — 32 — mV CPHYN = 00 — -0.4 — mV CPHYN = 01 — –8 — mV CPHYN = 10 — –16 — mV CPHYN = 11 — –32 — mV CPHYP = 00 — 0.5 — mV CPHYP = 01 — 6 — mV CPHYP = 10 — 12 — mV CPHYP = 11 — 24 — mV CPHYN = 00 — -0.5 — mV CPHYN = 01 — –6 — mV CPHYN = 10 — –12 — mV CPHYN = 11 — –24 — mV CPHYP = 00 — 0.7 — mV CPHYP = 01 — 4.5 — mV CPHYP = 10 — 9 — mV CPHYP = 11 — 18 — mV CPHYN = 00 — -0.6 — mV CPHYN = 01 — –4.5 — mV CPHYN = 10 — –9 — mV CPHYN = 11 — –18 — mV CPHYP = 00 — 1.5 — mV CPHYP = 01 — 4 — mV CPHYP = 10 — 8 — mV CPHYP = 11 — 16 — mV CPHYN = 00 — -1.5 — mV CPHYN = 01 — –4 — mV CPHYN = 10 — –8 — mV CPHYN = 11 — –16 — mV Input Range (CP+ or CP–) VIN -0.25 — VDD+0.25 V Input Pin Capacitance CCP — 12 — pF Common-Mode Rejection Ratio CMRRCP — 70 — dB Power Supply Rejection Ratio PSRRCP — 72 — dB Input Offset Voltage VOFF -10 0 10 mV silabs.com | Smart. Connected. Energy-friendly. TA = 25 °C Rev. 1.1 | 17 EFM8SB2 Data Sheet Electrical Specifications Parameter Symbol Input Offset Tempco TCOFF Test Condition Min Typ Max Unit — 3.5 — µV/°C Typ Max Units Table 4.13. Programmable Current Reference (IREF0) Parameter Symbol Conditions Min Static Performance Resolution Nbits Output Compliance Range VIOUT 6 bits Low Power Mode, Source 0 — VDD – 0.4 V High Current Mode, Source 0 — VDD – 0.8 V Low Power Mode, Sink 0.3 — VDD V High Current Mode, Sink 0.8 — VDD V Integral Nonlinearity INL —