SI2115-A10-GMR

Si2115/13/11 Digital TV Receiver for DVB-T/C Description Features The Si2115/13/11 digital TV receiver integrates a complete digital TV tuner and a DVB-T and/or DVB-C digital demodulator into a single, monolithic, CMOS mixed-signal IC. - Digital TV tuner - 42–870 MHz frequency range - No alignment, tuning or calibration - Digital TV (DTV) demodulator and FEC decoder - DVB-T (ETSI EN 300 744)(Si2115 and Si2111 only) - DVB-C (ETSI EN 300 429)(Si2115 and Si2113 only) - ITU J.83 Annex A/C (Si2115 and Si2113 only) - Supports all DVB-T modes - Supports DVB-C symbol rates from 1 to 7.2 MBaud - Advanced echo equalizer - Best-in-class real-world reception - Compliance with NorDig 2.1, D-Book, and C-Book  An enhanced version of the proven DVB-T/C demodulator technology from Silicon Labs' Si2165 has been incorporated into the Si2115/13/11 to deliver superior performance under a wide variety of field conditions. The digital demodulator uses sophisticated on-chip algorithms to ensure optimal reception even under difficult transmission conditions. In addition, the Si2115/13/11 offers on-chip Blindscan and Blindlock scanning algorithms for DVB-C as well as DSP-assisted DVB-T fast channel scanning. By combining digital tuner and demodulator functions in a single device, the Si2115/13/11 enables a full TV receiver solution in a very small PCB footprint and with minimal external components. The Si2115/13/11 contains an on-chip crystal oscillator and only requires the connection of a standard 24 MHz crystal or a reference clock. For dual-receiver applications, the primary Si2115/13/11 can provide a reference clock on its XOUT pin directly to the XTAL_I pin of the secondary Si2115/13/11, thus saving the cost of one crystal. The Si2115/13/11 programmable Transport Stream interface provides both serial and parallel modes, and is fully compatible with all MPEG decoders and conditional access modules (CI/CI+) to support any customer application. ANTENNA or CABLE INPUT Si2115/13/11 Balun RF_IN I ADC PGA RF_IP LNA Q ADC PGA specifications - Highly integrated, lowest BOM - No SAW filters required - Integrated LNAs and complete tracking filters - Customizable channel select filters - Flexible output interface to AV processor - Serial or parallel TS output - Low IF output to optional external demodulator - Single die in standard CMOS process - 3.3 and 1.8 V power supplies - 7x7 mm, 48-pin QFN package, RoHS compliant Applications - DSP DIGITAL FILTER FILTER ATV DEMOD Digital terrestrial or cable STB Digital PVR and DVD recorder Digital TV Digital PC TV card and USB dongle Digital full-NIM tuner module DIGITAL I/Q DVB DEMOD EQUALIZER FEC DSP VDD_L, VDD_D (1.8 V) VDD_H, VDD_IO (3.3 V) VDD_S (3.3 or 5 V) RF AGC 0 / 90 DC/DC FREQ SYNTH IF AGC LOW-IF CONTROL INTERFACE XOSC OUTPUT INTERFACE Leveraging Silicon Labs' proven 3rd-generation digital low-IF tuner architecture, the Si2115/13/11 delivers a higher number of received channels in real-world crowded spectrum conditions without the need for external LNAs, tracking filters, or SAW filters. TS_SYNC TS_VAL TS_ERR TS_CLK TS_DATA [0..7] 8 A/V SoC SDA SCL INTB RSTB ADDR GPIO1 BCLK XOUT XTAL_I XTAL_O 24 MHz Digital TV Receiver for DVB-T/C Copyright © 2011 by Silicon Laboratories 09.06.11 Si2115/13/11 Digital TV Receiver for DVB-T/C Selected Electrical Specifications (VDD_H = 3.3 V, VDD_L = 1.8 V, VDD_D = 1.8 V, TA = 25 °C) Parameter Test Condition Typ Unit 1.8 and 3.3 V 1.1 W 42 to 870 MHz Max gain 4.0 dB N±18,±36; max RF gain +18 dBm N±1,±2; max RF gain –5 dBm 125 Hz | 250 Hz | 1 kHz | 10 kHz | 100 kHz –83 | –91 | –96 | –95 | –104 dBc/Hz Integrated DSB: 125 Hz to 4 MHz 0.4 (–43) °rms (dBc) 80 dB 8K, 64-QAM, 2/3CR, Gaussian Channel –84 dBm 8K, 64-QAM, 2/3CR, Gaussian Channel 17 dB Supply Voltage Total Power Consumption DVB-T mode RF Input Frequency Range Noise Figure1 Wideband IIP3 1 Inband IIP31 LO Phase Noise at 860 MHz Adjacent Channel Attenuation DVB-T N±1; RF Sensitivity2 DVB-T Carrier to Noise Ratio2 input1 to DLIF output Notes: 1. Measured at the F-connector input of the Si2115/13/11 reference design and includes all front-end circuit losses. 2. Measured at Quasi Error Free conditions (BER = 2 x 10–4). Selection Guide Part # Description Si2115 Digital TV receiver for DVB-T/C Si2113 Digital TV Receiver for DVB-C Si2111 Digital TV Receiver for DVB-T XOUT BCLK VDD_L DLIF_P DLIF_N NC VDD_H NC DLIF_AGC ADDR VDD_S SCL Pin Assignments 36 35 34 33 32 31 30 29 28 27 26 25 XTAL_O 37 7x7 mm QFN-48 Package Information 24 SDA XTAL_I / RCLK 38 23 TS_CLK VDD_H 39 22 TS_DATA0 / TS_SER Si2115/13/11 GND 40 VDD_H 41 GND 42 21 TS_DATA1 20 TS_DATA2 19 VDD_IO GND_PAD RF_SHLD 43 18 GND QFN-48 7x7 mm RF_IN 44 RF_IP 45 17 TS_DATA3 16 TS_DATA4 RF_SHLD 46 15 TS_DATA5 GND 47 14 TS_DATA6 2 3 4 5 6 7 8 9 10 11 12 GND GPIO1 INTB RSTB VDD_H GND VDD_IO TS_ERR / GPIO2 TS_SYNC TS_VAL VDD_D 13 TS_DATA7 1 VDD_H GND 48 Digital TV Receiver for DVB-T/C Symbol Min A D, E e 0.80 Nom Max Unit 0.85 0.90 7.00 BSC 0.50 BSC mm mm mm Copyright © 2011 by Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. 09.06.11