SI4313-B1

Si4313-B1 Si4313 L OW -C O S T I S M R ECEIVER Features            Frequency range = 240–960 MHz  Sensitivity = –118 dBm  Low power consumption  Data rate = 0.2 to 128 kbps FSK, GFSK, and OOK modulation   schemes Power supply = 1.8 to 3.6 V  Ultra low power shutdown mode  Digital RSSI  Wake-up timer  Auto Frequency Calibration (AFC)  Clear channel assessment  Programmable RX BW 2.6–620 kHz Preamble detector RX 64 byte FIFO –40 to +85 °C temperature range Integrated voltage regulators Frequency hopping capability On-chip crystal tuning 20-pin QFN package Low BOM Single capacitor matching network Power-On-Reset (POR)  Single-ended antenna configuration Ordering Information: See page 46. Pin Assignments Si4313 XOUT nSEL 15 SCLK 14 SDI 13 SDO 12 VDD_DIG 7 GPIO_0 8 GPIO_1 9 GPIO_2 10 11 NC VDR nIRQ SDN VDD 1 XIN Applications  20 19 18 17 16 Remote control  Weather station  Personal data logging  Health monitors NC 2 NC 3 RX 4 NC 5 6 NC Description The Si4313 is a single-ended universal ISM receiver for cost-sensitive applications featuring technology developed for the EZRadioPRO® product family. The Si4313 offers a simple, single-ended radio implementation over the 240–960 MHz frequency range. A receive sensitivity of up to –118 dBm allows for the creation of communication links with an extended range. The Si4313 offers excellent receiver performance in cost-sensitive radio applications. The Si4313 provides designers with advanced features to enable low system power consumption by offloading a number of RF-related activities from the system MCU allowing for extended MCU sleep periods. Additional features, such as an automatic wake-up timer, 64-byte RX FIFO, and a preamble detection circuit, are available. The Si4313's digital receive architecture features an ADC and DSP based modem that performs the radio demodulation and filtering for increased performance. GND PAD Patents pending Rev. 0.5 2/10 Copyright © 2010 by Silicon Laboratories Si4313 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. S i4313-B1 Functional Block Diagram 2 Rev. 0.5 S i4313-B1 TABLE O F C ONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 1.1. Test Condition Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1. Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3. Controller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1. Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2. Operating Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.3. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4. System Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.5. Frequency Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4. Modulation Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1. Modulation Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 4.2. FIFO Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 4.3. Direct Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 5. Internal Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1. RX LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2. RX I-Q Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 5.3. Programmable Gain Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 5.4. ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.5. Digital Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.6. Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 5.7. Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.8. Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6. Data Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6.1. RX FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6.2. Preamble Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.3. Invalid Preamble Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7. Rx Modem Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7.1. Modem Settings for FSK and GFSK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7.2. Modem Settings for OOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 8. Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.1. Smart Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 8.2. Microcontroller Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 8.3. Low Battery Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 8.4. Wake-Up Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8.5. Low Duty Cycle Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.6. GPIO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.7. RSSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Rev. 0.5 3 S i4313-B1 9. Reference Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 10. Application Notes and Reference Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 11. Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 11.1. Rx LNA Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 12. Register Table and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 13. Pin Descriptions: Si4313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 14. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 15. Package Outline: Si4313-B1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 16. Landing Pattern: 20-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 17. Top Marking: 20-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 17.1. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 4 Rev. 0.5 S i4313-B1 L I S T O F F IGURES Figure 1. Application Example................................................................................................... 16 Figure 2. SPI Timing.................................................................................................................. 18 Figure 3. SPI Timing - READ Mode ..........................................................................................19 Figure 4. SPI timing - Burst Write Mode.................................................................................... 19 Figure 5. SPI timing Burst Read Mode...................................................................................... 19 Figure 6. State Machine Diagram.............................................................................................. 20 Figure 7. Rx Timing ................................................................................................................... 23 Figure 8. Sensitivity at 1% PER vs. Carrier Frequency Offset ................................................. 24 Figure 9. FIFO Threshold .......................................................................................................... 30 Figure 10. POR Glitch Parameters............................................................................................ 34 Figure 11. WUT Interrupt and WUT Operation.......................................................................... 38 Figure 12. Low Duty Cycle Mode .............................................................................................. 39 Figure 13. RSSI Value vs. Input Power..................................................................................... 40 Figure 14. Reference Test Card................................................................................................ 41 Figure 15. RX LNA Matching Circuit ......................................................................................... 42 Figure 16. 20-Pin Quad Flat No-Lead (QFN) ............................................................................47 Figure 17. 20-Pin QFN Landing Pattern.................................................................................... 48 Figure 18. Si4313 Top Marking .................................................................................................50 Rev. 0.5 5 S i4313-B1 L I S T O F TABLES Table 1. DC Characteristics ........................................................................................................7 Table 2. Synthesizer AC Electrical Characteristics .....................................................................8 Table 3. Receiver AC Electrical Characteristics..........................................................................9 Table 4. Auxiliary Block Specifications...................................................................................... 11 Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ).................................... 12 Table 6. GPIO Specifications (GPIO_0, GPIO_1 and GPIO_2) ............................................... 13 Table 7. Absolute Maximum Ratings ........................................................................................ 14 Table 8. Operating Modes ........................................................................................................17 Table 9. Serial Interface Timing Parameters ............................................................................18 Table 10. Operating Modes Response Time ............................................................................20 Table 11. PLL Synthesizer Block Diagram ............................................................................... 28 Table 12. Minimum Receiver Settling Time .............................................................................. 31 Table 13. GFSK Modem Settings ............................................................................................. 32 Table 14. OOK Modem Settings .............................................................................................. 33 Table 15. POR Parameters ...................................................................................................... 34 Table 16. System Clock Frequency Options ............................................................................35 Table 17. LBD ADC Range ...................................................................................................... 37 Table 18. RX LNA Matching Values ......................................................................................... 42 Table 19. Register Descriptions ............................................................................................... 43 Table 20. Package Dimensions ................................................................................................ 47 Table 21. PCB Land Pattern Dimensions ................................................................................. 49 6 Rev. 0.5 S i4313-B1 1. Electrical Specifications Table 1. DC Characteristics1 Parameter Supply Voltage Range Symbol VDD RC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF2 Low Power Digital Regulator ON (Register values retained) and Main Digital Regulator, and RC Oscillator OFF RC Oscillator and Low Power Digital Regulator ON (Register values retained) and Main Digital Regulator OFF Main Digital Regulator and Low Battery Detector ON, Crystal Oscillator and all other blocks OFF2 Main Digital Regulator and Temperature Sensor ON, Crystal Oscillator and all other blocks OFF2 Crystal Oscillator and Main Digital Regulator ON, all other blocks OFF. Crystal Oscillator buffer disabled Synthesizer and regulators enabled Conditions Min 1.8 Typ 3.0 Max 3.6 Units V ISHUTDOWN — 15 50 nA ISTANDBY — 450 800 nA Power Saving Modes ISLEEP — 1 — µA ISENSOR-LBD ISENSOR-TS IREADY Tune Mode Current RX Mode Current ITUNE IRX — — — — — 1 1 800 8.5 18.5 — — — — — µA µA µA mA mA Notes: 1. All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in "1.1.1. Production Test Conditions" on page 14. 2. Guaranteed by qualification. Qualification test conditions are listed in "1.1.1. Production Test Conditions" on page 14. Rev. 0.5 7 S i4313-B1 Table 2. Synthesizer AC Electrical Characteristics1 Parameter Synthesizer Frequency Range Synthesizer Frequency Resolution2 Reference Frequency Input Level2 Synthesizer Settling Time2 Symbol FSYNTH-LB FSYNTH-HB FRES-LB FRES-HB fREF_LV Conditions Low Band High Band Low Band High Band When using external reference signal driving XOUT pin, instead of using crystal. Measured peak-to-peak (VPP) Measured from leaving Ready mode with XOSC running to any frequency including VCO Calibration Min 240 480 — — 0.7 Typ — — 156.25 312.5 — Max 480 960 — — 1.6 Units MHz MHz Hz Hz V tLOCK — 200 — µs Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in "1.1.1. Production Test Conditions" on page 14. 2. Guaranteed by qualification. Qualification test conditions are listed in "1.1.1. Production Test Conditions" on page 14. 8 Rev. 0.5 S i4313-B1 Table 3. Receiver AC Electrical Characteristics1 Parameter Synthesizer Frequency Range Symbol FRX (BER < 0.1%) (2 kbps, GFSK, BT = 0.5, Δf = ±5 kHz)2 (BER < 0.1%) (40 kbps, GFSK, BT = 0.5, Δf = ±20 kHz)2 (BER < 0.1%) (100 kbps, GFSK, BT = 0.5, Δf = ±50 kHz)2 (BER < 0.1%) (125 kbps, GFSK, BT = 0.5, Δf = ±62.5 kHz)1 (BER < 0.1%) (4.8 kbps, 350 kHz BW, OOK)2 PRX_OOK (BER < 0.1%) (40 kbps, 400 kHz BW, OOK)1 Conditions Min 240 Typ — Max 960 Units MHz PRX_2 — –118 — dBm PRX_40 — –105 — dBm RX Sensitivity PRX_100 — –101 — dBm PRX_125 — –98 — dBm — — 2.6 — –107 –99 — ±0.5 –31 –35 –40 –52 –56 –63 –30 — — — 620 — — — — — — — — –54 dBm dBm kHz dB dB dB dB dB dB dB dB dBm RX Bandwidth2 RSSI Resolution ±1-Ch Offset Selectivity2 ±2-Ch Offset Selectivity2 ≥±3-Ch Offset Selectivity2 Blocking at 1 MHz offset2 Blocking at 4 MHz offset 2 Blocking at 8 MHz offset 2 Image Rejection2 Spurious Emissions2 BW RESRSSI C/I1-CH C/I2-CH C/I3-CH 1MBLOCK 4MBLOCK 8MBLOCK ImREJ POB_RX1 Desired Ref Signal 3 dB above sensitivity, BER