SI4740-C10-GM

Si4740/41/42/43/44/45-C10 A U TO M O T I V E A M / F M R ADIO R E C E IV E R Features               Digital audio output (I2S) (Si4741/43/45 only)  24-pin 4 x 4 mm QFN package Pb-free/RoHS compliant Pin Assignments Si4740/41/42/43/44/45-C10-GM (Top View) 24 23 22 21 20 19  FMI 1 18 DFS 17 DOUT RFGND 2 AGC1 3 Applications  Ordering Information: See page 39. GPO3/DCLK   GPO2/INT   GPO1/AGC2   AM and FM programmable channel bandwidth filters Digital FM stereo decoder Advanced patented RDS/RBDS processor (Si4741/43/45 only) Automatic gain control (AGC) Integrated AM and FM low-noise amplifier (LNA) Image-rejection mixer Frequency synthesizer with integrated voltage controlled oscillator (VCO) Low-IF conversion with no external ceramic filters 3.0 to 3.6 V supply voltage Programmable reference clock AECQ-100 qualified –40 to 85 ºC operation NC   NC  Worldwide FM band support (64–108 MHz) Worldwide AM band support (520–1710 kHz) LW band support (153–288 kHz) (Si4742/43/44/45 only) MW (520–1710 kHz) and SW (2.3–30 MHz) support (Si4742/43/44/45 only) NOAA weather band support (162.4–162.55 MHz) (Si4742/43 only) FM multipath detection and mitigation AM/FM noise blanker (Si4742/43/44/45 only) Received signal quality indicators (RSSI, SNR, frequency offset, multi-path interference) AM and FM programmable seek tuning AM and FM programmable soft mute control FM Hi-cut control (Si4742/43/44/45 only) Power line noise rejection/AM lo-cut filter FM programmable stereo-mono blend NC  NC 4  OEM car audio systems After-market car audio systems 16 LOUT GND PAD 15 ROUT GND 5 14 GND Functional Block Diagram RDS LNA WEAK SIGNAL CONDITION AGC ADC AMI LNA GND AGC 10 11 12 SDIO RCLK VIO Patents pending Si474x FMI 9 SEN The Si474x AM/FM receiver family is the most highly integrated automotive grade and performance solution available. 8 SCLK Description 13 VDD 7 RST AMI 6 DOUT DIGITAL AUDIO DFS DCLK DAC ROUT DAC LOUT Note: To ensure proper operation and receiver performance, follow the guidelines in “AN400: Si474x AM/FM Receiver Layout Guide.” Skyworks will evaluate schematics and layouts for qualified customers. DSP ADC AGC VDD AFC QUALITY DETECTOR CNTRL GPO1-3 VIO RST RCLK GND LDO SEN SCLK SDIO 3.0–3.6 V Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 NOTES: 2 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 TABLE O F C ONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4. Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4.2. Block Diagram and Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3. FM Receiver Front-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4. AM Receiver Front-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.5. Received Signal Qualifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.6. Digital Audio Interface (Si4741/43/45 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.7. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.8. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.9. Stereo DACs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.10. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.11. Seek and Valid Station Qualification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.12. FM Hi-Cut Control (Si4742/43/44/45 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 4.13. AM/FM Noise Blanker (Si4742/43/44/45 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.14. Programming Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.15. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.16. GPO 1–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 4.17. RDS/RBDS Advanced Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.18. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.19. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6. Pin Descriptions: Si4740/41/42/43/44/45-C10-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8. Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 8.1. Si4740/41/42/43/44/45-C10 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 8.2. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 9. Package Outline: Si4740/41/42/43/44/45-C10 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 10. PCB Land Pattern: Si4740/41/42/43/44/45-C10 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 11. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 3 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Symbol Test Condition Min Typ Max Unit Supply Voltage VDD 3.0 — 3.6 V Interface Supply Voltage VIO 2.7 — 3.6 V Power Supply Powerup Rise Time VDDRISE 10 — — µs Interface Power Supply Powerup Rise Time VIORISE 10 — — µs TA –40 25 85 C Ambient Temperature Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at VDD = 3.3 V and 25 C unless otherwise stated. Parameters are tested in production unless otherwise stated. Table 2. Absolute Maximum Ratings1,2 Parameter Symbol Value Unit Supply Voltage VDD –0.5 to 5.8 V Interface Supply Voltage VIO –0.5 to 3.9 V 3 Input Current IIN 10 mA Input Voltage3 VIN –0.3 to (VIO + 0.3) V Operating Temperature TOP –45 to 95 C Storage Temperature TSTG –55 to 150 C 0.4 VpK RF Input Level4 Notes: 1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4740/41/42/43/44/45-C10 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations. 3. For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, DFS, GPO1, GPO2, and GPO3. 4. At RF input pins, FMI and AMI. 4 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 3. DC Characteristics (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit IFM — 26 28.6 mA IFM — 20 23 mA IAM — 19 23 mA Interface Supply Current IIO — 300 400 µA Powerdown Current1,2 IPD — 6 12 µA Interface Powerdown Current1 IIO — 6 12 µA High Level Input Voltage3 VIH 0.7 x VIO — — V Low Level Input Voltage3 VIL — — 0.3 x VIO V 3 IIH VIN = VIO = 3.6 V –10 — 10 µA Low Level Input Current3 IIL VIN = 0 V, VIO = 3.6 V –10 — 10 µA High Level Output Voltage4 VOH IOUT = 500 µA 0.8 x VIO — — V Low Level Output Voltage4 VOL IOUT = –500 µA — — 0.2 x VIO V FM Mode Supply Current WB Mode (Si4742/43 only) Supply Current AM Mode Supply Current Supplies and Interface High Level Input Current SCLK, DFS, DCLK, RCLK inactive Notes: 1. Specifications are guaranteed by characterization. 2. Refer to Section "4.19. Control Interface" on page 35. 3. For input pins SCLK, SEN, SDIO, RST, and RCLK. 4. For output pins SDIO, DFS, GPO1, GPO2, and GPO3. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 5 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 4. Reset Timing Characteristics1,2,3 (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Symbol Min Typ Max Unit RST Pulse Width and GPO1, GPO2/INT Setup to RST tSRST 100 — — µs GPO1, GPO2/INT Hold from RST tHRST 30 — — ns Parameter Notes: 1. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST. 2. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. 3. When selecting 3-wire or SPI modes, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. 4. If GPO1 and GPO2 are actively driven by the user, then minimum tSRST is only 30 ns. If GPO1 or GPO2 is hi-Z, then minimum tSRST is 100 µs, to provide time for on-chip 1 M devices (active while RST is low) to pull GPO1 high and GPO2 low. tSRST RST 70% GPO1 70% GPO2 70% tHRST 30% 30% 30% Figure 1. Reset Timing Parameters for Busmode Select Method 6 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 5. 2-Wire Control Interface Characteristics1,2,3 (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit SCLK Frequency fSCL 0 — 400 kHz SCLK Low Time tLOW 1.3 — — µs SCLK High Time tHIGH 0.6 — — µs SCLK Input to SDIO  Setup (START) tSU:STA 0.6 — — µs SCLK Input to SDIO  Hold (START) tHD:STA 0.6 — — µs SDIO Input to SCLK  Setup tSU:DAT 100 — — ns SDIO Input to SCLK  Hold4,5 tHD:DAT 0 — 900 ns SCLK input to SDIO  Setup (STOP) tSU:STO 0.6 — — µs STOP to START Time tBUF 1.3 — — µs SDIO Output Fall Time tf:OUT — 250 ns — 300 ns Cb 20 + 0.1 ----------1pF SDIO Input, SCLK Rise/Fall Time tf:IN tr:IN Cb 20 + 0.1 ----------1pF SCLK, SDIO Capacitive Loading Cb — — 50 pF Input Filter Pulse Suppression tSP — — 50 ns Notes: 1. When VIO = 0 V, SCLK and SDIO are low impedance. 2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is high) does not occur within 300 ns before the rising edge of RST. 3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. 4. The Si474x delays SDIO by a minimum of 300 ns from the VIH threshold of SCLK to comply with the minimum tHD:DAT specification. 5. The maximum tHD:DAT has only to be met when fSCL = 400 kHz. At frequencies below 400 kHz, tHD:DAT may be violated as long as all other timing parameters are met. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 7 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 SCLK 70% SDIO 70% tSU:STA tHD:STA tLOW START tr:IN tHIGH tr:IN tf:IN tSP tSU:STO tBUF 30% 30% tf:IN, tf:OUT tHD:DAT tSU:DAT STOP START Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, R/W SDIO START ADDRESS + R/W D7-D0 ACK DATA D7-D0 ACK DATA ACK STOP Figure 3. 2-Wire Control Interface Read and Write Timing Diagram 8 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 6. 3-Wire Control Interface Characteristics (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit SCLK Frequency fCLK 0 — 2.5 MHz SCLK High Time tHIGH 25 — — ns SCLK Low Time tLOW 25 — — ns tS 20 — — ns SDIO Input to SCLKHold tHSDIO 10 — — ns SEN Input to SCLKHold tHSEN 10 — — ns SCLKto SDIO Output Valid tCDV Read 2 — 25 ns SCLKto SDIO Output High Z tCDZ Read 2 — 25 ns SCLK, SEN, SDIO, Rise/Fall Time tR, tF — — 10 ns SDIO Input, SEN to SCLKSetup Note: When selecting 3-wire mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. SCLK 70% 30% tR tF tHSDIO tS SEN 70% SDIO 70% tHIGH tLOW t HSEN tS 30% A7 30% A6-A5, R/W, A4-A1 A0 D15 D14-D1 Address In D0 Data In Figure 4. 3-Wire Control Interface Write Timing Parameters SCLK 70% SEN 70% 30% tHSDIO tS tCDV tHSEN tCDZ tS 30% 70% SDIO A7 30% A6-A5, R/W, A4-A1 Address In A0 D15 ½ Cycle Bus Turnaround D14-D1 D0 Data Out Figure 5. 3-Wire Control Interface Read Timing Parameters Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 9 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 7. SPI Control Interface Characteristics (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit SCLK Frequency fCLK 0 — 2.5 MHz SCLK High Time tHIGH 25 — — ns SCLK Low Time tLOW 25 — — ns tS 15 — — ns SDIO Input to SCLKHold tHSDIO 10 — — ns SEN Input to SCLKHold tHSEN 5 — — ns SCLKto SDIO Output Valid tCDV Read 2 — 25 ns SCLKto SDIO Output High Z tCDZ Read 2 — 25 ns SCLK, SEN, SDIO, Rise/Fall Time tR, tF — — 10 ns SDIO Input, SEN to SCLKSetup Note: When selecting SPI mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. SCLK 70% 30% tR tHIGH SEN 70% SDIO 70% tS tLOW tF tHSDIO tHSEN tS 30% C7 C6–C1 C0 D7 D6–D1 D0 30% Control Byte In 8 Data Bytes In Figure 6. SPI Control Interface Write Timing Parameters SCLK 70% 30% tCDV tS SEN 70% tHSEN tHSDIO tS 30% tCDZ SDIO 70% C7 C6–C1 C0 D7 D6–D1 D0 30% Control Byte In Bus Turnaround 16 Data Bytes Out (SDIO or GPO1) Figure 7. SPI Control Interface Read Timing Parameters 10 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 8. Digital Audio Interface Characteristics (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit DCLK Cycle Time tDCT 26 — 1000 ns DCLK Pulse Width High tDCH 10 — — ns DCLK Pulse Width Low tDCL 10 — — ns DFS Set-up Time to DCLK Rising Edge tSU:DFS 5 — — ns DFS Hold Time from DCLK Rising Edge tHD:DFS 5 — — ns tPD:DOUT 0 — 12 ns DOUT Propagation Delay from DCLK Falling Edge tDCH tDCL DCLK tDCT DFS tHD:DFS tSU:DFS DOUT tPD:OUT Figure 8. Digital Audio Interface Timing Parameters, I2S Mode Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 11 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 9. FM Receiver Characteristics1,2 (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = 25 °C) Parameter Test Condition Min Typ Max Unit FM Receiver Specifications Referred to Si4740/41/42/43/44/45-C10 Application Circuit Input Input Frequency 64 — 108 MHz FM Frequency Steps 10 — 200 kHz (S+N)/N = 26 dB — 2 3 µV EMF f = 2 kHz, RDS BLER < 5% — 6 9 µV EMF f = 2 kHz RDSSYNC = 1  10 sec — 3.8/60 — µV EMF/ RDS BLER% RDS Synchronization Stability8 f = 2 kHz RDSSYNC = 1  10 sec — 5.9/10 — µV EMF/ RDS BLER% RDS Synchronization Time8 f = 2 kHz RF input = 60 dBµV EMF — 90 — ms RDS PI Lock Time8 f = 2 kHz RF input = 60 dBµV EMF — 105 — ms 3 4 — k 4 5 6 pF 400 and 800 kHz blockers 100 105 — dBµV EMF m = 0.3 40 55 — dB f = 22.5 kHz 37 55 — dB Adjacent Channel Selectivity ±200 kHz 38 50 — dB Alternate Channel Selectivity ±400 kHz 60 70 — dB RF Level 120 dBµV EMF 53 58 — dB SINAD 72 80 90 mVRMS –1 — 1 dB Sensitivity3,4,5,6,7 RDS Sensitivity 8 RDS Synchronization Persistence8 LNA Input Resistance6,8,9 6,8,9 LNA Input Capacitance Input IP3 3,4,7 AM Suppression Image 3,4,6,8,9 Rejection8 Strong Signal Distortion3,4,5,6,8 Audio Output Voltage 3,4,6,9 Audio Output L/R Imbalance 3,6,9,10 Audio Frequency Response Low8 –3 dB — — 30 Hz 8 –3 dB 15 — — kHz Audio Frequency Response High Notes: 1. Additional testing information is available in application note, “AN388:Si470X/1X/2X/3X/4X Evaluation Board Test Procedure.” Volume = maximum for all tests. Tested at FRF = 98 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN400: Si474x AM/FM Receiver Layout Guide.” Skyworks will evaluate schematics and layouts for qualified customers. 3. FMOD = 1 kHz, 75 µs de-emphasis, MONO = enabled unless noted otherwise. 4. f = 22.5 kHz. 5. BAF = 300 Hz to 15 kHz. 6. fRF = 76 to 108 MHz. 7. AGC is disabled. 8. Guaranteed by characterization. 9. Measured at VEMF = 60 dBµVEMF. 10. f = 75 kHz. 11. L = 1, R = 0. 12. At LOUT and ROUT pins. 12 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 9. FM Receiver Characteristics1,2 (Continued) (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = 25 °C) Parameter Min Typ Max Unit 35 45 — dB 56 63 — dB — 0.1 0.5 % FM_DEEMPHASIS = 2 70 75 80 µs FM_DEEMPHASIS = 1 45 50 54 µs 0.7 0.8 0.9 V High-Z mode — 0.5 x VIO — V Audio Output Load Resistance8,10,12 Single-ended 10 — — k Audio Output Load Capacitance8,10,12 Single-ended — — 50 pF RCLK tolerance = 100 ppm — 40 60 ms/ channel Powerup Time8 From powerdown — — 110 ms FM RSSI Offset Input levels of 8 and 60 dBµV EMF –3 — 3 dB Audio Stereo Test Condition Separation3,6,9,10,11 3,4,5,6,9 Audio SNR Audio THD 3,4,5,6,9 De-emphasis Time Constant8 Audio Common Mode Voltage Audio Common Mode Seek/Tune Time8,12 12 Voltage8 Notes: 1. Additional testing information is available in application note, “AN388:Si470X/1X/2X/3X/4X Evaluation Board Test Procedure.” Volume = maximum for all tests. Tested at FRF = 98 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN400: Si474x AM/FM Receiver Layout Guide.” Skyworks will evaluate schematics and layouts for qualified customers. 3. FMOD = 1 kHz, 75 µs de-emphasis, MONO = enabled unless noted otherwise. 4. f = 22.5 kHz. 5. BAF = 300 Hz to 15 kHz. 6. fRF = 76 to 108 MHz. 7. AGC is disabled. 8. Guaranteed by characterization. 9. Measured at VEMF = 60 dBµVEMF. 10. f = 75 kHz. 11. L = 1, R = 0. 12. At LOUT and ROUT pins. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 13 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 10. WB Receiver Characteristics1 (Si4742/43 only) (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = 25 °C) Symbol Parameter Test Condition Min Typ Max Unit 162.4 — 162.55 MHz SINAD = 12 dB — 0.65 — µV EMF ±25 kHz 40 55 — dB FRF Input Frequency Sensitivity2,3,4,5 Adjacent Channel Selectivity Audio S/N2,3,4,5,6 Mono 35 45 — dB 7 –3 dB — — 300 Hz Audio Frequency Response High7 –3 dB 15 — — kHz Audio Frequency Response Low Notes: 1. To ensure proper operation and receiver performance, follow the guidelines in "AN400: Si474x AM/FM receiver Layout Guide." Skyworks will evaluate schematics and layouts for qualified customers. 2. FMOD = 1 kHz. 3. f = 3 kHz. 4. BAF = 300 Hz to 15 kHz, A-weighted. 5. FRF = 162.5 MHz. 6. Measured at VEMF = 60 dBµV EMF. 7. Guaranteed by characterization. 14 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 11. AM Receiver Characteristics1 (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = 25 °C) Parameter Test Condition Min Typ Max Unit AM Receiver Specifications referred to Si4740/41/42/43/44/45 application circuit with 15pF/62pF antenna dummy, voltages at antenna dummy input. AM/MW 520 — 1710 kHz AM/LW 144 — 288 kHz AM/SW2 2.3 — 30 MHz 1 — 10 kHz (S+N)/N=26 dB — 25 34 dBuV 40 and 80 kHz Offset — 99 — dBuV Audio SNR 3,4,7,8 50 53 — dB Audio THD 3,4,6,7,8 — 0.1 0.5 % Input Frequency Frequency Steps Sensitivity 3,5 IP36 Strong Signal THD 6,7,8 RF input level 120 dBµV EMF — 0.2 1 % Strong Signal SINAD 6,7,8 RF input level 120 dBµV EMF 53 55 — dB Power Supply Rejection Ratio6 ΔVDD = 100 mVRMS, 100 Hz — 40 — dB 54 60 67 mVRMS — — 110 ms Audio Output Voltage 3,4 Powerup Time6 From powerdown Notes: 1. To ensure proper operation and receiver performance, follow the guidelines in "AN400: Si474x AM/FM receiver Layout Guide." Skyworks will evaluate schematics and layouts for qualified customers. 2. Contact Skyworks for additional details on shortwave operation and performance. 3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter. 4. Measured at V = 74 dBµV. 5. fRF = 520 to 1710 kHz. 6. Guaranteed by characterization. 7. BAF = 300 Hz to 15 kHz. 8. fRF = 520 kHz. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 15 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 AM Antenna Dummy 15 pF 50 Ant+ Signal Generator 50 62 pF Ant– Figure 9. AM Test Circuit Table 12. Reference Clock (VDD = 3.0 to 3.6 V, VIO = 2.7 to 3.6 V, TA = –40 to 85 °C) Parameter RCLK Supported Frequencies RCLK Frequency Tolerance Symbol Test Condition Min Typ Max Unit 31.130 32.768 40,000 kHz –100 — 100 ppm 16 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 2. Typical Application Schematic C2 L2 Optional: Si4742/43 WBRX Optimization L5 Optional: Additional ESD Protection VDD GPO1/AGC2 GPO2/INTb GPO3/DCLK U2 L1 R3 24 23 22 21 20 19 C12 NC NC NC GPO1/AGC2 GPO2/INTb GPO3/DCLK C8 Optional: Si4742/43 LW Support Q5 1 2 3 4 5 6 L9 VDD Antenna+ Antenna- R10 R6 C9 FMI RFGND AGC1 NC GND1 AMI VDD NC/DFS NC/DOUT LOUT ROUT GND VDD 18 17 16 15 14 13 GND PAD PAD NC/DFS NC/DOUT LOUT ROUT L3 AMb RSTb SENb SCLK SDIO RCLK VIO C5 R7 L6 7 8 9 10 11 12 Q2 C1 VIO L10 C3 L7 U1 Si4740/41/42/43/44/45 RCLK SDIO SCLK SENb RSTb Q1 C10 VIO R1 L8 C4 U4 Optional: FM Intrusion Filter 2 C7 R11 U3 14 L4 1 Optional: Additional ESD Protection Q3 3 5 4 6 8 R4 Optional: Mains Trap VIO Optional: Passive Only U5 5 Antenna Attn 4 2 1 3 VIO R5 GPO1/AGC2 10 Optional: Software Selectible Active/Passive Antenna Attn R8 9 11 ACTIVE/PASSIVE ATTN 13 12 7 Q4 R9 Notes: 1. Place C1 close to VDD pin. 2. All grounds connect directly to GND plane on PCB. 3. To ensure proper operation and receiver performance, follow the guidelines in “AN400: Si474x AM/FM Receiver Layout Guide.” Skyworks will evaluate schematics and layouts for qualified customers. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 17 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 3. Bill of Materials Table 13. Si4740/41/42/43/44/45-C10 Bill of Materials Reference Description Manufacturer Part Number C1 CAP,22 nF, ±5%, 0402,X7R Venkel C0402X7R250-223JNE C2 CAP,18 pF, ±5%, 0402,COG Venkel C0402C0G500-180JNE C3 CAP,270 pF, ±5%, 0402,COG Venkel C0402C0G500-271JNE C4 CAP,18 nF, ±5%, 0402,X7R Venkel C0402X7R160-183JNE C5,C8,C9 CAP,0.47 µF, ±5%, 0603,X7R Venkel C0603X7R160-474JNE C7 CAP,1200 pF, ±5%, 0402,X7R Venkel C0402X7R500-122JNE C12 CAP, 100 µF, ±20%, 1206, X5R Venkel C1206X5R063-107MNE L1 IND, 120 nH, ±5%, 0603 Pulse PE-0603CD121JTT L3 IND,220 µH, ±10%, 1008 Coilcraft 1008PS-224KL L4 IND,1 mH, ±20%, LPS4018 Coilcraft LPS4018-105ML L10 IND,33 µH, ±10%, 0805 Coilcraft 0805PS-333KL Q1,Q2 FET,SM,SOT-23 NXP BF862 Q3 NPN,SM,SOT-23 Fairchild Semi MMBTH10 R1 RES,10 MΩ, ±5%, 0603 Venkel CR0603-16W-106JT R3 RES,10 Ω, ±1%, 0402 Venkel CR0402-16W-10R0FT R4,R6,R7 RES,249 Ω, ±1%, 0402 Venkel CR0402-16W-2490FT R5 RES,4.7 kΩ, ±5%, 0402 Venkel CR0402-16W-472JT U1 QFN-24, SM Skyworks Si4740/41/42/43/44/45-C10 California Micro Device CM1213 Optional: Additional ESD Protection U2,U4 ESD DIODE ARRAY, SM Optional: Without WBRX Optimization L2 IND, 33 nH, ±5%, 0603 Pulse PE-0603CD330JTT L5 RES, 0 , 0603 Venkel CR0603-16W-000T Optional: Si4742/43 WBRX Optimization L2 IND, 100 nH, ±5%, 0603 Pulse PE-0603CD101JTT L5 IND, 150 nH, ±5%, 0603 Pulse PE-0603CD151JTT TI SN74LVC1G17DBV Optional: Passive Only Antenna Attenuation U5 BUFFER, SOT-23 Optional: FM Intrusion on AM C10 CAP,3.9 pF, ±0.25 pF, 0402,COG Venkel C0402C0G500-3R9CNE L6,L7 IND, 6.8 µH, ±10%, 0805 Coilcraft 0805PS-682KL Note: Specific part numbers are provided as a reference to the Si4743-C EVB. Other suppliers may be substituted. 18 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Table 13. Si4740/41/42/43/44/45-C10 Bill of Materials (Continued) Reference Description Manufacturer Part Number #388BN-1211Z Optional: Mains Trap on AM L8 IND,47 mH, ±6%, L7PD Toko R11 RES,10 kΩ,±5%,0402 Venkel CR0402-16W-103JT Optional: Software Selectable Active/Passive Antenna Attenuation R8 RES,1 Ω, ±1%, 0402 Venkel CR0402-16W-1R00FT R9 RES,249 Ω, ±1%, 0402 Venkel CR0402-16W-2490FT Q4 NPN,SM,SOT-23 Fairchild Semi MMBTH10 U3 QUAD GATE, 14TSSOP TI SN74LVC02APW Optional: Si4742/43/44/45 LW Support L9 IND, 2.7 mH, ±10%, 0807 Coilcraft RFB0807-272L R10 RES,249 Ω, ±1%, 0402 Venkel CR0402-16W-2490FT Q5 PNP, SM, SOT-23 Fairchild Semi MMBTH81 Note: Specific part numbers are provided as a reference to the Si4743-C EVB. Other suppliers may be substituted. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 19 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4. Description 4.1. Introduction The Si474x AM/LW/SW/FM/WB receiver family offers 100% CMOS receiver integrated circuits (IC), providing the full receive functionality from antenna to audio for use in the automotive market. The family includes a portfolio of highly integrated receivers for primary AM/FM receivers that support worldwide broadcast audio bands and corresponding attributes including AM/FM and "college bands" down to 64 MHz, long wave, NOAA weather band, and dedicated companion RDS background receivers. The entire portfolio is layout compatible and is offered in a very small 4 x 4 x 0.85 mm 24-pin QFN package. Refer to "7. Ordering Guide" on page 39 for the corresponding part numbers. The Si474x family implements Skyworks' proven and internationally patented digital low intermediate frequency (low-IF) receiver architecture. Skyworks has shipped over 100 million broadcast audio receivers worldwide using this architecture. The low-IF architecture delivers superior performance while integrating the great majority of external components required by competing solutions. The Si474x products are feature-rich solutions, providing both highly automated performance, according to Skyworks' recommended settings, and extensive flexibility for customized audio and system performance. Programmable algorithms include advanced seek with multiple signal qualifiers and thresholds in all supported bands, FM stereo blend rates and thresholds, soft mute characteristics, multipath detection and mitigation, AM/FM noise blankers, and selectable FM Hi-cut filters. The part accepts programmable reference clock values. The IC provides audio output in standard line-level analog audio using high fidelity stereo DACs or digital audio format. The Si4741, Si4743, Si4745, and all other family parts ending with an odd number, offer a fully-integrated preprocessor for the European Radio Data System (RDS) and the North American Radio Broadcast Data System (RBDS). The RDS preprocessor includes all symbol decoding, advanced error-correction, detailed visibility to block-error rates (BLER), synchronization status and times, and complete, decoded and errorcorrected RDS group presentation. The Si474x RDSenabled parts also offer several modes of operation for various applications which require more or less visibility to the RDS status and group data. Table 14. Si4740/41/42/43/44/45 Product Family Feature FM band coverage Si4740 Si4741 Si4742 Si4743 Si4744 Si4745        FM RDS reception       LW band coverage     SW band coverage     WB (w/o SAME) band coverage   AM band coverage   FM multi-path detection and stereo/mono blend mitigation       Advanced stereo-mono blend       Advanced soft mute       Hi-cut     FM noise blanker     AM noise blanker     2 Digital audio I S    20 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.2. Block Diagram and Functional Description Si474x FMI RDS LNA WEAK SIGNAL CONDITION AGC ADC AMI LNA GND AGC DOUT DIGITAL AUDIO DFS DCLK DAC ROUT DAC LOUT DSP ADC AGC VDD LDO AFC QUALITY DETECTOR CNTRL GPO1-3 VIO RST RCLK GND SEN SCLK SDIO 3.0–3.6 V Figure 10. Functional Block Diagram The Si474x IC family integrates the voltage controlled oscillator (VCO) and frequency synthesizer and accepts a wide range of programmable reference clocks (RCLK). The frequency synthesizer generates the quadrature local oscillator signal used to downconvert the RF input to a low intermediate frequency. The VCO frequency is locked to the RCLK and adjusted with an automatic frequency control (AFC) servo loop during reception. The VCO frequency is modified according to the programmed target frequency. The Si474x family uses a digital low-IF architecture that integrates the entire receive chain for AM MW, AM LW, AM SW, FM, and weather band, and eliminates the requirement for expensive external ceramic filters found in competing solutions. The IC also integrates the majority of external components and performs all processing in an on-chip digital signal processor (DSP) and 8051 microcontroller (MCU) core. The analog chains for AM and FM include dedicated low-noise amplifiers (LNA), automatic gain control (AGC), image-reject quadrature mixers, programmable gain amplifiers (PGA), and a set of delta-sigma analogto-digital converters (ADCs). The FM and AM LNA blocks receive wide-band frequency inputs at the FMI and AMI input pins respectively. For AM, an on-chip varactor and resistor array control the gain of the external AM antenna network. For FM, the external network is designed to provide a small boost to the FM band. The LNA gain is dynamically controlled by the AGC loop, contingent on the RF peak detectors and signal strength. Each receive path continues to dedicated quadrature mixers which downconvert the received signal from RF to low-IF, filter for out-of-band interferers, and perform a transfer function to shift the tuned frequency to dc. A pair of PGAs filters the mixer output from interferers and amplifies the signal again before delivering it to two high resolution ADCs. The ADCs generate high dynamic range signals and deliver them to the digital core for additional processing. The digital core consists of a DSP, 8051 MCU core, memory access controller, control interface circuitry, and general programming interface functionality. The MCU works in conjunction with the DSP to provide access to signal quality indicators and system behavior, as well as managing the IC control interface and communication with the host processor. The Si474x digital core performs channel selection and filtering for all supported worldwide bands. The digital core calibrates tuning and performs AM/FM demodulation and FM stereo MPX audio processing. The digital core also performs signal quality processing including received signal strength indicators, impulse detection, SNR calculations, volume control, mute, and additional digital filtering. The Si4740 supports FM deemphasis of 50 or 75 µs. The stereo digital audio signal is then converted back to Left (L) and Right (R) analog with a pair of high resolution, digital-to-analog converters (DACs) and is available as line-level audio on the LOUT and ROUT pins. Additionally, the stereo digital audio is also provided via an I2S interface (Si4741/43/45 only). The device supports I2C-compatible 2-wire control interface and SPI 3-wire control interface. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 21 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.3. FM Receiver Front-end 4.6. Digital Audio Interface (Si4741/43/45 only) The Si474x family integrates the entire FM receive chain from antenna to audio out. The FM band is received on the FMI pin via an input coupling network with the recommended application circuit. This input coupling network isolates the FM band for best performance. The LNA supports US, Europe, Japan, OIRT, and Rest of World FM broadcast bands (64 to 108 MHz). The AGC circuit automatically controls the LNA gain to optimize sensitivity and rejection of strong interferers. For testing purposes, the AGC can be disabled. Refer to “AN388: Si470X/1X/2X/3X/4X Evaluation Board Test Procedure” for Si474x testing procedures. 4.4. AM Receiver Front-end The Si474x family provides an integrated LNA, which works in conjunction with an external cascode amplifier to provide an AM receive chain from antenna to audio out. There are very few external components and no manual alignment required. The AM signal is received on the AMI pin via a cascode amplifier external circuit. The cascode circuit degeneration is automatically adjusted via the AGC pin as shown in Section "2. Typical Application Schematic" on page 17. The amount of degeneration depends on the signal strength. An additional GPO1 signal is used to attenuate the signal via a shunt for very strong signal handling when the signal exceeds the AGC pin degenerative control of the cascode amplifier stage. 4.5. Received Signal Qualifiers A tuned signal's quality can vary with the environmental conditions, time of day, and position of the antenna among many other factors. To adequately manage the audio output and avoid unpleasant audible effects to the end-user, the Si474x monitors and provides indicators of the signal quality, allowing the host processor to perform additional processing if required by the customer. The Si474x monitors and reports a set of standard industry signal quality metrics including RSSI, SNR, and multi-path interference on FM signals. The digital audio interface operates in slave mode and supports three different audio data formats: I2S  Left-Justified  DSP Mode  4.6.1. Audio Data Formats In I2S mode, by default the MSB is captured on the second rising edge of DCLK following each DFS transition. The remaining bits of the word are sent in order, down to the LSB. The left channel is transferred first when the DFS is low, and the right channel is transferred when the DFS is high. In Left-Justified mode, by default the MSB is captured on the first rising edge of DCLK following each DFS transition. The remaining bits of the word are sent in order, down to the LSB. The left channel is transferred first when the DFS is high, and the right channel is transferred when the DFS is low. In DSP mode, the DFS becomes a pulse with a width of one DCLK period. The left channel is transferred first, followed right away by the right channel. There are two options in transferring the digital audio data in DSP mode: the MSB of the left channel can be transferred on the first rising edge of DCLK following the DFS pulse or on the second rising edge. In all audio formats, depending on the word size, DCLK frequency and sample rates, there may be unused DCLK cycles after the LSB of each word before the next DFS transition and MSB of the next word. In addition, if preferred, the user can configure the MSB to be captured on the falling edge of DCLK via properties. The number of audio bits can be configured for 8, 16, 20, or 24 bits. 4.6.2. Audio Sample Rates The device supports a number of industry-standard sampling rates including 32, 40, 44.1, and 48 kHz. As with other Si474x features, how these variables are used to improve audio performance can be left to the Skyworks on-chip algorithms (recommended), or they can be brought out for host-processor instructions. 22 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 (OFALL = 1) INVERTED DCLK (OFALL = 0) DCLK LEFT CHANNEL DFS I2S (OMODE = 0000) RIGHT CHANNEL 1 DCLK DOUT 1 DCLK 1 2 n-2 3 n-1 MSB n 1 LSB MSB 2 n-2 3 n-1 n LSB Figure 11. I2S Digital Audio Format (OFALL = 1) INVERTED DCLK (OFALL = 0) DCLK DFS LEFT CHANNEL RIGHT CHANNEL Left-Justified (OMODE = 0110) 1 DOUT 2 3 n-2 n-1 MSB n 1 LSB MSB 2 n-2 3 n-1 n LSB Figure 12. Left-Justified Digital Audio Format (OFALL = 0) DCLK DFS RIGHT CHANNEL LEFT CHANNEL (OMODE = 1100) DOUT (MSB at 1st rising edge) 1 2 3 n-2 n-1 MSB DOUT (MSB at 2nd rising edge) 1 LSB MSB n-1 n 1 LSB MSB 2 3 n-2 1 MSB 2 3 n-2 n-1 n LSB LEFT CHANNEL 1 DCLK (OMODE = 1000) n RIGHT CHANNEL 2 3 n-2 n-1 n LSB Figure 13. DSP Digital Audio Format Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 23 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.7.2. Stereo-Mono Blending The output of the FM demodulator is a stereo multiplexed (MPX) signal. The MPX standard was developed in 1961, and is used worldwide. Today's MPX signal format consists of left + right (L+R) audio, left – right (L–R) audio, a 19 kHz pilot tone, and RDS/RBDS data as shown in Figure 14 below. Adaptive noise suppression is employed to gradually combine the stereo (L–R) audio signal to a mono (L+R) audio signal as the signal quality degrades to maintain optimum sound fidelity under varying reception conditions. Three metrics, received signal strength indicator (RSSI), signal-to-noise ratio (SNR), and multipath interference, are monitored simultaneously in forcing a blend from stereo to mono. The metric which reflects the minimum signal quality takes precedence and the signal is blended appropriately. Modulation Level 4.7. Stereo Audio Processing Mono Audio Left + Right 0 Stereo Pilot 15 19 23 Stereo Audio Left - Right 38 RDS/ RBDS 53 57 Frequency (kHz) Figure 14. MPX Signal Spectrum 4.7.1. Stereo Decoder The Si4740/41/42/43/44/45-C10's integrated stereo decoder automatically decodes the MPX signal using DSP techniques. The 0 to 15 kHz (L+R) signal is the mono output of the FM tuner. Stereo is generated from the (L+R), (L–R), and a 19 kHz pilot tone. The pilot tone is used as a reference to recover the (L–R) signal. The left and right channels are obtained by adding and subtracting the (L+R) and (L–R) signals, respectively. All three metrics have programmable stereo/mono thresholds and attack/release rates as shown in the Table 15 and Table 16. If a metric falls below its mono threshold, the signal is blended from stereo to full mono. If all metrics are above their respective stereo thresholds, then no action is taken to blend the signal. If a metric falls between its mono and stereo thresholds, then the signal is blended to the level proportional to the metric’s value between its mono and stereo thresholds, with an associated attack and release rate. Figure 15, “Stereo-Mono Blend Based on Active Monitoring of RSSI, SNR, and Multi-Path Interference,” on page 25 illustrates the stereo-mono blend. Stereo/mono status can be monitored with the FM_RSQ_STATUS command. Table 15. Blend Threshold Properties RSSI FM_BLEND_RSSI_STEREO_THRESHOLD FM_BLEND_RSSI_MONO_THRESHOLD SNR FM_BLEND_SNR_STEREO_THRESHOLD FM_BLEND_SNR_MONO_THRESHOLD Multi-path interference FM_BLEND_MULTIPATH_STEREO_THRESHOLD FM_BLEND_MULTIPATH_MONO_THRESHOLD Table 16. Blend Attack/Release Rate Properties RSSI FM_BLEND_RSSI_ATTACK_RATE FM_BLEND_RSSI_RELEASE_RATE SNR FM_BLEND_SNR_ATTACK_RATE FM_BLEND_SNR_RELEASE_RATE Multi-path interference FM_BLEND_MULTIPATH_ATTACK_RATE FM_BLEND_MULTIPATH_RELEASE_RATE 24 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 100% Stereo level RSSI RSSI Stereo level RSSI Blend attack rate/ Blend release rate 0% Mono Stereo RSSI Thld Thld SNR Stereo level 100% SNR Stereo level SNR Blend attack rate/ Blend release rate 0% Mono Thld SNR 100% MP Stereo level MP Blend attack rate/ Blend release rate Stereo level Multi-path Interference (MP) Stereo Thld Min gain level with associated attack or release rate 0% Stereo Mono Thld Thld MP L-R gain = F L-R - + (1+F )R + (1-F )L + (1+F )L + (1-F )R + + L+R + Figure 15. Stereo-Mono Blend Based on Active Monitoring of RSSI, SNR, and Multi-Path Interference Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 25 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.8. De-emphasis 4.9. Stereo DACs De-emphasis is a technique used by FM broadcasters to improve the signal-to-noise ratio of FM receivers by reducing the effects of high-frequency interference and noise. When the FM signal is transmitted, a preemphasis filter is applied to accentuate the high audio frequencies. The Si474x incorporates a de-emphasis filter which attenuates high frequencies to restore a flat frequency response. Two time constants are used in various regions. The de-emphasis time constant is programmable to 50 or 75 µs and is set by the FM_DEEMPHASIS property. High-fidelity stereo digital-to-analog converters (DACs) drive analog audio signals onto the LOUT and ROUT pins. The audio output may be muted. Volume is adjusted digitally with the RX_VOLUME property. It is necessary that the volume be maintained at maximum levels to ensure the highest dynamic range audio outputs to the external audio processing stage in a car radio. 4.10. Soft Mute Attenuation level The soft mute feature is available to attenuate the audio outputs and minimize audible noise in very weak signal conditions. This process is shown conceptually in Figure 16. The Si474x triggers soft mute feature by monitoring the SNR metric. The SNR threshold for activating soft mute is programmable, as are soft mute attenuation levels and attack and release rates. The Si474x provides the soft mute feature in FM and AM bands. Maximum Attenuation Soft mute threshold SNR Figure 16. Soft Mute Based on Active Monitoring of SNR 26 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.11. Seek and Valid Station Qualification 4.12. FM Hi-Cut Control (Si4742/43/44/45 only) The seek function will search up or down the selected frequency band for a valid channel. A valid channel is qualified according to a series of programmable signal indicators and thresholds. The seek function can be made to stop at the band edge and provide an interrupt, or wrap the band and continue seeking until arriving at the original departure frequency. The device sets interrupts with found valid stations, or if the seek results in zero found valid stations, the device indicates failure and again sets an interrupt. The Si474x seek functionality is performed completely on-chip or can be brought out to a companion processor. The Si474x can provide base values for signal quality variables to a companion processor for qualification or can further process the base values to qualify valid or invalid stations. Hi-cut control is employed on audio outputs with degradation of the signal due to low SNR and/or multipath interference. Two metrics, SNR and multi-path interference, are monitored concurrently in forcing hi-cut of the audio outputs. Programmable minimum and maximum thresholds are available for both metrics. The transition frequency for hi-cut is also programmable with up to seven hi-cut filter settings. A single set of attack and release rates for hi-cut are programmable for both metrics from a range of 2 ms to 64 s. Figure 17, “FM HiCut Based on Active Monitoring of SNR and Multi-Path Interference,” illustrates hi-cut. The level of hi-cut applied can be monitored with the FM_RSQ_STATUS command. Hi-cut can be disabled by setting the hi-cut filter setting to the default audio bandwidth of 15 kHz. The Si474x uses RSSI, SNR, and AFC to qualify stations. Most of these metrics have programmable thresholds to tailor the seek function to the subjective tastes of customers. RSSI is employed first to screen all possible candidate stations. SNR and AFC are subsequently used in screening the RSSI qualified stations. The more thresholds the system engages, the higher the confidence that any found stations will indeed be valid broadcast stations; however, the more challenging levels the thresholds are set to, the longer the overall seek time as more stations and more qualifiers will be assessed. It is recommended that RSSI be set to a midlevel threshold in conjunction with an SNR threshold set to a level delivering acceptable audio performance. This trade-off will eliminate very low RSSI stations whilst keeping the seek time to acceptable levels. Generally, the time to auto-scan and store valid channels for an entire AM or FM band with all thresholds engaged is very short depending on the band content. Seek is initiated using the FM_SEEK_START or AM_SEEK_START commands. The RSSI and SNR threshold settings are adjustable using properties. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 27 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 SNR Cutoff frequency level 15 kHz SNR Prog. cutoff SNR Lo Thld High SNR Thld 20 kHz Attack & Release rate Multi-path Cutoff frequency level Multi-path 15 kHz Interference (MP) Prog. cutoff Trigger Thld High Thld Min cutoff freq level with associated attack or release rate Multi-path interference MP L+R L-R Figure 17. FM Hi-Cut Based on Active Monitoring of SNR and Multi-Path Interference 28 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.13. AM/FM Noise Blanker (Si4742/43/44/45 only) 4.13.1. FM Noise Blanker Property Settings In an automotive environment, noise spikes from engine ignition and/or various other electrical sources can significantly impair and disrupt the audio output. The Si4742/43/44/45 includes a noise blanker to mitigate or eliminate these noise spikes and audible artifacts. Figure 18 shows a conceptual flow chart for the Si4742/43/44/45 noise blanking function. The Si4742/43/44/45 offers five properties for configuring the AM and FM noise blankers including detection threshold, blanking interval, trigger rate, noise-floor bandwidth, and delay. Each property is configurable for adopting customers to refine and apply unique noiseblank behavior. The FM noise blanker detection threshold property sets the level threshold for detection of the noise impulses/spikes in dB from a range of 1 dB to 90 dB above the noise floor. The FM noise blank rate property sets the maximum rate in Hz at which the noise blanker is triggered from a range of 100 Hz to 6400 Hz. The FM noise blank interval property sets the noise blanking interval in microseconds at which the original samples are replaced by interpolated "clean" samples from a range of 8 µs to 48 µs. The FM noise blanker IIR filter property sets the noise floor bandwidth from a range of 390 Hz to 2480 Hz. This property sets the rms noise floor above which the noise impulse level detect threshold is set for noise impulse detection. The FM noise blank delay property sets the delay in microseconds in applying impulse blanking to the original samples, which allows for insertion and alignment of the blanked samples with the original sampled signal. The range of values for FM noise blanker delay is 125 µs to 219 µs. Multi-path Inteference Detection FM Demod Pilot PLL HPF Ultrasonic noise Pilot notch filter Noise impulse blanker Audio Filter & Hi-cut L Stereo Decode R Figure 18. Illustration of Noise Blanker in FM Signal Path Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 29 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 FM MPX waveform with noise impulses FM MPX waveform after noise blanker FM noise blanker delay is set to calibrate the delay from the noise blanker for proper time alignment and insertion of blanked samples into original signal. Noise impulse threshold Noise floor threshold MPX waveform after HPF stage Figure 19. Illustration of FM Noise Blanker Property Settings for Proper Detection of Noise Impulses (FM MPX waveforms are offset vertically for illustration purposes) 30 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.13.2. AM Noise Blanker Property Settings The AM noise blanker detection threshold property sets the level threshold for detection of the noise impulses/spikes in dB from a range of 1 dB to 90 dB above the noise floor. The AM noise blank rate property sets the maximum rate in Hz at which the noise blanker is triggered from a range of 100 Hz to 6400 Hz. The AM noise blank interval property sets the blanking interval in microseconds at which the original samples are replaced by previous samples using a "sample and hold" scheme from a range of 15 µs to 110 µs. The AM noise blanker IIR filter property sets the noise floor bandwidth from a range of 300 Hz to 2480 Hz. This property sets the rms noise floor above which the noise impulse level detect threshold is set for noise impulse detection. The AM noise blank delay property sets the delay in microseconds in applying impulse blanking to the original samples, which allows for insertion and alignment of the blanked samples with the original sampled signal. The range of values for the AM noise blanker delay is 125 µs to 219 µs. HPF/Impulse Noise Detector I/Q Noise Blanker Channel Filter AM Demod Audio Figure 20. Illustration of Noise Blanker in AM Signal Path. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 31 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 AM waveform with noise impulses AM waveform after noise blanker AM noise blank delay is set to calibrate the delay from the noise blanker for proper time alignment and insertion of blanked samples into original signal. Noise impulse threshold Noise floor threshold AM waveform after HPF Figure 21. Illustration of AM Noise Blanker Property Settings for Proper Detection of Noise Impulses (AM Waveforms are Offset Vertically for Illustration Purposes) 32 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.14. Programming Section To ease development time and offer maximum customization, the Si474x provides a simple and powerful software interface to program the receiver. The device is programmed using commands, arguments, properties, and responses. To perform an action, the user writes a command byte and associated arguments causing the chip to execute the given command. Commands control actions such as powerup, powerdown, or tune to a station. Arguments are specific to a given command and are used to modify the command. Properties are a special command + argument used to modify the default chip operation and are generally configured immediately after powerup. Examples of properties are de-emphasis, RSSI seek threshold, and soft mute attenuation. Responses provide information and are echoed after a command + arguments are issued and processed. All commands provide a one-byte status update indicating interrupt and clear-to-send status information. For a detailed description of the commands and properties for the Si474x, see "AN332: Si47xx Programming Guide" and “AN344: Si4706/07/4x Programming Guide.” 4.15. Reset, Powerup, and Powerdown Setting the RST pin low will disable analog and digital circuitry, reset the registers to their default settings, and disable the bus. Setting the RST pin high will bring the device out of reset. The powerup mode powers up the device and provides mode selection. Mode selections include AM, FM, or WB receiver and analog or digital audio output. A powerdown mode is available to reduce power consumption when the part is idle. Putting the device in powerdown mode will disable analog and digital circuitry while keeping the bus active. 4.16. GPO 1–3 The GPO 1–3 pins can be set to output a constant low or high output, or optionally be set to provide a hardware interrupt to the controller such as scan complete, stereo/mono indicator, and RDS/RBDS. After reset and POWER_UP into AM receiver mode, GPO1 is reserved for AM AGC external attenuator control. 4.17. RDS/RBDS Advanced Processor The Si4741/43/45 implements an advanced, patented, high-performance RDS processor for demodulation, symbol decoding, block synchronization, error detection, and error correction. The RDS decoder applies advanced decoding and statistical decision techniques to provide very high-performance synchronization at very noisy signal levels, and excellent sensitivity at industry-standard block error rate (BLER) levels (5%). The Si4741/43/45’s strong synchronization performance in very noisy/low SNR environments minimizes the number of instances of lost synchronization. Other less robust tuners must attempt to resynchronize in low SNR environments, resulting in lost data and lengthy delays in reestablishing data reception. The Si4741/43/45 maintains synchronization to the RDS transmission, despite high BLER. This results in fewer dropped connections, minimal resynchronization time, and greater data reliability in low SNR environments. Figure 22 illustrates the benefits of the Si4741/43/45 robust synchronization persistence. The Si4741/43/45 decoder additionally provides more reliable data decoding performance in low carrier to noise (CNR) environments. This results in very low decoder implementation loss figures and substantial improvements over other RDS standard implementations. Figure 23 illustrates the Si4741/43/45 RDS decoder performance. The decoder failure probability drops significantly when compared to a standard RDS decision-based decoder for given energy per bit/noise density (Eb/No). The Si4741/43/45 report RDS decoder synchronization status and detailed bit errors for each RDS block. The range of reportable bit errors detected and corrected are 0, 1-2, 3-5, and “not correctable.” More than five errors indicates that the corresponding block information word is non-correctable. The Si4741/43/45 also provides highly configurable interrupts based on RDS-driven events and conditions. The default settings provide an interrupt when RDS is synchronized and when RDS group data has been received. The configurable interrupts can be set to provide frequent interrupts down to a single received block with BLER. The configurable interrupts also can be set to provide very infrequent interrupts, buffering up to 25 complete RDS groups (100 blocks) with BLER by block in the on-chip FIFO. The Si4741/43/45 also provides configurable interrupts on changes or receipt of the key RDS blocks A and B. This flexibility allows adopters to either conduct extensive RDS data processing on the host or reserve the host processor in power-saving modes with minimal RDS interrupts, allowing the Si4741/43/45 to perform RDS processing on-chip. Interrupt configuration and thresholds are covered in “AN332: Si47xx Programming Guide” and “AN344: Si4706/07/4x Programming Guide,” offered under NDA. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 33 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 Re-synchronization time in traditional RDS decoder Si4741/43/45 advanced RDS decoder with persistent synchronization delivers data during “dead time” SNR SNR at which traditional RDS decoder declares block decoding failure and Sync loss. time SNR at which Si4741/43/45 decoder declares Sync loss. Figure 22. Illustrative Si4741/43/45 Advanced RDS Synchronization Decoder Failure Probability 1.E+00 Probability 1.E-01 1.E-02 RDS standard limits 1.E-03 Standard-compliant advanced decoder (Skyworks generation 1) Si474x advanced decoder 1.E-04 0 1 2 3 4 5 6 Eb/N0 Figure 23. Si4741/43/45 Decoder Performance 34 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.18. Reference Clock 4.19.1. 2-Wire Control Interface Mode The Si4740/41/42/43/44/45-C10 reference clock is programmable, supporting RCLK frequencies in Table 12. Refer to Table 3, “DC Characteristics,” on page 5 for switching voltage levels and Table 9, “FM Receiver Characteristics,” on page 12 for frequency tolerance information. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. Also, a start condition must not occur within 300 ns before the rising edge of RST. 4.19. Control Interface A serial port slave interface is provided, which allows an external controller to send commands to the Si474x and receive responses from the device. The serial port can operate in three bus modes: 2-wire mode, 3-wire mode, or SPI mode. The Si474x selects the bus mode by sampling the state of the GPO1 and GPO2 pins on the rising edge of RST. The GPO1 pin includes an internal pull-up resistor, which is connected while RST is low. The GPO2 pin includes an internal pull-down resistor, which is connected while RST is low. Therefore, it is only necessary for the user to actively drive pins which differ from these states. See Table 17. Table 17. Bus Mode Select on Rising Edge of RST Bus Mode GPO1 GPO2 2-Wire 1 0 SPI 1 1 (must drive) 3-Wire 0 (must drive) 0 After the rising edge of RST, the pins GPO1 and GPO2 are used as general purpose output (O) pins. After reset and POWER_UP into AM receiver mode, GPO1 is reserved for AM AGC external attenuator control. In any bus mode, commands may only be sent after VIO and VDD supplies are applied. In any bus mode, before sending a command or reading a response, the user must first read the status byte to ensure that the device is ready (CTS bit is high). The 2-wire bus mode uses only the SCLK and SDIO pins for signaling. A transaction begins with the START condition, which occurs when SDIO falls while SCLK is high. Next, the user drives an 8-bit control word serially on SDIO, which is captured by the device on rising edges of SCLK. The control word consists of a 7-bit device address, followed by a read/write bit (read = 1, write = 0). The Si474x acknowledges the control word by driving SDIO low on the next falling edge of SCLK. Although the Si474x will respond to only a single device address, this address can be changed with the SEN pin (note that the SEN pin is not used for signaling in 2-wire mode). When SEN = 0, the 7-bit device address is 0010001b. When SEN = 1, the address is 1100011b. For write operations, the user then sends an 8-bit data byte on SDIO, which is captured by the device on rising edges of SCLK. The Si474x acknowledges each data byte by driving SDIO low for one cycle, on the next falling edge of SCLK. The user may write up to 8 data bytes in a single 2-wire transaction. The first byte is a command, and the next seven bytes are arguments. For read operations, after the Si474x has acknowledged the control byte, it will drive an 8-bit data byte on SDIO, changing the state of SDIO on the falling edge of SCLK. The user acknowledges each data byte by driving SDIO low for one cycle, on the next falling edge of SCLK. If a data byte is not acknowledged, the transaction will end. The user may read up to 16 data bytes in a single, 2wire transaction. These bytes contain the response data from the Si474x. A 2-wire transaction ends with the STOP condition, which occurs when SDIO rises while SCLK is high. For details on timing specifications and diagrams, refer to Table 5, “2-Wire Control Interface Characteristics,” on page 7; Figure 2, “2-Wire Control Interface Read and Write Timing Parameters,” on page 8, and Figure 3, “2Wire Control Interface Read and Write Timing Diagram,” on page 8. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 35 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 4.19.2. 3-Wire Control Interface Mode 4.19.3. SPI Control Interface Mode When selecting 3-wire mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. When selecting SPI mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST. The 3-wire bus mode uses the SCLK, SDIO and SEN_ pins. A transaction begins when the user drives SEN low. Next, the user drives a 9-bit control word on SDIO, which is captured by the device on rising edges of SCLK. The control word consists of a 3-bit device address (A7:A5 = 101b), a read/write bit (read = 1, write = 0), and a 5-bit register address (A4:A0). SPI bus mode uses the SCLK, SDIO, and SEN pins for read/write operations. The system controller can choose to receive read data from the device on either SDIO or GPO1. In AM Receiver mode, only SIDIO is available; GPO1 is reserved for AM AGC external attenuator control. A transaction begins when the system controller drives SEN = 0. The system controller then pulses SCLK eight times, while driving an 8-bit control byte serially on SDIO. The device captures the data on rising edges of SCLK. The control byte must have one of five values: For write operations, the control word is followed by a 16-bit data word, which is captured by the device on rising edges of SCLK. For read operations, the control word is followed by a delay of one-half SCLK cycle for bus turn-around. Next, the Si474x will drive the 16-bit read data word serially on SDIO, changing the state of SDIO on each rising edge of SCLK. A transaction ends when the user sets SEN high, then pulses SCLK high and low one final time. SCLK may either stop or continue to toggle while SEN is high. In 3-wire mode, commands are sent by first writing each argument to register(s) 0xA1–0xA3, then writing the command word to register 0xA0. A response is retrieved by reading registers 0xA8–0xAF. For details on timing specifications and diagrams, refer to Table 6, “3-Wire Control Interface Characteristics,” on page 9; Figure 4, “3-Wire Control Interface Write Timing Parameters,” on page 9, and Figure 5, “3-Wire Control Interface Read Timing Parameters,” on page 9.  0x48 = write a command (controller drives 8 additional bytes on SDIO).  0x80 = read a response (device drives one additional byte on SDIO).  0xC0 = read a response (device drives 16 additional bytes on SDIO).  0xA0 = read a response (device drives one additional byte on GPO1).  0xE0 = read a response device drives 16 additional bytes on GPO1). For write operations, the system controller must drive exactly eight data bytes (a command and seven arguments) on SDIO after the control byte. The data is captured by the device on the rising edge of SCLK. For read operations, the controller must read exactly 1 byte (STATUS) after the control byte or exactly 16 data bytes (STATUS and RESP1–RESP15) after the control byte. The device changes the state of SDIO (or GPO1, if specified) on the falling edge of SCLK. Data must be captured by the system controller on the rising edge of SCLK. Keep SEN low until all bytes have transferred. A transaction may be aborted at any time by setting SEN high and toggling SCLK high and then low. Commands will be ignored by the device if the transaction is aborted. For details on timing specifications and diagrams, refer to Figure 6 and Figure 7 on page 10. 36 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 5. Commands and Properties Refer to "AN332: Si47xx Programming Guide" and “AN344: Si4706/07/4x Programming Guide.” Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 37 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 NC NC NC GPO1/AGC2 GPO2/INT GPO3/DCLK 6. Pin Descriptions: Si4740/41/42/43/44/45-C10-GM 24 23 22 21 20 19 FMI 1 18 DFS 17 DOUT RFGND 2 AGC1 3 16 LOUT GND PAD NC 4 15 ROUT GND 5 14 GND 8 9 10 11 12 SEN SCLK SDIO RCLK VIO 13 VDD 7 RST AMI 6 Table 18. Si4740/41/42/43/44/45-C10-GM Pin Descriptions Pin Number(s) Name Description 1 FMI 2 RFGND 3 AGC1 4, 22–24 NC 5, 14, GND PAD GND Ground. Connect to ground plane on PCB. 6 AMI AM RF input. 7 RST Device reset (active low) input. 8 SEN Serial enable input (active low). 9 SCLK Serial clock input. 10 SDIO Serial data input/output. 11 RCLK External reference oscillator input. 12 VIO I/O supply voltage. 13 VDD Supply voltage. May be connected directly to battery. 15 ROUT Right audio line output. 16 LOUT Left audio line output. 17 DOUT Digital output data in digital output audio mode (Si4741/43/45 only). No connect if not used. 18 DFS Digital frame synchronization input in digital output mode (Si4741/43/45 only). No connect if not used. 19 GPO3/DCLK 20 GPO2/INT 21 GPO1/AGC2 FM RF inputs. FMI should be connected to the antenna trace. RF ground. Connect to ground plane on PCB. Automatic gain control. See "2. Typical Application Schematic" on page 17. No connect. Leave floating. General purpose output/Digital bit synchronous clock input in digital output mode (Si4741/43/45 only). General purpose output/interrupt pin. General purpose output/AM external attenuator control. 38 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 7. Ordering Guide Part Number1,2 Description Package Type Operating Temperature Si4740-C10-AM AM/FM Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4741-C10-AM AM/FM Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4742-C10-AM AM/FM/LW/SW/WB Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4743-C10-AM AM/FM/LW/SW/WB Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4744-C10-AM AM/FM/SW/LW Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4745-C10-AM AM/FM/SW/LW Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN, AEC-Q100 qualification, IMDS Registration, PPAP documentation QFN Pb-free –40 to 85 °C Si4740-C10-GM AM/FM Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Si4741-C10-GM AM/FM Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Si4742-C10-GM AM/FM/LW/SW/WB Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Si4743-C10-GM AM/FM/LW/SW/WB Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Si4744-C10-GM AM/FM/SW/LW Broadcast Automotive Radio Receiver 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Si4745-C10-GM AM/FM/SW/LW Broadcast Automotive Radio Receiver with RDS/RBDS 4 x 4 x 0.825 24-pin QFN QFN Pb-free –40 to 85 °C Notes: 1. Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. 2. AM numbered devices receive full automotive quality production status, including AEC-Q100 qualification, registration with International Material Data System (iMDS), and Part Production Approval Process (PPAP) documentation. PPAP documentation is available at www.skyworksinc.com with a registered and NDA approved user account. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 39 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 8. Package Markings 8.1. Si4740/41/42/43/44/45-C10 Top Mark 4740C10 4741C10 4742C10 4743C10 4744C10 4745C10 YYWWRF YYWWRF YYWWRF YYWWRF YYWWRF YYWWRF AIXX AIXX AIXX AIXX AIXX AIXX Figure 24. Si4740/41/42/43/44/45-C10 Top Mark 8.2. Top Mark Explanation Mark Method: YAG Laser Line 1 Marking: Customer Part Number (Right-justify) 4740 = Si4740 4741 = Si4741 4742 = Si4742 4743 = Si4743 4744 = Si4744 4745 = Si4745 C = Part revision C 10 = Firmware revision 1.0 Line 2 Marking: YY = Year WW = Workweek Assigned by the Assembly House. Corresponds to the year and workweek of the mold date. R = Die Rev F = Wafer Fab First two characters of the Manufacturing Code from the Assembly Purchase Order form. Line 3 Marking: Circle = 0.5 mm Diameter Pin 1 Identifier. (Bottom-Left Justified) A = Assembly House I = Internal Code XX = Serial Lot Number Last four characters of the Manufacturing Code from the Assembly Purchase Order form. 40 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 9. Package Outline: Si4740/41/42/43/44/45-C10 QFN Figure 25 illustrates the package details for the Si4740/41/42/43/44/45-C10. Table 19 lists the values for the dimensions shown in the illustration. Figure 25. 24-Pin Quad Flat No-Lead (QFN) Table 19. Package Dimensions Dimension Min Nom Max A 0.80 0.85 0.90 A1 0.00 0.02 0.05 b 0.18 0.25 0.30 D D2 4.00 BSC 2.00 2.10 e 0.50 BSC E 4.00 BSC E2 2.00 2.10 2.20 2.20 L 0.30 0.40 0.50 L1 0.03 0.05 0.08 aaa — — 0.10 bbb — — 0.10 ccc — — 0.08 ddd — — 0.10 eee — — 0.10 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid State Outline MO-220, Variation VGGD-8. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 41 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 10. PCB Land Pattern: Si4740/41/42/43/44/45-C10 QFN Figure 26 illustrates the PCB land pattern details for the Si4740/41/42/43/44/45-C10-GM. Table 20 lists the values for the dimensions shown in the illustration. Figure 26. PCB Land Pattern Table 20. Dimensions for PCB Land Pattern Dimension Min Max Dimension Min Max — e 0.50 BSC. GE 2.93 E 3.62 REF. GD 2.93 — D 3.62 REF. X — 0.28 E2 2.00 2.20 D2 2.00 2.20 Y 0.69 REF ZE — 4.31 ZD — 4.31 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm. Notes: 1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm minimum, all the way around the pad. Notes: 1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 2. The stencil thickness should be 0.125 mm (5 mils). 3. The ratio of stencil aperture to land pad size should be 1:1 for the perimeter pads. 4. A 2 x 2 array of 0.90 mm square openings on 1.15 mm pitch should be used for the center ground pad. Notes: 1. A No-Clean, Type-3 solder paste is recommended. 2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. 42 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 11. Additional Reference Resources  Si47xx Customer Support Site: www.skyworksinc.com/en/Support Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 43 Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Si4740/41/42/43/44/45-C10 DOCUMENT CHANGE LIST Revision 0.1 to Revision 0.2             Added FM Hi-cut description. Added AM/FM Noise Blanker description. Updated “2. Typical Application Schematic”. Updated “3. Bill of Materials”. Added Digital Audio Output section. Removed crystal oscillator support. Updated block diagram. Updated pinout diagram. Updated “7. Ordering Guide”. Added package marking sections. Updated package outline section. Updated PCB land pattern section. Revision 0.2 to Revision 0.3   Updated Table 1 and updated Figures 3 and 12 to reflect supply voltage change to 3.6 V max. Updated Table 11. Updated Section “3. Bill of Materials”. Updated Section “7. Ordering Guide” Updated Section “8.1. Si4740/41/42/43/44/45-C10 Top Mark”  Updated Section “8.2. Top Mark Explanation”.    Revision 0.3 to Revision 0.5      Added SW band support to Features list. Updated Table 1 and all other figures and tables to reflect supply voltage change to 3.6 V max. Added Si4744/45 details. Updated Table 14 Updated Table 3, Table 9, and Table 11 Revision 0.5 to Revision 0.8  Updated Table 1 and all figures and tables to reflect. VIO change to 2.7 V min.  Updated Table 9, Table 10, and Table 13. Revision 0.8 to Revision 1.0  Numerous updates and corrections. 44 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.0 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • December 29, 2021 Connecting Everyone and Everything, All the Time Portfolio Quality Support & Resources www.skyworksinc.com www.skyworksinc.com/quality www.skyworksinc.com/support Copyright © 2021 Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. (“Skyworks”) products or services. These materials, including the information contained herein, are provided by Skyworks as a service to its customers and may be used for informational purposes only by the customer. Skyworks assumes no responsibility for errors or omissions in these materials or the information contained herein. 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