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SI4825-A10-CSR

SI4825-A10-CSR

  • 厂商:

    SILABS(芯科科技)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC RCVR AM/FM/SW MECH 16-SOIC

  • 数据手册
  • 价格&库存
SI4825-A10-CSR 数据手册
Si 4 8 2 5 - A10 B R O A D C A S T M E C H A N I C A L TU N I N G A M / F M / S W R A D I O R EC EIVER Features        Worldwide FM band support (64–109 MHz) Worldwide AM band support (504–1750 kHz) SW band support (2.3–28.5 MHz) No manual alignment necessary Mono audio output Selectable support AM/FM/SW regional bands Enhanced FM/SW band coverage Automatic frequency control (AFC) Integrated LDO regulator  2.0 to 3.6 V supply voltage  Wide range of ferrite loop sticks and air loop antennas supported  16-pin SOIC  RoHS-compliant  Direct volume control  Not EN55020 compliant* *Note: For consumer applications that require EN 55020 compliance, use Si483x.   Ordering Information: See page 14. Applications Pin Assignments Table and portable radios Mini/micro systems  CD/DVD players  Boom boxes Modules Clock radios  Mini HiFi  Entertainment systems     Si4825-A10 (SOIC) 16 AOUT 2 15 GND 3 14 VDD 4 13 XTALI NC 5 12 XTALO FMI 6 11 VOL- RFGND 7 10 VOL+ 8 9 RST TUNE1 The Si4825 is the entry level mechanical-tuned digital CMOS AM/FM/SW radio receiver IC that integrates the complete receiver function from antenna input to audio output. The Si4825 extends Silicon Laboratories multi-band tuner family, and further increases the ease and attractiveness of design radio reception to audio devices through small size and board area, minimum component count, and superior, proven performance. The Si4825 requires a simple application circuit and removes any requirements for manually tuning components during the manufacturing process. The receiver has very low power consumption, runs off two AAA batteries, and delivers the performance benefits of digital tuning to the analog radio market. Functional Block Diagram Si4825 Si4830/34 ADC AMI AM ANT 1 LNA_EN Description RFGND LNA DSP DAC AOUT TUNE2 BAND AMI This product, its features, and/or its architecture is covered by one or more of the following patents, as well as other patents, pending and issued, both foreign and domestic: 7,127,217; 7,272,373; 7,272,375; 7,321,324; 7,355,476; 7,426,376; 7,471,940; 7,339,503; 7,339,504. ADC FM ANT FMI AGC 0/90 TUNE1/2 ADC CONTROL INTERFACE BAND VDD XTAL OSC LNA_EN REG Rev. 1.0 5/13 RST 2.0~3.6V AFC VOL+/- XTALI Copyright © 2013 by Silicon Laboratories Si4825 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si4825-A10 2 Rev. 1.0 Si4825-A10 TABLE O F C ONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 4.7. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.8. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. Pin Descriptions: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7. Package Outline: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8. PCB Land Pattern: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9.1. Si4825-A10 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 9.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Rev. 1.0 3 Si4825-A10 1. Electrical Specifications Table 1. Recommended Operating Conditions1,2 Parameter Symbol Min Typ Max Unit VDD 2 — 3.6 V VDDRISE 10 — — µs TA 0 25 70 °C Supply Voltage3 Power Supply Powerup Rise Time Ambient Temperature Range Test Condition Note: 1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated. 2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for minimum VDD = 2.7 V. 3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part initialization may become unresponsive below 2.3 V. Table 2. DC Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit IFM — 20.0 — mA IAM — 19.0 — mA IDDPD — 10 — µA FM Mode Supply Current* AM/SW Mode Supply Current* Supplies and Interface VDD Powerdown Current *Note: Specifications are guaranteed by characterization. 4 Rev. 1.0 Si4825-A10 Table 3. Reset Timing Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Min Typ Max Unit RSTB Pulse Width tPRST 100 — — µs VDD valid time before RSTB rises tSRST 100 — — µs RSTB low time before VDD becomes invalid tRRST 0 — — µs Notes: 1. RSTB must be held low for at least 100 µs after the voltage supply has been ramped up. 2. RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down. tSRST tPRST tRRST VDD RSTB Figure 1. Reset Timing Rev. 1.0 5 Si4825-A10 Table 4. FM Receiver Characteristics1,2 (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Min Typ Max Unit 64 — 109 MHz — 4.0 — µV EMF LNA Input Resistance4,5 — 4 — k LNA Input Capacitance4,5 — 5 — pF — 50 — dB — 105 — dBµV EMF Input Frequency Symbol fRF Sensitivity with Headphone Network Test Condition (S+N)/N = 26 dB 3 m = 0.3 AM Suppression4,5,6,7 Input IP34,8 Adjacent Channel Selectivity4 ±200 kHz — 45 — dB Alternate Channel Selectivity4 ±400 kHz — 60 — dB Audio Output Voltage5,6,7 — 72 — mVRMS Audio Mono S/N5,6,7,9,10 — 45 — dB Audio Frequency Response Low4 –3 dB — — 30 Hz Audio Frequency Response High4 –3 dB 15 — — kHz — 0.1 0.5 % Audio THD6,5,11 Audio Output Load Resistance4,10 RL Single-ended 10 — — k Audio Output Load Capacitance4,10 CL Single-ended — — 50 pF Notes: 1. Additional testing information is available in “AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.” Volume = maximum for all tests. Tested at RF = 98.1 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 3. Frequency is 64~109 MHz. 4. Guaranteed by characterization. 5. VEMF = 1 mV. 6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise. 7. f = 22.5 kHz. 8. |f2 – f1| > 2 MHz, f0 = 2 x f1 – f2. 9. BAF = 300 Hz to 15 kHz, A-weighted. 10. At AOUT pin. 11. f = 75 kHz. 6 Rev. 1.0 Si4825-A10 Table 5. AM/SW Receiver Characteristics1, 2 (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit fRF Medium Wave (AM) 504 — 1750 kHz Short Wave (SW) 2.3 — 28.5 MHz (S+N)/N = 26 dB — 30 — µV EMF Large Signal Voltage Handling5 THD < 8% — 300 — mVRMS Power Supply Rejection Ratio5 ∆VDD = 100 mVRMS, 100 Hz — 40 — dB Audio Output Voltage3,6 — 54 — mVRMS Audio S/N3,4,6 — 45 — dB Audio THD3,6 — 0.1 — % 180 — 450 µH Input Frequency Sensitivity3,4,5 Antenna Inductance5,7 Notes: 1. Additional testing information is available in “AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.” Volume = maximum for all tests. Tested at RF = 6 MHz. 2. To ensure proper operation and receiver performance, follow the guidelines in “AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers. 3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter. 4. BAF = 300 Hz to 15 kHz, A-weighted. 5. Guaranteed by characterization. 6. VIN = 5 mVrms. 7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels. Table 6. Reference Clock and Crystal Characteristics (VDD = 2.7 to 3.6 V, TA = 0 to 70 °C) Parameter Symbol Test Condition Min Typ Max Unit — 32.768 — kHz –100 — 100 ppm Crystal Oscillator Frequency — 32.768 — kHz Crystal Frequency Tolerance –100 — 100 ppm — — 3.5 pF Reference Clock XTALI Supported Reference Clock Frequencies Reference Clock Frequency Tolerance for XTALI Crystal Oscillator Board Capacitance Rev. 1.0 7 Si4825-A10 Table 7. Thermal Conditions Parameter Symbol Min Typ Max Unit Thermal Resistance* JA — 80 — °C/W Ambient Temperature TA 0 25 70 °C Junction Temperature TJ — — 77 °C *Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad. Table 8. Absolute Maximum Ratings1,2 Parameter Symbol Value Unit Supply Voltage VDD –0.5 to 5.8 V Input Current3 IIN 10 mA Operating Temperature TOP –40 to 95 C Storage Temperature TSTG –55 to 150 C 0.4 VPK RF Input Level 4 Notes: 1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. The Si4825 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations. 3. For input pins RST, VOL+, VOL–, XTALO, XTALI, BAND, TUNE2, TUNE1, LNA_EN. 4. At RF input pins, FMI and AMI. 8 Rev. 1.0 Si4825-A10 2. Typical Application Schematic 781( 5 N 6: 6 %$1'  N 5 N    781( /1$B(1 %$1' 781(   1&  )0,  5)*1' $0, 5 N )0 $0,  $17 $0DQWHQQD X $0  95 & 5 N   781( N0 % )0, 8 & $287 *1'   ;7$/, 9''  92/ ;7$/2    567   5)*1' 7 92/ $0, X $17 $287 2SWLRQDO$0DLUORRSDQWHQQD 9'' N 567 5 & X & 9'' 729 X