SI8420-C-IS

Si8410/20/21 S I N G L E & D U A L - C H A N N E L D I G I TA L I S O L A T O R S Features High-speed operation DC – 150 Mbps 2500 VRMS isolation Transient Immunity >25 kV/µs Pin Assignments Low propagation delay 175 1012 f = 1 MHz 1.4 4.0 Notes: 1. To determine resistance and capacitance, the Si84xx is converted into a 2-terminal device. Pins 1–4 are shorted together to form the first terminal and pins 5–8 are shorted together to form the second terminal. The parameters are then measured between these two terminals. 2. Measured from input pin to ground. 14 Preliminary Rev. 0.1 S i8410/20/21 Table 8. IEC 60664-1 (VDE 0844 Part 2) Ratings Parameter Basic isolation group Test Conditions Material Group Rated Mains Voltages < 150 VRMS Installation Classification Rated Mains Voltages < 300 VRMS Rated Mains Voltages < 400 VRMS Specification IIIa I-IV I-III I-II Table 9. IEC 60747-5-2 Insulation Characteristics* Parameter Maximum Working Insulation Voltage Symbol VIORM Method a After Environmental Tests Subgroup 1 (VIORM x 1.6 = VPR, tm = 60 sec, Partial Discharge < 5 pC) Input to Output Test Voltage VPR Method b1 (VIORM x 1.875 = VPR, 100% Production Test, tm = 1 sec, Partial Discharge < 5 pC) After Input and/or Safety Test Subgroup 2/3 (VIORM x 1.2 = VPR, tm = 60 sec, Partial Discharge < 5 pC) Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec) Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance at TS, VIO = 500 V RS VTR Test Condition Characteristic 560 Unit V peak 896 1050 V peak 672 4000 2 >109 Ω V peak *Note: The Si84xx is suitable for basic electrical isolation a climate classification of 40/125/21. Table 10. IEC Safety Limiting Values Parameter Case Temperature Safety input, output, or supply current Symbol TS IS θJA = 210 °C/W, VI = 5.5 V, TJ = 150 °C, TA = 25 °C Test Condition Min — — Typ — Max 150 105 Unit °C mA — *Note: Maximum value allowed in the event of a failure; also see the thermal derating curve in Figure 2. Preliminary Rev. 0.1 15 S i8410/20/21 Table 11. Thermal Characteristics Parameter IC Junction-to-Case Thermal Resistance Symbol θJC Test Condition Thermocouple located at center of package Min — Typ 100 Max — Unit °C/W IC Junction-to-Air Thermal Resistance Device Power Dissipation* θJA PD — — 210 — — 250 °C/W mW *Note: The Si8420-C-IS is tested with VDD1 = VDD2 = 5.5 V, TJ = 150 °C, CL = 15 pF, input a 150 Mbps 50% duty cycle square wave. Safety-Limiting Current (mA) 100 75 50 25 0 0 50 100 150 Case Temperature (ºC) 200 78 5.5 V 3.6 V 121 128 106 2.75 V Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-2 16 Preliminary Rev. 0.1 S i8410/20/21 2. Typical Performance Characteristics 10 9 Current (mA) Current (mA) 20 5V 5V 8 3.3V 7 6 5 0 10 20 30 40 50 60 70 80 90 100 Data Rate (Mbps) 2.5V 15 10 3.3V 2.5V 5 0 0 10 20 30 40 50 60 70 80 90 100 Data Rate (Mbps) Figure 3. Si8410 Typical VDD1 Supply Current vs. Data Rate 5, 3.3, and 2.5 V Operation 12 10 Current (mA) 8 6 4 2 0 0 10 20 30 40 50 60 70 80 90 100 Data Rate (Mbps) 2.5V 5V 3.3V Figure 6. Si8420 Typical VDD2 Supply Current vs. Data Rate 5, 3.3, and 2.5 V Operation (15 pF Load) 19 17 Current (mA) 15 13 11 9 7 5 0 10 20 30 40 50 60 70 5V 3.3V 2.5V 80 90 100 Data Rate (Mbps) Figure 4. Si8410 Typical VDD2 Supply Current vs. Data Rate 5, 3.3, and 2.5 V Operation (15 pF Load) Figure 7. Si8421 Typical VDD1 or VDD2 Supply Current vs. Data Rate 5, 3.3, and 2.5 V Operation (15 pF Load) 15 13 Current (mA) 11 9 7 5 0 10 20 30 40 50 60 70 80 90 100 Data Rate (Mbps) 5V 3.3V 2.5V Figure 5. Si8420 Typical VDD1 Supply Current vs. Data Rate 5, 3.3, and 2.5 V Operation Preliminary Rev. 0.1 17 S i8410/20/21 10 9 Delay (ns) 8 Falling Edge 7 6 5 -40 -20 0 20 40 60 80 100 120 Temperature (Degrees C) Rising Edge Figure 8. Propagation Delay vs. Temperature 5 V Operation 10 9 Delay (ns) 8 7 6 5 -40 -20 0 20 40 60 80 100 120 Temperature (Degrees C) Falling Edge Rising Edge Figure 9. Propagation Delay vs. Temperature 3.3 V Operation 15 13 Delay (ns) 11 9 7 5 -40 -20 0 20 40 60 80 100 120 Temperature (Degrees C) Falling Edge Rising Edge Figure 10. Propagation Delay vs. Temperature 2.5 V Operation 18 Preliminary Rev. 0.1 S i8410/20/21 3. Application Information 3.1. Theory of Operation The operation of an Si841x or Si842x channel is analogous to that of an opto coupler, except that an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and requires no special considerations or initialization at startup. A simplified block diagram for a single Si8410 channel is shown in Figure 11. A channel consists of an RF transmitter and receiver separated by a transformer. Referring to the transmitter, input A modulates the carrier provided by an RF oscillator using on/off keying and applies the resulting waveform to the primary of the transformer. The receiver contains a demodulator that decodes the input state according to its RF energy content and applies the result to output B via the output driver. TRANSMITTER RF OSCILLATOR RECEIVER A MODULATOR DEMODULATOR B Figure 11. Simplified Channel Diagram 3.2. Eye Diagram Figure 12 illustrates an eye-diagram taken on an Si8410. The test used an Anritsu (MP1763C) Pulse Pattern Generator for the data source. The output of the generator's clock and data from an Si8410 were captured on an oscilloscope. The results illustrate that data integrity was maintained even at the high data rate of 150 Mbps. The results also show that very low pulse width distortion and very little jitter were exhibited. Figure 12. Eye Diagram Preliminary Rev. 0.1 19 S i8410/20/21 4. Layout Recommendations Dielectric isolation is a set of specifications produced by safety regulatory agencies from around the world, which describes the physical construction of electrical equipment that derives power from high-voltage power systems, such as 100–240 VAC systems or industrial power. The dielectric test (or HIPOT test) given in the safety specifications places a very high voltage between the input power pins of a product and the user circuits and the user-touchable surfaces of the product. For the IEC relating to products deriving their power from the 220–240 V power grids, the test voltage is 2500 VAC (or 3750 VDC, the peak equivalent voltage). There are two terms described in the safety specifications: Creepage—the distance along the insulating surface an arc may travel. Clearance—the shortest distance through air that an arc may travel. Figure 13 illustrates the accepted method of providing the proper creepage distance along the surface. For a 220–240 V application, this distance is 8 mm, and the wide-body SOIC package must be used. There must be no copper traces within this 8 mm exclusion area, and the surface should have a conformal coating, such as solder resist. The digital isolator chip must straddle this exclusion area. Figure 13. Creepage Distance 4.1. Supply Bypass The Si841x and Si842x families require a 0.1 µF bypass capacitor between VDD1 and GND1 and VDD2 and GND2. The capacitor should be placed as close as possible to the package. 20 Preliminary Rev. 0.1 S i8410/20/21 4.2. Input and Output Characteristics The Si841x and Si842x inputs and outputs are standard CMOS drivers/receivers. Table 12 details powered and unpowered operation of the Si84xx. Table 12. Si84xx Operation Table VI Input1,4 VDDI State1,2,3 VDDO State1,2,3 VO Output1,4 H L X P P UP P P P H L L Normal operation. Upon the transition of VDDI from unpowered to powered, VO returns to the same state as VI in less than 1 µs. Upon the transition of VDDI from unpowered to powered, VO returns to the same state as VI in less than 1 µs. Comments X P UP L Notes: 1. VDDI and VDDO are the input and output power supplies. VI and VO are the respective input and output terminals. 2. Powered (P) state is defined as 2.375 V < VDD < 5.5 V. 3. Unpowered (UP) state is defined as VDD = 0 V. 4. X = not applicable; H = Logic High; L = Logic Low. 4.3. RF Radiated Emissions The Si841x and Si842x families use an RF carrier frequency of approximately 2.1 GHz. This will result in a small amount of radiated emissions at this frequency and its harmonics. The radiation is not from the IC chip but, rather, is due to a small amount of RF energy driving the isolated ground planes, which can act as a dipole antenna. The unshielded Si8410 evaluation board passes FCC requirements. Table 13 shows measured emissions compared to FCC requirements. Radiated emissions can be reduced if the circuit board is enclosed in a shielded enclosure or if the PCB is a less efficient antenna. Table 13. Radiated Emissions Frequency Measured (GHz) (dBµV/m) 2.094 2.168 4.210 4.337 6.315 6.505 8.672 70.0 68.3 61.9 60.7 58.3 60.7 45.6 FCC Spec (dBµV/m) 74.0 74.0 74.0 74.0 74.0 74.0 74.0 Compared to Spec (dB) –4.0 –5.7 –12.1 –13.3 –15.7 –13.3 –28.4 Preliminary Rev. 0.1 21 S i8410/20/21 4.4. RF Immunity and Common Mode Transient Immunity The Si841x and Si842x families have very high common mode transient immunity while transmitting data. This is typically measured by applying a square pulse with very fast rise/fall times between the isolated grounds. Measurements show no failures up to 30 kV/µs. During a high surge event, the output may glitch low for up to 20–30 ns, but the output corrects immediately after the surge event. The Si841x and Si842x families pass the industrial requirements of CISPR24 for RF immunity of 3 V/m using an unshielded evaluation board. As shown in Figure 14, the isolated ground planes form a parasitic dipole antenna, while Figure 15 shows the RMS common mode voltage versus frequency above which the Si841x becomes susceptible to data corruption. To avoid compromising data, care must be taken to keep RF common-mode voltage below the envelope specified in Figure 15. The PCB should be laid-out to not act as an efficient antenna for the RF frequency of interest. RF susceptibility is also significantly reduced when the end system is housed in a metal enclosure, or otherwise shielded. GND1 Isolator GND2 Dipole Antenna Figure 14. Dipole Antenna 5 RMS Voltage (V) 4 3 2 1 0 500 1000 Frequency (MHz) 1500 2000 Figure 15. RMS Common Mode Voltage vs. Frequency 22 Preliminary Rev. 0.1 S i8410/20/21 5. Pin Descriptions Si841x VDD1 A1 VDD1 GND1 Si842x 1 2 3 4 Top View 8 7 6 5 VDD2 GND2 B1 GND2 VDD1 A1 A2 GND1 1 2 3 4 Top View 8 7 6 5 VDD2 B1 B2 GND2 Narrow Body SOIC Name VDD1 GND1 A1 A2 B1 B2 VDD2 GND2 SOIC-8 Pin# Si8410 1,3 4 2 NA 6 NA 8 5,7 SOIC-8 Pin# Si8420/21 1 4 2 3 7 6 8 5 Type Supply Ground Digital I/O Digital I/O Digital I/O Digital I/O Supply Ground Description Side 1 power supply. Side 1 ground. Side 1 digital input or output. Side 1 digital input or output. Side 2 digital input or output. Side 2 digital input or output. Side 2 power supply. Side 2 ground. Preliminary Rev. 0.1 23 S i8410/20/21 6. Ordering Guide Ordering Part Number Si8410-A-IS Si8410-B-IS Si8410-C-IS Si8420-A-IS Si8420-B-IS Si8420-C-IS Si8421-A-IS Si8421-B-IS Si8421-C-IS Number of Inputs Number of Inputs VDD1 Side VDD2 Side 1 1 1 2 2 2 1 1 1 0 0 0 0 0 0 1 1 1 Maximum Data Rate 1 10 150 1 10 150 1 10 150 Temperature –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C –40 to 125 °C Package Type SOIC-8 SOIC-8 SOIC-8 SOIC-8 SOIC-8 SOIC-8 SOIC-8 SOIC-8 SOIC-8 Note: All packages are Pb-free and RoHS Compliant. Moisture sensitivity level is MSL2 with peak reflow temperature of 260 °C according to the JEDEC industry standard classifications and peak solder temperature. 24 Preliminary Rev. 0.1 S i8410/20/21 7. Package Outline: 8-Pin SOIC Figure 16 illustrates the package details for the Si84xx. Table 14 lists the values for the dimensions shown in the illustration. α Figure 16. 8-pin Small Outline Integrated Circuit (SOIC) Package Table 14. Package Diagram Dimensions Symbol A A1 A2 B C D E e H h L Millimeters Min 1.35 0.10 1.40 REF 0.33 0.19 4.80 3.80 5.80 0.25 0.40 0° Max 1.75 0.25 1.55 REF 0.51 0.25 5.00 4.00 6.20 0.50 1.27 8° 1.27 BSC ∝ Preliminary Rev. 0.1 25 S i8410/20/21 CONTACT INFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: PowerProducts@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. 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