SI8621BB-B-IS

Si861x/2x Data Sheet Low-Power Single and Dual-Channel Digital Isolators Silicon Lab's family of ultra-low-power digital isolators are CMOS devices offering substantial data rate, propagation delay, power, size, reliability, and external BOM advantages over legacy isolation technologies. The operating parameters of these products remain stable across wide temperature ranges and throughout device service life for ease of design and highly uniform performance. All device versions have Schmitt trigger inputs for high noise immunity and only require VDD bypass capacitors. KEY FEATURES • High-speed operation • DC to 150 Mbps • No start-up initialization required • Wide Operating Supply Voltage • 2.5–5.5 V Data rates up to 150 Mbps are supported, and all devices achieve propagation delays of less than 10 ns. Ordering options include a choice of isolation ratings (2.5, 3.75 and 5 kV) and a selectable fail-safe operating mode to control the default output state during power loss. All products are safety certified by UL, CSA, VDE, and CQC, and products in wide-body packages support reinforced insulation withstanding up to 5 kVRMS. • Up to 5000 VRMS isolation Automotive Grade is available for certain part numbers. These products are built using automotive-specific flows at all steps in the manufacturing process to ensure the robustness and low defectivity required for automotive applications. • Ultra low power (typical) Industrial Applications • Industrial automation systems • Medical electronics • Isolated switch mode supplies • Isolated ADC, DAC • Motor control • Power inverters • Communications systems Safety Regulatory Approvals • UL 1577 recognized • Up to 5000 VRMS for 1 minute • CSA component notice 5A approval • IEC 60950-1, 61010-1, 60601-1 (reinforced insulation) • VDE certification conformity • Si862xxT options certified to reinforced VDE 0884-10 • All other options certified to IEC 60747-5-5 and reinforced 60950-1 • CQC certification approval • GB4943.1 Automotive Applications • On-board chargers • Battery management systems • Charging stations • Traction inverters • Hybrid Electric Vehicles • Battery Electric Vehicles • Reinforced VDE 0884-10, 10 kV surgecapable (Si862xxT) • 60-year life at rated working voltage • High electromagnetic immunity 5 V Operation • 1.6 mA per channel at 1 Mbps • 5.5 mA per channel at 100 Mbps 2.5 V Operation • 1.5 mA per channel at 1 Mbps • 3.5 mA per channel at 100 Mbps • Schmitt trigger inputs • Selectable fail-safe mode • Default high or low output (ordering option) • Precise timing (typical) • 10 ns propagation delay • 1.5 ns pulse width distortion • 0.5 ns channel-channel skew • 2 ns propagation delay skew • 5 ns minimum pulse width • Transient Immunity 50 kV/µs • AEC-Q100 qualification • Wide temperature range • –40 to 125 °C • RoHS-compliant packages • SOIC-16 wide body • SOIC-8 narrow body • Automotive-grade OPNs available • AIAG compliant PPAP documentation support • IMDS and CAMDS listing support silabs.com | Building a more connected world. Rev. 1.75 Si861x/2x Data Sheet Ordering Guide 1. Ordering Guide Industrial and Automotive Grade OPNs Industrial-grade devices (part numbers having an “-I” in their suffix) are built using well-controlled, high-quality manufacturing flows to ensure robustness and reliability. Qualifications are compliant with JEDEC, and defect reduction methodologies are used throughout definition, design, evaluation, qualification, and mass production steps. Automotive-grade devices (part numbers having an “-A” in their suffix) are built using automotive-specific flows at all steps in the manufacturing process to ensure robustness and low defectivity. These devices are supported with AIAG-compliant Production Part Approval Process (PPAP) documentation, and feature International Material Data System (IMDS) and China Automotive Material Data System (CAMDS) listing. Qualifications are compliant with AEC-Q100, and a zero-defect methodology is maintained throughout definition, design, evaluation, qualification, and mass production steps. Table 1.1. Ordering Guide for Valid OPNs1, 2, 4 Number Number of Inputs of Inputs Max Data Rate VDD2 VDD1 (Mbps) Side Side Default Output State Isolation Rating (kV) Package 150 Low 2.5 SOIC-8 0 150 Low 3.75 SOIC-8 1 0 150 High 3.75 SOIC-8 Si8610BD-AS 1 0 150 Low 5.0 WB SOIC-16 Si8610ED-B-IS Si8610ED-AS 1 0 150 High 5.0 WB SOIC-16 Si8620BB-B-IS Si8620BB-AS 2 0 150 Low 2.5 SOIC-8 Si8620EB-B-IS Si8620EB-AS 2 0 150 High 2.5 SOIC-8 Si8620BC-B-IS Si8620BC-AS 2 0 150 Low 3.75 SOIC-8 Si8620EC-B-IS Si8620EC-AS 2 0 150 High 3.75 SOIC-8 Si8620BD-B-IS Si8620BD-AS 2 0 150 Low 5.0 WB SOIC-16 Si8620ED-B-IS Si8620ED-AS 2 0 150 High 5.0 WB SOIC-16 Si8621BB-B-IS Si8621BB-AS 1 1 150 Low 2.5 SOIC-8 Si8621BC-B-IS Si8621BC-AS 1 1 150 Low 3.75 SOIC-8 Si8621EC-B-IS Si8621EC-AS 1 1 150 High 3.75 SOIC-8 Si8621BD-B-IS Si8621BD-AS 1 1 150 Low 5.0 WB SOIC-16 Si8621ED-B-IS Si8621ED-AS 1 1 150 High 5.0 WB SOIC-16 Si8622BB-B-IS Si8622BB-AS 1 1 150 Low 2.5 SOIC-8 Si8622EB-B-IS Si8622EB-AS 1 1 150 High 2.5 SOIC-8 Si8622BC-B-IS Si8622BC-AS 1 1 150 Low 3.75 SOIC-8 Si8622EC-B-IS Si8622EC-AS 1 1 150 High 3.75 SOIC-8 Si8622BD-B-IS Si8622BD-AS 1 1 150 Low 5.0 WB SOIC-16 Si8622ED-B-IS Si8622ED-AS 1 1 150 High 5.0 WB SOIC-16 Ordering Part Number (OPN) Automotive OPNs5, 6 Si8610BB-B-IS Si8610BB-AS 1 0 Si8610BC-B-IS Si8610BC-AS 1 Si8610EC-B-IS Si8610EC-AS Si8610BD-B-IS Product Options with Reinforced VDE 0884-10 Rating with 10 kV Surge Capability Si8620BT-IS Si8620BT-AS 2 0 150 Low 5.0 WB SOIC-16 Si8620ET-IS Si8620ET-AS 2 0 150 High 5.0 WB SOIC-16 silabs.com | Building a more connected world. Rev. 1.75 | 2 Si861x/2x Data Sheet Ordering Guide Number Number of Inputs of Inputs Max Data Rate VDD2 VDD1 (Mbps) Side Side Default Output State Isolation Rating (kV) Package 150 Low 5.0 WB SOIC-16 1 150 High 5.0 WB SOIC-16 1 1 150 Low 5.0 WB SOIC-16 1 1 150 High 5.0 WB SOIC-16 Ordering Part Number (OPN) Automotive OPNs5, 6 Si8621BT-IS Si8621BT-AS 1 1 Si8621ET-IS Si8621ET-AS 1 Si8622BT-IS Si8622BT-AS Si8622ET-IS Si8622ET-AS Note: 1. All packages are RoHS-compliant with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures. 2. “Si” and “SI” are used interchangeably. 3. An "R" at the end of the part number denotes tape and reel packaging option. 4. The temperature ranges is –40 to +125 °C. 5. Automotive-Grade devices (with an "–A" suffix) are identical in construction materials, topside marking, and electrical parameters to their Industrial-Grade (with an "–I" suffix) version counterparts. Automotive-Grade products are produced utilizing full automotive process flows and additional statistical process controls throughout the manufacturing flow. The Automotive-Grade part number is included on shipping labels. 6. In the top markings of each device, the Manufacturing Code represented by either “RTTTTT” or “TTTTTT” contains as its first character a letter in the range N through Z to indicate Automotive-Grade. silabs.com | Building a more connected world. Rev. 1.75 | 3 Table of Contents 1. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Eye Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 . . . 3. Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Device Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 Layout Recommendations . 3.3.1 Supply Bypass . . . 3.3.2 Output Pin Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 . 8 . 8 3.4 Fail-Safe Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.5 Typical Performance Characteristis . . . . . . . . . . . . . . . . . . . . . . . 9 4. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5. Pin Descriptions (Wide-Body SOIC) . . . . . . . . . . . . . . . . . . . . . . 28 6. Pin Descriptions (Narrow-Body SOIC) . . . . . . . . . . . . . . . . . . . . . 29 7. Package Outline: 16-Pin Wide Body SOIC. . . . . . . . . . . . . . . . . . . . 30 8. Land Pattern: 16-Pin Wide Body SOIC . . . . . . . . . . . . . . . . . . . . . 32 9. Package Outline: 8-Pin Narrow Body SOIC 10. Land Pattern: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . 33 . . . . . . . . . . . . . . . . . . . . 34 11. Top Marking: 16-Pin Wide Body SOIC. . . . . . . . . . . . . . . . . . . . . 12. Top Marking: 8-Pin Narrow Body SOIC . . . . . . . . . . . . . . . . . . . . 36 13. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . silabs.com | Building a more connected world. 35 37 Rev. 1.75 | 4 Si861x/2x Data Sheet System Overview 2. System Overview 2.1 Theory of Operation The operation of an Si861x/2x channel is analogous to that of an opto coupler, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and requires no special considerations or initialization at start-up. A simplified block diagram for a single Si861x/2x channel is shown in the figure below. Figure 2.1. Simplified Channel Diagram A channel consists of an RF Transmitter and RF Receiver separated by a semiconductor-based isolation barrier. Referring to the transmitter, input A modulates the carrier provided by an RF oscillator using on/off keying. The Receiver contains a demodulator that decodes the input state according to its RF energy content and applies the result to output B via the output driver. This RF on/off keying scheme is superior to pulse code schemes as it provides best-in-class noise immunity, low power consumption, and improved immunity to magnetic fields. See the following figure for more details. Figure 2.2. Modulation Scheme silabs.com | Building a more connected world. Rev. 1.75 | 5 Si861x/2x Data Sheet System Overview 2.2 Eye Diagram The figure below illustrates an eye diagram taken on an Si8610. For the data source, the test used an Anritsu (MP1763C) Pulse Pattern Generator set to 1000 ns/div. The output of the generator's clock and data from an Si8610 were captured on an oscilloscope. The results illustrate that data integrity was maintained even at the high data rate of 150 Mbps. The results also show that 2 ns pulse width distortion and 350 ps peak jitter were exhibited. Figure 2.3. Eye Diagram silabs.com | Building a more connected world. Rev. 1.75 | 6 Si861x/2x Data Sheet Device Operation 3. Device Operation Device behavior during start-up, normal operation, and shutdown is shown in Figure 3.1 Device Behavior during Normal Operation on page 8, where UVLO+ and UVLO– are the respective positive-going and negative-going thresholds. Refer to the following table to determine outputs when power supply (VDD) is not present. Table 3.1. Si86xx Logic Operation VI Input1, 2 VDDI State1, 3, 4 VDDO State1, 3, 4 VO Output1, 2 H P P H L P P L X5 UP P L6 H6 X5 P UP Undetermined Comments Normal operation. Upon transition of VDDI from unpowered to powered, VO returns to the same state as VI in less than 1 µs. Upon transition of VDDO from unpowered to powered, VO returns to the same state as VI within 1 µs. Note: 1. VDDI and VDDO are the input and output power supplies. VI and VO are the respective input and output terminals. 2. X = not applicable; H = Logic High; L = Logic Low; Hi-Z = High Impedance. 3. “Powered” state (P) is defined as 2.5 V < VDD < 5.5 V. 4. “Unpowered” state (UP) is defined as VDD = 0 V. 5. Note that an I/O can power the die for a given side through an internal diode if its source has adequate current. 6. See Ordering Guide for details. This is the selectable fail-safe operating mode (ordering option). Some devices have default output state = H, and some have default output state = L, depending on the ordering part number (OPN). For default high devices, the data channels have pull-ups on inputs/outputs. For default low devices, the data channels have pull-downs on inputs/outputs. silabs.com | Building a more connected world. Rev. 1.75 | 7 Si861x/2x Data Sheet Device Operation 3.1 Device Startup Outputs are held low during powerup until VDD is above the UVLO threshold for time period tSTART. Following this, the outputs follow the states of inputs. 3.2 Undervoltage Lockout Undervoltage Lockout (UVLO) is provided to prevent erroneous operation during device startup and shutdown or when VDD is below its specified operating circuits range. Both Side A and Side B each have their own undervoltage lockout monitors. Each side can enter or exit UVLO independently. For example, Side A unconditionally enters UVLO when VDD1 falls below VDD1(UVLO–) and exits UVLO when VDD1 rises above VDD1(UVLO+). Side B operates the same as Side A with respect to its VDD2 supply. Figure 3.1. Device Behavior during Normal Operation 3.3 Layout Recommendations To ensure safety in the end-user application, high-voltage circuits (i.e., circuits with >30 VAC) must be physically separated from the safety extra-low-voltage circuits (SELV is a circuit with 109 >109 Method b1 (VIORM x 1.875 = VPR, 100% Production Test, tm = 1 sec, Partial Discharge < 5 pC) Transient Overvoltage VIOTM t = 60 sec Tested per IEC 60065 with surge voltage of 1.2 µs/50 µs VIOSM Surge Voltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance at TS, VIO = 500 V RS Ω Note: 1. Maintenance of the safety data is ensured by protective circuits. The Si86xxxx provides a climate classification of 40/125/21. Table 4.9. IEC Safety Limiting Values1 Parameter Symbol Case Temperature TS Safety Input, Output, or Supply Current IS Test Condition θJA = 140 °C/W (NB SOIC-8) Max Unit WB SOIC-16 NB SOIC-8 150 150 °C 220 160 mA 150 150 mW 100 °C/W (WB SOIC-16) VI = 5.5 V, TJ = 150 °C, TA = 25 °C Device Power Dissipation2 PD Note: 1. Maximum value allowed in the event of a failure; also see the thermal derating curve in Figure 4.3 (WB SOIC-16) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-5/VDE 0884-10, as Applies on page 26 and Figure 4.4 (NB SOIC-8) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-5/VDE 0884-10, as Applies on page 26. 2. The Si86xx is tested with VDD1 = VDD2 = 5.5 V; TJ = 150 ºC; CL = 15 pF, input a 150 Mbps 50% duty cycle square wave. silabs.com | Building a more connected world. Rev. 1.75 | 25 Si861x/2x Data Sheet Electrical Specifications Table 4.10. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance Symbol WB SOIC-16 NB SOIC-8 Unit θJA 100 140 °C/W Figure 4.3. (WB SOIC-16) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-5/VDE 0884-10, as Applies Figure 4.4. (NB SOIC-8) Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN EN 60747-5-5/VDE 0884-10, as Applies silabs.com | Building a more connected world. Rev. 1.75 | 26 Si861x/2x Data Sheet Electrical Specifications Table 4.11. Absolute Maximum Ratings1 Parameter Symbol Min Max Unit Storage Temperature2 TSTG –65 150 °C Operating Temperature TA –40 125 °C Junction Temperature TJ — 150 °C VDD1, VDD2 –0.5 7.0 V Input Voltage VI –0.5 VDD + 0.5 V Output Voltage VO –0.5 VDD + 0.5 V Output Current Drive Channel IO — 10 mA Lead Solder Temperature (10 s) — 260 °C Maximum Isolation (Input to Output) (1 sec) — 4500 VRMS — 6500 VRMS Supply Voltage NB SOIC-16 Maximum Isolation (Input to Output) (1 sec) WB SOIC-16 Note: 1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum ratings for exteneded periods may degrade performance. 2. VDE certifies storage temperature from –40 to 150 °C. silabs.com | Building a more connected world. Rev. 1.75 | 27 Si861x/2x Data Sheet Pin Descriptions (Wide-Body SOIC) 5. Pin Descriptions (Wide-Body SOIC) GND2 GND1 NC VDD1 A1 RF XMITR NC NC I s o l a t i o n RF RCVR GND1 NC Si8610 WB SOIC-16 Name GND2 GND1 NC NC VDD2 VDD1 B1 A1 RF XMITR NC A2 RF XMITR NC NC NC GND1 GND2 NC I s o l a t i o n GND2 GND1 NC NC VDD2 VDD1 RF RCVR B1 A1 RF XMITR RF RCVR B2 A2 RF RCVR NC NC NC GND1 GND2 Si8620 WB SOIC-16 NC I s o l a t i o n GND2 GND1 NC NC VDD2 VDD1 RF RCVR B1 A1 RF RCVR RF XMITR B2 A2 RF XMITR NC NC NC GND1 Si8621 WB SOIC-16 GND2 Type NC I s o l a t i o n NC VDD2 RF XMITR B1 RF RCVR B2 NC NC Si8622 WB SOIC-16 SOIC-16 Pin# SOIC-16 Pin# Si8610 Si862x GND1 1 1 Ground NC1 2, 5, 6, 8,10, 2, 6, 8,10, No Connect 11, 12, 15 11, 15 VDD1 3 3 Supply A1 4 4 Digital I/O Side 1 digital input or output. A2 NC 5 Digital I/O Side 1 digital input or output. GND1 7 7 Ground Side 1 ground. GND2 9 9 Ground Side 2 ground. B2 NC 12 Digital I/O Side 2 digital input or output. B1 13 13 Digital I/O Side 2 digital input or output. VDD2 14 14 Supply Side 2 power supply. GND2 16 16 Ground Side 2 ground. GND2 Description Side 1 ground. NC Side 1 power supply. Note: 1. No Connect. These pins are not internally connected. They can be left floating, tied to VDD, or tied to GND. silabs.com | Building a more connected world. Rev. 1.75 | 28 Si861x/2x Data Sheet Pin Descriptions (Narrow-Body SOIC) 6. Pin Descriptions (Narrow-Body SOIC) VDD1 A1 RF XMITR VDD1/NC GND1 I s o l a t i o n VDD2 GND2/NC RF RCVR Si8610 NB SOIC-8 Name B1 GND2 VDD1 A1 RF XMITR A2 RF XMITR GND1 I s o l a t i o n VDD2 VDD1 RF RCVR B1 A1 RF XMITR RF RCVR B2 A2 RF RCVR GND2 Si8620 NB SOIC-8 GND1 I s o l a t i o n VDD2 VDD1 RF RCVR B1 A1 RF RCVR RF XMITR B2 A2 RF XMITR Si8621 NB SOIC-8 Type GND2 GND1 I s o l a t i o n VDD2 RF XMITR B1 RF RCVR B2 Si8622 NB SOIC-8 SOIC-8 Pin# SOIC-8 Pin# Si861x Si862x VDD1/NC1 1, 3 1 Supply Side 1 power supply. GND1 4 4 Ground Side 1 ground. A1 2 2 Digital I/O Side 1 digital input or output. A2 NA 3 Digital I/O Side 1 digital input or output. B1 6 7 Digital I/O Side 2 digital input or output. B2 NA 6 Digital I/O Side 2 digital input or output. VDD2 8 8 Supply Side 2 power supply. GND2/NC1 5.7 5 Ground Side 2 ground. GND2 Description Note: 1. No connect. These pins are not internally connected. They can be left floating, tied to VDD, or tied to GND. silabs.com | Building a more connected world. Rev. 1.75 | 29 Si861x/2x Data Sheet Package Outline: 16-Pin Wide Body SOIC 7. Package Outline: 16-Pin Wide Body SOIC The figure below illustrates the package details for the Triple-Channel Digital Isolator. The table lists the values for the dimensions shown in the illustration. Figure 7.1. 16-Pin Wide Body SOIC silabs.com | Building a more connected world. Rev. 1.75 | 30 Si861x/2x Data Sheet Package Outline: 16-Pin Wide Body SOIC Table 7.1. 16-Pin Wide Body SOIC Package Diagram Dimensions1, 2, 3, 4 Dimension Min Max A — 2.65 A1 0.10 0.30 A2 2.05 — b 0.31 0.51 c 0.20 0.33 D 10.30 BSC E 10.30 BSC E1 7.50 BSC e 1.27 BSC L 0.40 1.27 h 0.25 0.75 θ 0° 8° aaa — 0.10 bbb — 0.33 ccc — 0.10 ddd — 0.25 eee — 0.10 fff — 0.20 Note: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to JEDEC Outline MS-013, Variation AA. 4. Recommended reflow profile per JEDEC J-STD-020 specification for small body, lead-free components. silabs.com | Building a more connected world. Rev. 1.75 | 31 Si861x/2x Data Sheet Land Pattern: 16-Pin Wide Body SOIC 8. Land Pattern: 16-Pin Wide Body SOIC The figure below illustrates the recommended land pattern details for the Si861x/2x in a 16-pin wide-body SOIC package. The table lists the values for the dimensions shown in the illustration. Figure 8.1. PCB Land Pattern: 16-Pin Wide Body SOIC Table 8.1. 16-Pin Wide Body SOIC Land Pattern Dimensions1, 2 Dimension Feature (mm) C1 Pad Column Spacing 9.40 E Pad Row Pitch 1.27 X1 Pad Width 0.60 Y1 Pad Length 1.90 Note: 1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P1032X265-16AN for Density Level B (Median Land Protrusion). 2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0.05 mm is assumed. silabs.com | Building a more connected world. Rev. 1.75 | 32 Si861x/2x Data Sheet Package Outline: 8-Pin Narrow Body SOIC 9. Package Outline: 8-Pin Narrow Body SOIC The figure below illustrates the package details for the Si86xx. The table lists the values for the dimensions shown in the illustration. Figure 9.1. 8-Pin Small Outline Integrated Circuit (SOIC) Package Table 9.1. 8-Pin Small Outline Integrated Circuit (SOIC) Package Diagram Dimensions Symbol Millimeters Min Max A 1.35 1.75 A1 0.10 0.25 A2 1.40 REF 1.55 REF B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 4.00 e 1.27 BSC H 5.80 6.20 h 0.25 0.50 L 0.40 1.27 m 0° 8° silabs.com | Building a more connected world. Rev. 1.75 | 33 Si861x/2x Data Sheet Land Pattern: 8-Pin Narrow Body SOIC 10. Land Pattern: 8-Pin Narrow Body SOIC The figure below illustrates the recommended land pattern details for the Si86xx in an 8-pin narrow-body SOIC. The table lists the values for the dimensions shown in the illustration. Figure 10.1. PCB Land Pattern: 8-Pin Narrow Body SOIC Table 10.1. 8-Pin Narrow Body SOIC Land Pattern Dimensions1, 2 Dimension Feature (mm) C1 Pad Column Spacing 5.40 E Pad Row Pitch 1.27 X1 Pad Width 0.60 Y1 Pad Length 1.55 Note: 1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X173-8N for Density Level B (Median Land Protrusion). 2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0.05 mm is assumed. silabs.com | Building a more connected world. Rev. 1.75 | 34 Si861x/2x Data Sheet Top Marking: 16-Pin Wide Body SOIC 11. Top Marking: 16-Pin Wide Body SOIC Si86XYSV YYWWRTTTTT e4 CC Figure 11.1. 16-Pin Wide Body SOIC Top Marking Table 11.1. 16-Pin Wide Body SOIC Top Marking Explanation Line 1 Marking: Base Part Number Si86 = Isolator product series Ordering Options X = # of data channels (2, 1) (See Ordering Guide for more information.) Y = # of reverse channels (2, 1, 0)1 S = Speed Grade (max data rate) and operating mode: B = 150 Mbps (default output = low) E = 150 Mbps (default output = high) V = Insulation rating B = 2.5 kV; C = 3.75 kV; D = 5.0 kV; T = 5.0 kV with 10 kV surge capability. Line 2 Marking: YY = Year WW = Workweek RTTTTT = Mfg Code Assigned by assembly subcontractor. Corresponds to the year and workweek of the mold date. Manufacturing code from assembly house “R” indicates revision Line 3 Marking: Circle = 1.7 mm Diameter “e4” Pb-Free Symbol (Center-Justified) Country of Origin ISO Code Ab- CC = Country of Origin ISO Code Abbreviation breviation • TW = Taiwan • TH = Thailand Note: 1. The Si8622 has 1 forward and 1 reverse channel, but directionality is reversed compared to the Si8621, as shown in 5. Pin Descriptions (Wide-Body SOIC) and 6. Pin Descriptions (Narrow-Body SOIC) silabs.com | Building a more connected world. Rev. 1.75 | 35 Si861x/2x Data Sheet Top Marking: 8-Pin Narrow Body SOIC 12. Top Marking: 8-Pin Narrow Body SOIC Si86XYSV YYWWRT e3 TTTT Figure 12.1. 8-Pin Narrow Body SOIC Top Marking Table 12.1. 8-Pin Narrow Body SOIC Top Marking Explanation Line 1 Marking: Base Part Number Si86 = Isolator Product Series Ordering Options XY = Channel Configuration (See Ordering Guide for more information). Line 2 Marking: YY = Year WW = Workweek R = Product (OPN) Revision T = First character of the manufacturing code Line 3 Marking: S = Speed Grade (max data rate) V = Insulation rating Assigned by assembly subcontractor. Corresponds to the year and workweek of the mold date. First two characters of the manufacturing code from Assembly. Circle = 1.1 mm Diameter “e3” Pb-Free Symbol. TTTT = Last four characters of the manufacturing code Last four characters of the manufacturing code. Note: 1. The Si8622 has 1 forward and 1 reverse channel, but directionality is reversed compared to the Si8621, as shown in 5. Pin Descriptions (Wide-Body SOIC) and 6. Pin Descriptions (Narrow-Body SOIC) silabs.com | Building a more connected world. Rev. 1.75 | 36 Si861x/2x Data Sheet Revision History 13. Revision History Revision 1.75 September 2019 • Updated the Ordering Guide. Revision 1.74 October 2018 • Updated the Ordering Guide for Automotive-Grade OPN options. Revision 1.73 May 2018 • Updated the Ordering Guide for Automotive-Grade OPN options. Revision 1.72 April 2018 • Added Si8610ED-AS to Ordering Guide for Automotive-Grade OPN options. Revision 1.71 • Added new table to Ordering Guide for Automotive-Grade OPN options. Revision 1.7 • Added following note to 1. Ordering Guide: "An 'R' at the end of the part number denotes tape and reel packaging option." Revision 1.6 • Added product options Si862xxT in 1. Ordering Guide. • Added spec line items for Input Leakage Current pertaining to Si862xxT in 4. Electrical Specifications. • Updated IEC 60747-5-2 to IEC 60747-5-5 in all instances in document. Revision 1.5 • Updated Table 5 on page 17. • Added CQC certificate numbers. • Updated "5. Ordering Guide" on page 11. • Removed references to moisture sensitivity levels. • Removed Note 2. Revision 1.4 • Added Figure 2, “Common Mode Transient Immunity Test Circuit,” on page 8. • Added references to CQC throughout. • Added references to 2.5 kVRMS devices throughout. • Updated "5. Ordering Guide" on page 11. • Updated "10.1. 16-Pin Wide Body SOIC Top Marking" on page 18. silabs.com | Building a more connected world. Rev. 1.75 | 37 Si861x/2x Data Sheet Revision History Revision 1.3 • Updated Table 11 on page 21. • Added junction temperature spec. • Updated "2.3.1. Supply Bypass" on page 6. • Removed “3.3.2. Pin Connections” on page 22. • Updated "5. Ordering Guide" on page 11. • Removed Rev A devices. • Updated "6. Package Outline: 16-Pin Wide Body SOIC" on page 13. • Updated Top Marks. • Added revision description. Revision 1.2 • Updated Table 1 on page 4. • Deleted reference to EN. • Updated "5. Ordering Guide" on page 11 to include MSL2A. Revision 1.1 • Updated High Level Output Voltage VOH to 3.1 V in Table 3, “Electrical Characteristics,” on page 9. • Updated High Level Output Voltage VOH to 2.3 V in Table 4, “Electrical Characteristics,” on page 13. Revision 1.0 • Updated “Table 3. Electrical Characteristics”. • Reordered spec tables to conform to new convention. • Removed “pending” throughout document. Revision 0.3 • Added chip graphics on page 1. • Updated Table 6, “Insulation and Safety-Related Specifications,” on page 18. • Updated Table 8, “IEC 60747-5-5 Insulation Characteristics for Si86xxxx*,” on page 19. • Updated "3. Pin Descriptions (Wide-Body SOIC)" on page 9. • Updated "4. Pin Descriptions (Narrow-Body SOIC)" on page 10. • Updated "5. Ordering Guide" on page 11. Revision 0.2 • Added chip graphics on page 1. • Moved Tables 1 and 11 to page 21. • Updated Table 6, “Insulation and Safety-Related Specifications,” on page 18. • Updated Table 8, “IEC 60747-5-5 Insulation Characteristics for Si86xxxx*,” on page 19. • Moved Table 1 to page 4. • Moved “Typical Performance Characteristics” to page 7. • Updated "3. Pin Descriptions (Wide-Body SOIC)" on page 9. • Updated "4. Pin Descriptions (Narrow-Body SOIC)" on page 10. • Updated "5. Ordering Guide" on page 11. silabs.com | Building a more connected world. Rev. 1.75 | 38 Smart. Connected. Energy-Friendly. Products Quality www.silabs.com/products www.silabs.com/quality Support and Community community.silabs.com Disclaimer Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. 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