Si8920 Data Sheet
Isolated Amplifier for Current Shunt Measurement
KEY FEATURES
The Si8920 is a galvanically isolated analog amplifier. The low-voltage differential input
is ideal for measuring voltage across a current shunt resistor or for any place where a
sensor must be isolated from the control system. The output is a differential analog signal amplified by either 8.1x or 16.2x.
The very low signal delay of the Si8920 allows control systems to respond quickly to
fault conditions or changes in load. Low offset and gain drift ensure that accuracy is
maintained over the entire operating temperature range. Exceptionally high commonmode transient immunity means that the Si8920 delivers accurate measurements even
in the presence of high-power switching as is found in motor drive systems and inverters.
The Si8920 isolated amplifier utilizes Silicon Labs’ proprietary isolation technology. It
supports up to 5.0 kVrms withstand voltage per UL1577. This technology enables higher
performance, reduced variation with temperature and age, tighter part-to-part matching,
and longer lifetimes compared to other isolation technologies.
Automotive Grade is available for certain part numbers. These products are built using
automotive-specific flows at all steps in the manufacturing process to ensure the robustness and low defectivity required for automotive applications.
Industrial Applications
• Industrial and renewable energy inverters
• AC, Brushless, and DC motor controls
and drives
• Variable speed motor control in consumer white goods
• Isolated switch mode and UPS power
supplies
Automotive Applications
• Hybrid and EV traction inverters
• Onboard chargers
• Charging pedestals
• Low voltage differential input
• ±100 mV and ±200 mV options
• Low signal delay: 0.75 µs
• Input offset: 0.2 mV
• Gain error: 5 kΩ and
C6 can be calculated by the following equation:
C6 =
silabs.com | Building a more connected world.
1
2 × π × (R4 + R5) × f 3dB
Rev. 1.03 | 5
Si8920 Data Sheet
Electrical Specifications
4. Electrical Specifications
Table 4.1. Electrical Specifications
VDDA, VDDB = 5 V, TA = –40 to +125 °C; typical specs at 25 °C
Parameter
Symbol
Test Condition
Min
Typ
Input Side Supply Voltage
VDDA
Input Supply Current
IVDDA
Output Side Supply Voltage
VDDB
Output Supply Current
IVDDB
VDDA = VDDB = 3.3 V
VDD Undervoltage Threshold
VDDUV+
VDDA, VDDB rising
2.7
V
VDD Undervoltage Threshold
VDDUV–
VDDA, VDDB falling
2.6
V
VDD Undervoltage Hysteresis
VDDHYS
100
mV
950
kHz
3.0
VDDA = VDDB = 3.3 V
3.2
4.2
3.0
2.7
Amplifier Bandwidth
3.8
Max
Units
5.5
V
5.5
mA
5.5
V
4.9
mA
Amplifier Input
Specified FullScale Input Amplitude
Si8920A
Maximum Input
Voltage Before
Clipping
Si8920A
VAIP – VAIN
Si8920B
–100
100
mV
–200
200
mV
VAIP – VAIN
Si8920B
±125
mV
±250
mV
Common-Mode Operating Range
VCM
Input Referred Offset
VOS
0.2
Input Offset Drift
VOST
1.0
µV/°C
20
kΩ
37.2
kΩ
850
ppm/°C
Differential Input
impedance
Si8920A
–0.2
RIN
Si8920B
RINT
Differential Input Impedance Drift
1
V
1.0
mV
Amplifier Output
Full-scale Output
Gain
VAOP – VAON
1.58
Si8920A
16.2
Si8920B
8.1
TA = 25 °C
Gain Error
–0.5
Gain Error Drift
Output Common Mode Voltage
Output Noise
Nonlinearity
1.62
1.65
Vpk
0.5
%
10
(VAOP + VAON)/2
1.02
ppm/°C
1.1
1.17
V
Si8920A
100 kHz bandwidth
0.14
0.28
mVrms
Si8920B
100 kHz bandwidth
0.10
0.20
mVrms
Si8920A
0.04
0.15
%
Si8920B
0.025
0.1
%
Output Resistive Load
RLOAD
Output Capacitive Load
CLOAD
silabs.com | Building a more connected world.
5
kΩ
100
pF
Rev. 1.03 | 6
Si8920 Data Sheet
Electrical Specifications
Parameter
Symbol
Signal Delay
tPD
Rise Time
Common-Mode Transient
Immunity1
Test Condition
Min
Typ
Max
Units
Timing
50% to 50%
0.75
50% to 99%
1.85
tR
10% to 90%
0.42
µs
CMTI
AIP = AIN = AGND,
VCM = 1500 V
75
kV/µs
50
µs
Note:
1. An analog CMTI failure is defined as an output error of more than 100 mV persisting for at least 1 µs.
VDDB
Si8920
1
Isolated
Supply
2
+
_
3
4
VDDA
VDDB
AIP
AOP
AIN
AON
GNDA
GNDB
8
7
6
Differential
Probe
5
Oscilloscope
High Voltage
Differential
Probe
High Voltage Transient Generator
Figure 4.1. Common-Mode Transient Immunity Characterization Circuit
silabs.com | Building a more connected world.
Rev. 1.03 | 7
Si8920 Data Sheet
Electrical Specifications
Table 4.2. IEC Safety Limiting Values1
Parameter
Symbol
Test Condition
Characteristic
Unit
150
°C
216
mA
331
mA
379
mA
579
mA
1191
mW
2083
mW
PDIP-8
1.19
W
WB SOIC-16
2.08
W
TS
Safety Temperature
θJA = 105 °C/W
VDD = 5.5 V
TJ = 150 °C
Safety Input Current (DIP-8)
TA = 25 °C
IS
θJA = 105 °C/W
VDD = 3.6 V
TJ = 150 °C
TA = 25 °C
θJA = 60 °C/W
VDD = 5.5 V
TJ = 150 °C
Safety Input Current (WB SOIC-16)
TA = 25 °C
IS
θJA = 60 °C/W
VDD = 3.6 V
TJ = 150 °C
TA = 25 °C
θJA = 105 °C/W
Safety Input Power (DIP-8)
PS
TJ = 150 °C
TA = 25 °C
θJA = 60 °C/W
Safety Input Power (WB SOIC-16)
PS
TJ = 150 °C
TA = 25 °C
Device Power Dissipation
PD
Note:
1. Maximum value allowed in the event of a failure. Refer to the thermal derating curves below.
Table 4.3. Thermal Characteristics
Parameter
IC Junction-to-Air Thermal Resistance
silabs.com | Building a more connected world.
Symbol
PDIP-8
WB SOIC-16
Unit
θJA
105
60
°C
Rev. 1.03 | 8
Si8920 Data Sheet
Electrical Specifications
Figure 4.2. Thermal Derating Curve for Safety Limiting Current (DIP8)
Figure 4.3. Thermal Derating Curve for Safety Limiting Current (WB SOIC-16)
silabs.com | Building a more connected world.
Rev. 1.03 | 9
Si8920 Data Sheet
Electrical Specifications
Table 4.4. Absolute Maximum Ratings1
Parameter
Symbol
Min
Max
Unit
TSTG
–65
150
°C
Ambient Temperature Under Bias
TA
–40
125
°C
Junction Temperature
TJ
—
150
°C
VDDA, VDDB
–0.5
6.0
V
Input Voltage respect to GNDA
VAIP, VAIN
–0.5
VDDx + 0.5
V
Output Sink or Source Current
|IO|
—
5
mA
Total Power Dissipation
PT
—
212
mW
Lead Solder Termperature (10 s)
—
260
°C
Human Body Model ESD Rating
4000
—
V
Capacitive Discharge Model ESD Rating PDIP
2000
—
V
Capacitive Discharge Model ESD Rating SOIC
2000
—
V
Maximum Isolation (Input to Output) (1 s) PDIP
—
6500
VRMS
Maximum Isolation (Input to Output) (1 s) SOIC
—
6500
VRMS
Storage Temperature
Supply Voltage
Note:
1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to
conditions as specified in the operational sections of the data sheet.
silabs.com | Building a more connected world.
Rev. 1.03 | 10
Si8920 Data Sheet
Electrical Specifications
4.1 Typical Operating Characteristics
Figure 4.4. Amplifier Bandwidth
Figure 4.5. Gain Error vs. Temperature
Figure 4.6. IDDB vs. Temperature
Figure 4.7. IDDA vs. Temperature
Figure 4.8. Step Response Low to High
Figure 4.9. Step Response High to Low
silabs.com | Building a more connected world.
Rev. 1.03 | 11
Si8920 Data Sheet
Electrical Specifications
Figure 4.10. CMRR vs. Frequency
Figure 4.11. Normalized Differential Input Resistance vs. Temperature
Figure 4.12. Si8920A Typical VOUT vs. VIN
Figure 4.13. Si8920B Typical VOUT vs. VIN
silabs.com | Building a more connected world.
Rev. 1.03 | 12
Si8920 Data Sheet
Electrical Specifications
4.2 Regulatory Information
Table 4.5. Regulatory Information1, 2
CSA
The Si8920 is certified under CSA Component Acceptance Notice 5A. For more details, see File 232873.
60950-1: Up to 600 VRMS reinforced insulation working voltage; up to 1000 VRMS basic insulation working voltage.
VDE
The Si8920 is certified according to VDE 0884-10. For more details, see File 5006301-4880-0001.
VDE 0884-10: Up to 1200 Vpeak for reinforced insulation working voltage.
UL
The Si8920 is certified under UL1577 component recognition program. For more details, see File E257455.
Rated up to 5000 VRMS isolation voltage for basic protection.
CQC
The Si8920 is certified under GB4943.1-2011.
Rated up to 600 VRMS reinforced insulation working voltage; up to 1000 VRMS basic insulation working voltage.
Note:
1. Regulatory Certifications apply to 5 kVRMS rated devices which are production tested to 6.0 kVRMS for 1 sec.
2. Regulatory Certifications apply to 3.75 kVRMS rated devices which are production tested to 4.5 kVRMS for 1 sec.
Table 4.6. Insulation and Safety-Related Specifications
Parameter
Symbol
Test Condition
Value
Unit
GW DIP-8
WB SOIC-16
Nominal Air Gap (Clearance)
L(IO1)
7.2
8.01
mm
Nominal External Tracking
(Creepage)
L(IO2)
7.0
8.01
mm
0.016
0.016
mm
600
600
V
Minimum Internal Gap
(Internal Clearance)
Tracking Resistance
(Proof Tracking Index)
PTI
IEC60112
Erosion Depth
ED
0.031
0.019
mm
Resistance (Input-Output)2
RIO
1012
1012
Ω
Capacitance (Input-Output)2
CIO
1
1
pF
f = 1 MHz
Note:
1. The values in this table correspond to the nominal creepage and clearance values. VDE certifies the clearance and creepage
limits as 8.5 mm minimum for the WB SOIC-16 package. UL does not impose a clearance and creepage minimum for component-level certifications. CSA certifies the clearance and creepage limits as 7.6 mm minimum for the WB SOIC-16 package.
2. To determine resistance and capacitance, the Si8920 is converted into a 2-terminal device. Pins 1–8 (1–4 DIP8) are shorted together to form the first terminal, and pins 9–16 (5–8 DIP8) are shorted together to form the second terminal. The parameters are
then measured between these two terminals.
silabs.com | Building a more connected world.
Rev. 1.03 | 13
Si8920 Data Sheet
Electrical Specifications
Table 4.7. IEC 60664-1 (VDE 0884) Ratings
Parameter
Test Conditions
Specification
GW DIP-8
WB SOIC-16
Material Group
I
I
Installation
Rated Mains Voltages < 150 VRMS
I-IV
I-IV
Classification
Rated Mains Voltages < 300 VRMS
I-IV
I-IV
Rated Mains Voltages < 450 VRMS
I-III
I-III
Rated Mains Voltages < 600 VRMS
I-III
I-III
Basic Isolation Group
Table 4.8. VDE 0884-10 Insulation Characteristics1
Parameter
Symbol
Maximum Working Insulation Voltage
VIORM
Input to Output Test Voltage
VPR
Test Condition
Method b1
Characteristic
Unit
3.75 kVrms-rated
5.0 kVrms-rated
891
1200
V peak
1671
2250
V peak
6000
8000
V peak
2
2
>109
>109
(VIORM x 1.875 = VPR, 100%
Production Test, tm = 1 sec,
Partial Discharge < 5 pC)
Transient Overvoltage
VIOTM
Pollution Degree
(DIN VDE 0110, Table 1)
Insulation Resistance at
TS, VIO = 500 V
RS
t = 60 sec
Ω
Note:
1. This isolator is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The Si8920 provides a climate classification of 40/125/21.
silabs.com | Building a more connected world.
Rev. 1.03 | 14
Si8920 Data Sheet
Pin Descriptions
5. Pin Descriptions
16 GNDB
VDDA 1
AIP 2
15 NC
AIN 3
14 VDDB
GNDA 4
NC 5
Si8920
VDDA 1
13 AOP
AIP 2
12 NC
AIN 3
NC 6
11 AON
NC 7
10 NC
GNDA 8
Si8920
GNDA 4
8
VDDB
7
AOP
6
AON
5
GNDB
9 GNDB
Table 5.1. Si8920 Pin Descriptions
Name
WB SOIC-16
Pin #
GW DIP-8
Pin #
Description
VDDA
1
1
Input side power supply
AIP
2
2
Analog input high
AIN
3
3
Analog input low
GNDA
4, 8
4
Input side ground
GNDB
9, 16
5
Output side ground
AON
11
6
Analog output low
AOP
13
7
Analog output high
VDDB
14
8
Output power supply
NC1
5, 6, 7, 10, 12, 15
—
No Connect
Note:
1. No Connect. These pins are not internally connected. To maximize CMTI performance, these pins should be connected to the
ground plane.
silabs.com | Building a more connected world.
Rev. 1.03 | 15
Si8920 Data Sheet
Packaging
6. Packaging
6.1 Package Outline: DIP8
The figure below illustrates the package details for the Si8920 in a DIP8 package. The table lists the values for the dimensions shown in
the illustration.
Figure 6.1. DIP8 Package
Table 6.1. DIP8 Package Diagram Dimensions
Dimension
Min
Max
A
—
4.19
A1
0.55
0.75
A2
3.17
3.43
b
0.35
0.55
b2
1.14
1.78
b3
0.76
1.14
c
0.20
0.33
D
9.40
9.90
E
7.37
7.87
E1
6.10
6.60
E2
9.40
9.90
e
2.54 BSC.
L
0.38
0.89
aaa
—
0.25
silabs.com | Building a more connected world.
Rev. 1.03 | 16
Si8920 Data Sheet
Packaging
Dimension
Min
Max
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
6.2 Land Pattern: DIP8
The figure below illustrates the recommended land pattern details for the Si8920 in a DIP8 package. The table lists the values for the
dimensions shown in the illustration.
Figure 6.2. DIP8 Land Pattern
Table 6.2. DIP8 Land Pattern Dimensions1
Dimension
Min
Max
C
8.85
8.90
E
2.54 BSC.
X
0.60
0.65
Y
1.65
1.70
Note:
1. This Land Pattern Design is based on the IPC-7351 specification.
silabs.com | Building a more connected world.
Rev. 1.03 | 17
Si8920 Data Sheet
Packaging
6.3 Package Outline: 16-Pin Wide Body SOIC
The figure below illustrates the package details for the Si8920 in a 16-Pin Wide Body SOIC package. The table lists the values for the
dimensions shown in the illustration.
Figure 6.3. 16-Pin Wide Body SOIC Package
Table 6.3. 16-Pin Wide Body SOIC Package Diagram Dimensions
Symbol
Millimeters
Min
Max
A
—
2.65
A1
0.10
0.30
A2
2.05
—
b
0.31
0.51
c
0.20
0.33
D
10.30 BSC
E
10.30 BSC
E1
7.50 BSC
e
1.27 BSC
L
0.40
1.27
h
0.25
0.75
θ
0°
8°
silabs.com | Building a more connected world.
Rev. 1.03 | 18
Si8920 Data Sheet
Packaging
Symbol
Millimeters
Min
Max
aaa
—
0.10
bbb
—
0.33
ccc
—
0.10
ddd
—
0.25
eee
—
0.10
fff
—
0.20
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC Outline MS-013, Variation AA.
4. Recommended reflow profile per JEDEC J-STD-020C specification for small body, lead-free components.
silabs.com | Building a more connected world.
Rev. 1.03 | 19
Si8920 Data Sheet
Packaging
6.4 Land Pattern: 16-Pin Wide Body SOIC
The figure below illustrates the recommended land pattern details for the Si8920 in a 16-Pin Wide Body SOIC package. The table lists
the values for the dimensions shown in the illustration.
Figure 6.4. 16-Pin Wide Body SOIC Land Pattern
Table 6.4. 16-Pin Wide Body SOIC Land Pattern Dimensions1
Dimension
Feature
(mm)
C1
Pad Column Spacing
9.40
E
Pad Row Pitch
1.27
X1
Pad Width
0.60
Y1
Pad Length
1.90
Note:
1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P1032X265-16AN for Density Level B (Median Land Protrusion).
2. All feature sizes shown are at Maximum Material Condition (MMC) and a card fabrication tolerance of 0.05 mm is assumed.
silabs.com | Building a more connected world.
Rev. 1.03 | 20
Si8920 Data Sheet
Packaging
6.5 Top Marking: DIP8
The figure below illustrates the top markings for the Si8920 in a DIP8 package. The table explains the top marks shown in the illustration.
Figure 6.5. Si8920 DIP8 Top Marking
Table 6.5. DIP8 Top Marking Explanation
Line 1 Marking:
Customer Part Number
Si8920 = Isolator Amplifier Series
S = Input Range:
• A = ±100 mV
• B = ±200 mV
V = Insulation rating:
• C = 3.75 kV
• D = 5.0 kV
Line 2 Marking:
YY = Year
WW = Work Week
RTTTTT = Mfg Code
Assigned by the Assembly House. Corresponds to the year and
work week of the mold date.
Manufacturing Code from the Assembly Purchase Order form.
“R” indicates revision.
Line 3 Marking:
Circle = 51 mils Diameter
“e4” Pb-Free Symbol
Center-Justified
Country of Origin
CC
(Iso-Code Abbreviation)
silabs.com | Building a more connected world.
Rev. 1.03 | 21
Si8920 Data Sheet
Packaging
6.6 Top Marking: 16-Pin Wide Body SOIC
The figure below illustrates the top markings for the Si8920 in a 16-Pin Wide Body SOIC package. The table explains the top marks
shown in the illustration.
Figure 6.6. Si8920 16-Pin Wide Body SOIC Top Marking
Table 6.6. 16-Pin Wide Body SOIC Top Mark Explanation
Line 1 Marking: Customer Part Number
Si8920 = Isolator Amplifier Series
S = Input Range:
• A = ±100 mV
• B = ±200 mV
V = Insulation rating:
• C = 3.75 kV
• D = 5.0 kV
Line 2 Marking: YY = Year
WW = Work Week
RTTTTT = Mfg Code
Assigned by the Assembly House. Corresponds to the year and work week of the mold
date.
Manufacturing Code from the Assembly Purchase Order form.
“R” indicates revision.
Line 3 Marking: Circle = 43 mils Diameter “e4” Pb-Free Symbol
Left-Justified
silabs.com | Building a more connected world.
Rev. 1.03 | 22
Si8920 Data Sheet
Revision History
7. Revision History
Revision 1.03
January 2019
• Added new OPNs for 3.75kVrms in WB SOIC-16 package
Revision 1.02
May 2018
• Updated the Ordering Guide for Automotive-Grade OPN option
Revision 1.01
April 2018
• Added an Ordering Guide for Automotive-Grade OPN option
Revision 1.0
• Updated linearity, offset, gain drift, and IVVDB specifications.
• Added typical Vout vs. Vin charts.
• Added Table 4.2 IEC Safety Limiting Values1 on page 8, Table 4.3 Thermal Characteristics on page 8, and thermal derating curves.
Revision 0.8
• Corrected the C6 equation in 3. Current Sense Application.
Revision 0.7
• Updated Figure 6.1 DIP8 Package on page 16.
silabs.com | Building a more connected world.
Rev. 1.03 | 23
Smart.
Connected.
Energy-Friendly
Products
Quality
Support and Community
www.silabs.com/products
www.silabs.com/quality
community.silabs.com
Disclaimer
Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or
intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical"
parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes
without further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information.
Without prior notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the
performance of the product. Silicon Labs shall have no liability for the consequences of use of the information supplied in this document. This document does not imply or expressly grant
any license to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any FDA Class III devices, applications for which FDA premarket
approval is required or Life Support Systems without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or
health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon
Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering
such weapons. Silicon Labs disclaims all express and implied warranties and shall not be responsible or liable for any injuries or damages related to use of a Silicon Labs product in such
unauthorized applications.
Trademark Information
Silicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®,
EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®,
ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress® and others are trademarks or registered trademarks of Silicon Labs.
ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names
mentioned herein are trademarks of their respective holders.
Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701
USA
http://www.silabs.com
